Inside the signal handler, we expect the requests to be ordered by their
breadcrumb such that no later request may be complete if we find an
earlier incomplete. Add an assert to check that the next breadcrumb
should not be logically before the current.
Signed-off-by: Chris Wilson
---
drivers/gpu
On Wed, 01 May 2019, "Summers, Stuart" wrote:
> On Wed, 2019-05-01 at 14:19 -0700, Daniele Ceraolo Spurio wrote:
>>
>> On 5/1/19 2:04 PM, Summers, Stuart wrote:
>> > On Wed, 2019-05-01 at 13:04 -0700, Daniele Ceraolo Spurio wrote:
>> > > Can you elaborate a bit more on what's the rationale for th
== Series Details ==
Series: drm/i915: Engine discovery query (rev10)
URL : https://patchwork.freedesktop.org/series/39958/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6025 -> Patchwork_12932
Summary
---
**SUCCESS*
== Series Details ==
Series: series starting with [v3,1/4] drm/i915: Fix the pipe state timing
mismatch warnings
URL : https://patchwork.freedesktop.org/series/60186/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4f4166d5345c drm/i915: Fix the pipe state timing mismatch warnin
== Series Details ==
Series: series starting with [v3,1/4] drm/i915: Fix the pipe state timing
mismatch warnings
URL : https://patchwork.freedesktop.org/series/60186/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6025 -> Patchwork_12933
===
== Series Details ==
Series: series starting with [1/2] drm/i915: Use mul_u32_u32() more (rev2)
URL : https://patchwork.freedesktop.org/series/59180/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6017_full -> Patchwork_12909_full
===
On Tue, 30 Apr 2019, Stanislav Lisovskiy wrote:
> Currently due to regression CI machine
> displays show corrupt picture.
> Problem is when CDCLK is as low as 79200, picture gets
> unstable, while DSI and DE pll values were
> confirmed to be correct.
> Limiting to 158400 as agreed with Ville.
>
>
== Series Details ==
Series: drm/i915: Corrupt DSI picture fix for GeminiLake (rev3)
URL : https://patchwork.freedesktop.org/series/60084/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6017_full -> Patchwork_12911_full
Summ
== Series Details ==
Series: dma-buf: add struct dma_buf_attach_info v2
URL : https://patchwork.freedesktop.org/series/60107/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6017_full -> Patchwork_12908_full
Summary
---
== Series Details ==
Series: series starting with [1/2] drm/i915: Don't skip audio enable if ELD is
bogus
URL : https://patchwork.freedesktop.org/series/60119/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6017_full -> Patchwork_12912_full
== Series Details ==
Series: series starting with [1/3] drm/i915: Complete both freed-object passes
before draining the workqueue
URL : https://patchwork.freedesktop.org/series/60162/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6021_full -> Patchwork_12924_full
On Mon, 29 Apr 2019, Rodrigo Vivi wrote:
> On Mon, Apr 29, 2019 at 05:22:53PM +0300, Jani Nikula wrote:
>> Debug logging should not be dependent on alpha support flag.
>>
>> Cc: Rodrigo Vivi
>> Signed-off-by: Jani Nikula
>
> I agree... this is not the right way to track dependencies.
>
> Review
Using arithmetic operators with booleans is confusing. Switch to logical
operators.
Cc: Paulo Zanoni
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp
On Wed, May 01, 2019 at 10:04:33AM -0400, Brian Welty wrote:
> In containerized or virtualized environments, there is desire to have
> controls in place for resources that can be consumed by users of a GPU
> device. This RFC patch series proposes a framework for integrating
> use of existing cgrou
== Series Details ==
Series: series starting with [1/2] drm/i915: Use mul_u32_u32() more (rev2)
URL : https://patchwork.freedesktop.org/series/59180/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6017_full -> Patchwork_12909_full
===
== Series Details ==
Series: dma-buf: add struct dma_buf_attach_info v2
URL : https://patchwork.freedesktop.org/series/60107/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6017_full -> Patchwork_12908_full
Summary
---
== Series Details ==
Series: drm/i915: Corrupt DSI picture fix for GeminiLake (rev3)
URL : https://patchwork.freedesktop.org/series/60084/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6017_full -> Patchwork_12911_full
Summ
== Series Details ==
Series: drm/i915: Assert breadcrumbs are correctly ordered in the signal handler
URL : https://patchwork.freedesktop.org/series/60187/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6025 -> Patchwork_12934
===
== Series Details ==
Series: Refactor to expand subslice mask (rev7)
URL : https://patchwork.freedesktop.org/series/59742/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6021_full -> Patchwork_12926_full
Summary
---
*
== Series Details ==
Series: series starting with [01/14] drm/i915/hangcheck: Track context changes
(rev4)
URL : https://patchwork.freedesktop.org/series/60153/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6021_full -> Patchwork_12928_full
===
Given an immediate preemption event on re-enabling arbitration
(MI_ARB_ON_OFF | MI_ARB_ENABLE) it appears that the HW may forget about
the ongoing MI_USER_INTERRUPT, losing the interrupt in the process. If
we happen to be waiting on that interrupt at the time, the system may
then grind to a halt.
== Series Details ==
Series: drm/i915/perf: Refactor oa object to better manage resources
URL : https://patchwork.freedesktop.org/series/60176/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6021_full -> Patchwork_12929_full
Framebuffer formats P01x are supported by GLK, but the function which
handles CSC on plane color control register, still expectes the input
buffer to be REC709. This can cause inaccurate output for direct P01x
flips.
This patch checks if the color_encoding property is set to YCBCR_2020,
and enable
On Thu, May 02, 2019 at 03:19:42PM +0530, Shashank Sharma wrote:
> Framebuffer formats P01x are supported by GLK, but the function which
> handles CSC on plane color control register, still expectes the input
> buffer to be REC709. This can cause inaccurate output for direct P01x
> flips.
>
> This
Looks like VBT contains again the wrong information about a port's TypeC
legacy vs. DP-alt/TBT-alt type. There is no further issues after we
notice this and fix it up, so tune down the WARN to be a a DRM_ERROR.
This also avoids CI tainting the kernel and stopping the test run.
Bugzilla: https://b
Quoting Chris Wilson (2019-05-02 10:41:19)
> Given an immediate preemption event on re-enabling arbitration
> (MI_ARB_ON_OFF | MI_ARB_ENABLE) it appears that the HW may forget about
> the ongoing MI_USER_INTERRUPT, losing the interrupt in the process. If
> we happen to be waiting on that interrupt
On 01/05/2019 17:50, Umesh Nerlige Ramappa wrote:
The oa object manages the oa buffer and must be allocated when the user
intends to read performance counter snapshots. This can be achieved by
making the oa object part of the stream object which is allocated when a
stream is opened by the user.
> -Original Message-
> From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> Sent: Thursday, May 2, 2019 3:45 PM
> To: Sharma, Shashank
> Cc: intel-gfx@lists.freedesktop.org; Syrjala, Ville
> ; Lankhorst,
> Maarten
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/GLK: Properly handle
On Thu, May 02, 2019 at 10:40:39AM +, Sharma, Shashank wrote:
>
>
> > -Original Message-
> > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> > Sent: Thursday, May 2, 2019 3:45 PM
> > To: Sharma, Shashank
> > Cc: intel-gfx@lists.freedesktop.org; Syrjala, Ville
> > ; Lank
On Thu, 02 May 2019, Imre Deak wrote:
> Looks like VBT contains again the wrong information about a port's TypeC
> legacy vs. DP-alt/TBT-alt type. There is no further issues after we
> notice this and fix it up, so tune down the WARN to be a a DRM_ERROR.
>
> This also avoids CI tainting the kernel
On Tue, 30 Apr 2019, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We've already committed to enabling audio when intel_audio_codec_enable()
> is called. We can't back out even if the ELD has turned sour in the
> meantime. So just spew some debug log and plow ahead. Otherwise the
> state checker
On Tue, 30 Apr 2019, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> s/pipe/transcoder/ when dealing with hsw+ audio registers. This
> won't actually make any real difference since there is no audio
> on the EDP transcoder. But this should avoid a bit of confusion
> when cross checking against the
Hi Dave, Daniel,
Here is a drm-misc fixes PR for 5.1.
Thanks!
Maxime
drm-misc-fixes-2019-05-02:
- One revert for QXL for a DRI3 breakage
The following changes since commit c4cba44eeecab9d5ccd3dd2d5520a7d1e5be544f:
drm/bridge: dw-hdmi: fix SCDC configuration for ddc-i2c-bus (2019-04-25
10:38:
== Series Details ==
Series: drm/i915: add single combo phy init/unit functions (rev2)
URL : https://patchwork.freedesktop.org/series/60112/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6025_full -> Patchwork_12931_full
Su
== Series Details ==
Series: drm/i915: Engine discovery query (rev10)
URL : https://patchwork.freedesktop.org/series/39958/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6025_full -> Patchwork_12932_full
Summary
---
On 01/05/2019 12:45, Chris Wilson wrote:
The original intent for the delay before running the idle_work was to
provide a hysteresis to avoid ping-ponging the device runtime-pm. Since
then we have also pulled in some memory management and general device
management for parking. But with the invers
This series adds the content type capability for HDCP through a
drm connetor proeprty "HDCP Content Type". By default this property will
be "Type 0". And this property is exposed by the drivers which has the
HDCP2.2 capability to enable the userspace to configure for "Type 1".
HDCP Content Type:
Adding the HDCP2.2 capability of HDCP src and sink info into debugfs
entry "i915_hdcp_sink_capability"
This helps the userspace tests to skip the HDCP2.2 test on non HDCP2.2
sinks.
v2:
Rebased.
Signed-off-by: Ramalingam C
Reviewed-by: Daniel Vetter
---
drivers/gpu/drm/i915/i915_debugfs.c |
On every hdcp revocation check request SRM is read from fw file
/lib/firmware/display_hdcp_srm.bin
SRM table is parsed and stored at drm_hdcp.c, with functions exported
for the services for revocation check from drivers (which
implements the HDCP authentication)
This patch handles the HDCP1.4 and
This patch adds a DRM ENUM property to the selected connectors.
This property is used for mentioning the protected content's type
from userspace to kernel HDCP authentication.
Type of the stream is decided by the protected content providers.
Type 0 content can be rendered on any HDCP protected dis
Considering the significant size of hdcp related code in drm, all
hdcp related codes are moved into separate file called drm_hdcp.c.
v2:
Rebased.
v2:
Rebased.
Signed-off-by: Ramalingam C
Suggested-by: Daniel Vetter
Reviewed-by: Daniel Vetter
---
drivers/gpu/drm/drm_connector.c | 44 --
Content protection property is created once and stored in
drm_mode_config. And attached to all HDCP capable connectors.
Signed-off-by: Ramalingam C
Reviewed-by: Daniel Vetter
---
drivers/gpu/drm/drm_atomic_uapi.c | 4 ++--
drivers/gpu/drm/drm_connector.c | 13 +++--
include/drm/drm_c
Attaches the content type property for HDCP2.2 capable connectors.
Implements the update of content type from property and apply the
restriction on HDCP version selection.
Need ACK for content type property from userspace consumer.
v2:
s/cp_content_type/content_protection_type [daniel]
disab
drm function is defined and exported to update a connector's
content protection property state and to generate a uevent along
with it.
Need ACK for the uevent from userspace consumer.
v2:
Update only when state is different from old one.
v3:
KDoc is added [Daniel]
Signed-off-by: Ramalingam C
DRM HDCP SRM revocation check services are used from I915 for HDCP1.4
and 2.2 revocation check during the respective authentication flow.
v2:
Rebased.
v3:
%s/*_ksvs_revocated/*_check_ksvs_revoked [Daniel]
unwanted noise is removed.
Signed-off-by: Ramalingam C
Reviewed-by: Daniel Vetter
--
DRM API for generating uevent for a status changes of connector's
property.
This uevent will have following details related to the status change:
HOTPLUG=1, CONNECTOR= and PROPERTY=
Need ACK from this uevent from userspace consumer.
v2:
Minor fixes at KDoc comments [Daniel]
v3:
Check the
drm function to update the content protection property state and to
generate a uevent is invoked from the intel hdcp property work.
Hence whenever kernel changes the property state, userspace will be
updated with a uevent.
Need a ACK for uevent generating uAPI from userspace.
v2:
state update
== Series Details ==
Series: series starting with [v3,1/4] drm/i915: Fix the pipe state timing
mismatch warnings
URL : https://patchwork.freedesktop.org/series/60186/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6025_full -> Patchwork_12933_full
=
Quoting Tvrtko Ursulin (2019-05-02 14:19:38)
>
> On 01/05/2019 12:45, Chris Wilson wrote:
> > diff --git a/drivers/gpu/drm/i915/i915_gem_pm.c
> > b/drivers/gpu/drm/i915/i915_gem_pm.c
> > index 49b0ce594f20..ae91ad7cb31e 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_pm.c
> > +++ b/drivers/gpu/drm
On 01/05/2019 12:45, Chris Wilson wrote:
Replace the racy continuation check within retire_work with a definite
kill-switch on idling. The race was being exposed by gem_concurrent_blit
where the retire_worker would be terminated too early leaving us
spinning in debugfs/i915_drop_caches with noth
== Series Details ==
Series: drm/i915: Assert breadcrumbs are correctly ordered in the signal handler
URL : https://patchwork.freedesktop.org/series/60187/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6025_full -> Patchwork_12934_full
=
Read back the pixel fomrat register and get the bpp.
v2: Read the PIPE_MISC register (Jani).
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/icl_dsi.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c
index 45fe69c..c
Quoting Tvrtko Ursulin (2019-05-02 14:29:50)
>
> On 01/05/2019 12:45, Chris Wilson wrote:
> > Replace the racy continuation check within retire_work with a definite
> > kill-switch on idling. The race was being exposed by gem_concurrent_blit
> > where the retire_worker would be terminated too earl
On 01/05/2019 12:45, Chris Wilson wrote:
If the user is racing a call to debugfs/i915_drop_caches with ongoing
submission from another thread/process, we may never end up idling the
GPU and be uninterruptibly spinning in debugfs/i915_drop_caches trying
to catch an idle moment.
Just flush the wo
Hi Dave & Daniel,
A quick fix to unbreak media driver, worthy inclusion before the merge window.
Best Regards,
Joonas
***
drm-intel-next-fixes-2019-05-02:
- Whitelist a register to avoid media driver from hanging
The following changes since commit 879a4e70f96a26a9368a3caed2f552aa67105852:
Move bdw_get_pipemisc_bpp alongside bdw_set_pipemisc
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/intel_display.c | 22 ++
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/vlv_dsi.c | 22 --
3 files changed, 23 insertions
Adjust the get transcoder timings for mipi dsi as per the
set timing calculations.
v2: Use the existing intel_get_pipe_timings and do the dsi
specific adjustments in the encoder get_config hook.(Ville, Jani)
v3: Exclude VBLANK and HBLANK registers for dsi transcoder.
Signed-off-by: Vandita K
On 2019-05-02 at 18:52:53 +0530, Ramalingam C wrote:
> This series adds the content type capability for HDCP through a
> drm connetor proeprty "HDCP Content Type". By default this property will
> be "Type 0". And this property is exposed by the drivers which has the
> HDCP2.2 capability to enable t
In case of dual link mode, the mode clock that we get
from the VBT is halved.
v2: Simplify the calculation (Jani).
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/icl_dsi.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl
On 01/05/2019 12:45, Chris Wilson wrote:
Show the fence flags view of request completion in addition to the
normal hwsp check and whether signaling is enabled.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
On Thu, May 02, 2019 at 06:48:46PM +0530, Anshuman Khandual wrote:
> Drop the pgtable_t variable from all implementation for pte_fn_t as none of
> them use it. apply_to_pte_range() should stop computing it as well. Should
> help us save some cycles.
You didn't add Martin Schwidefsky for some reaso
On 01/05/2019 12:45, Chris Wilson wrote:
Tidy up the cleanup sequence by always ensure that the tasklet is
flushed on parking (before we cleanup). The parking provides a
convenient point to ensure that the backend is truly idle.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_l
On 02/05/2019 14:22, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-05-02 14:19:38)
On 01/05/2019 12:45, Chris Wilson wrote:
diff --git a/drivers/gpu/drm/i915/i915_gem_pm.c
b/drivers/gpu/drm/i915/i915_gem_pm.c
index 49b0ce594f20..ae91ad7cb31e 100644
--- a/drivers/gpu/drm/i915/i915_gem_pm.c
Quoting Tvrtko Ursulin (2019-05-02 14:48:18)
>
> On 01/05/2019 12:45, Chris Wilson wrote:
> > Tidy up the cleanup sequence by always ensure that the tasklet is
> > flushed on parking (before we cleanup). The parking provides a
> > convenient point to ensure that the backend is truly idle.
> >
> >
== Series Details ==
Series: HDCP2.2 Phase II (rev8)
URL : https://patchwork.freedesktop.org/series/57232/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d32d7d16faa9 drm: move content protection property to mode_config
7c8e2a00dcfb drm/i915: debugfs: HDCP2.2 capability read
a5b
Quoting Tvrtko Ursulin (2019-05-02 14:34:11)
>
> On 01/05/2019 12:45, Chris Wilson wrote:
> > If the user is racing a call to debugfs/i915_drop_caches with ongoing
> > submission from another thread/process, we may never end up idling the
> > GPU and be uninterruptibly spinning in debugfs/i915_dro
== Series Details ==
Series: HDCP2.2 Phase II (rev8)
URL : https://patchwork.freedesktop.org/series/57232/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm: move content protection property to mode_config
Okay!
Commit: drm/i915: debugfs: HDCP2.2 cap
== Series Details ==
Series: drm/i915/dp: use logical operators with boolean type
URL : https://patchwork.freedesktop.org/series/60190/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6026 -> Patchwork_12935
Summary
---
== Series Details ==
Series: drm/i915/execlists: Unshadow MI_USER_INTERRUPT
URL : https://patchwork.freedesktop.org/series/60192/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6026 -> Patchwork_12936
Summary
---
**SU
== Series Details ==
Series: drm/i915/GLK: Properly handle plane CSC for BT2020 framebuffers
URL : https://patchwork.freedesktop.org/series/60195/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6026 -> Patchwork_12937
Summar
On Thu, May 02, 2019 at 03:16:37PM +0300, Jani Nikula wrote:
> On Tue, 30 Apr 2019, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > s/pipe/transcoder/ when dealing with hsw+ audio registers. This
> > won't actually make any real difference since there is no audio
> > on the EDP transcoder. B
== Series Details ==
Series: drm/i915: Tune down WARN about incorrect VBT TC legacy flag
URL : https://patchwork.freedesktop.org/series/60197/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6026 -> Patchwork_12938
Summary
--
On 02/05/2019 14:53, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-05-02 14:48:18)
On 01/05/2019 12:45, Chris Wilson wrote:
Tidy up the cleanup sequence by always ensure that the tasklet is
flushed on parking (before we cleanup). The parking provides a
convenient point to ensure that the b
On 02/05/2019 15:00, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-05-02 14:34:11)
On 01/05/2019 12:45, Chris Wilson wrote:
If the user is racing a call to debugfs/i915_drop_caches with ongoing
submission from another thread/process, we may never end up idling the
GPU and be uninterruptibl
console_trylock, called from within printk, can be called from pretty
much anywhere. Including try_to_wake_up. Note that this isn't common,
usually the box is in pretty bad shape at that point already. But it
really doesn't help when then lockdep jumps in and spams the logs,
potentially obscuring t
If we interrupt building of the request, we may emit a request with no
payload at all, with the consequence that we never disable arbitration
prior to the breadcrumb. If we get preempted during the breadcrumb, it
appears possible to lose the association of the interrupt with
breadcrumb, and under t
== Series Details ==
Series: HDCP2.2 Phase II (rev8)
URL : https://patchwork.freedesktop.org/series/57232/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6026 -> Patchwork_12939
Summary
---
**SUCCESS**
No regressio
On Fri, Apr 26, 2019 at 08:39:12AM +, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [v2,1/2] drm/i915/icl: Factor out combo PHY lane
> power setup helper
> URL : https://patchwork.freedesktop.org/series/59954/
> State : success
Thanks for the review, series pushe
On 01/05/2019 12:45, Chris Wilson wrote:
Drop the check in GEM parking that the engines were already parked. The
intention here was that before we dropped the GT wakeref, we were sure
that no more interrupts could be raised -- however, we have already
dropped the wakeref by this point and the wa
On 02/05/2019 14:33, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-05-02 14:29:50)
On 01/05/2019 12:45, Chris Wilson wrote:
Replace the racy continuation check within retire_work with a definite
kill-switch on idling. The race was being exposed by gem_concurrent_blit
where the retire_worke
Quoting Tvrtko Ursulin (2019-05-02 15:14:08)
>
> On 02/05/2019 14:53, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-05-02 14:48:18)
> >>
> >> On 01/05/2019 12:45, Chris Wilson wrote:
> >>> Tidy up the cleanup sequence by always ensure that the tasklet is
> >>> flushed on parking (before we
Quoting Tvrtko Ursulin (2019-05-02 14:51:31)
>
> On 02/05/2019 14:22, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-05-02 14:19:38)
> >>
> >> On 01/05/2019 12:45, Chris Wilson wrote:
> >>> diff --git a/drivers/gpu/drm/i915/i915_gem_pm.c
> >>> b/drivers/gpu/drm/i915/i915_gem_pm.c
> >>> inde
On 02/05/2019 15:21, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-05-02 15:14:08)
On 02/05/2019 14:53, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-05-02 14:48:18)
On 01/05/2019 12:45, Chris Wilson wrote:
Tidy up the cleanup sequence by always ensure that the tasklet is
flushed on
Quoting Tvrtko Ursulin (2019-05-02 15:20:52)
>
> On 02/05/2019 14:33, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-05-02 14:29:50)
> >>
> >> On 01/05/2019 12:45, Chris Wilson wrote:
> >>> Replace the racy continuation check within retire_work with a definite
> >>> kill-switch on idling. Th
Replace the racy continuation check within retire_work with a definite
kill-switch on idling. The race was being exposed by gem_concurrent_blit
where the retire_worker would be terminated too early leaving us
spinning in debugfs/i915_drop_caches with nothing flushing the
retirement queue.
Although
tor 2019-05-02 klockan 14:51 +0300 skrev Ville Syrjälä:
> On Thu, May 02, 2019 at 10:40:39AM +, Sharma, Shashank wrote:
> >
> >
> > > -Original Message-
> > > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> > > Sent: Thursday, May 2, 2019 3:45 PM
> > > To: Sharma, Shashan
Quoting Tvrtko Ursulin (2019-05-02 15:24:16)
>
> On 02/05/2019 15:21, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-05-02 15:14:08)
> >>
> >> On 02/05/2019 14:53, Chris Wilson wrote:
> >>> Quoting Tvrtko Ursulin (2019-05-02 14:48:18)
>
> On 01/05/2019 12:45, Chris Wilson wrote:
>
On Thu, 02 May 2019, Imre Deak wrote:
> On Fri, Apr 26, 2019 at 08:39:12AM +, Patchwork wrote:
>> == Series Details ==
>>
>> Series: series starting with [v2,1/2] drm/i915/icl: Factor out combo PHY
>> lane power setup helper
>> URL : https://patchwork.freedesktop.org/series/59954/
>> State
On Wed, 2019-05-01 at 15:04 -0700, Daniele Ceraolo Spurio wrote:
>
> On 5/1/19 8:34 AM, Stuart Summers wrote:
> > Currently, the subslice_mask runtime parameter is stored as an
> > array of subslices per slice. Expand the subslice mask array to
> > better match what is presented to userspace throu
Work on the principle that files should prefer not to expose platform
specific functions.
v2, v3: Rebase
Cc: Imre Deak
Reviewed-by: Chris Wilson
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_combo_phy.c | 24
drivers/gpu/drm/i915/intel_combo_phy.h | 6 +
On Thu, 2019-05-02 at 10:15 +0300, Jani Nikula wrote:
> On Wed, 01 May 2019, "Summers, Stuart"
> wrote:
> > On Wed, 2019-05-01 at 14:19 -0700, Daniele Ceraolo Spurio wrote:
> > >
> > > On 5/1/19 2:04 PM, Summers, Stuart wrote:
> > > > On Wed, 2019-05-01 at 13:04 -0700, Daniele Ceraolo Spurio
> >
On Thu, 02 May 2019, "Summers, Stuart" wrote:
> On Thu, 2019-05-02 at 10:15 +0300, Jani Nikula wrote:
>> Acked-by: Jani Nikula
>
> Jani, based on Daniele's feedback, I'm planning on squashing this patch
> with the patch that moves these helper functions to intel_sseu.h. Any
> issue keeping your A
On Thu, 2019-05-02 at 17:58 +0300, Jani Nikula wrote:
> On Thu, 02 May 2019, "Summers, Stuart"
> wrote:
> > On Thu, 2019-05-02 at 10:15 +0300, Jani Nikula wrote:
> > > Acked-by: Jani Nikula
> >
> > Jani, based on Daniele's feedback, I'm planning on squashing this
> > patch
> > with the patch tha
Reduce clutter from intel_drv.h with the minimal change.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_drv.h | 5 -
drivers/gpu/drm/i915/intel_dvo.c | 5 +
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/i
Continue the header refactoring started in [1] and [2].
BR,
Jani.
[1] https://patchwork.freedesktop.org/series/59022/
[2] https://patchwork.freedesktop.org/series/60060/
Jani Nikula (13):
drm/i915/dvo: move DVO chip types to intel_dvo.c
drm/i915/dsi: move operation mode types to intel_dsi.h
Reduce clutter from intel_drv.h with the minimal change.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_drv.h | 3 ---
drivers/gpu/drm/i915/intel_dsi.h | 3 +++
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel
Drop the check in GEM parking that the engines were already parked. The
intention here was that before we dropped the GT wakeref, we were sure
that no more interrupts could be raised -- however, we have already
dropped the wakeref by this point and the warning is no longer valid.
Signed-off-by: Ch
Tidy up the cleanup sequence by always ensure that the tasklet is
flushed on parking (before we cleanup). The parking provides a
convenient point to ensure that the backend is truly idle.
v2: Do the full check for idleness before parking, to be sure we flush
any residual interrupt.
Signed-off-by:
Reduce clutter from i915_drv.h.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_debugfs.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 4
drivers/gpu/drm/i915/i915_gpu_error.c | 1 +
drivers/gpu/drm/i915/intel_csr.h | 4
4 files changed, 6 insertions(+), 4 deletions(-
Reduce clutter from intel_drv.h.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_drv.h | 9 -
1 file changed, 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 709647..addf6f 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++
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