On Thu, Apr 18, 2019 at 01:15:17PM +, Mun, Gwan-gyeong wrote:
> On Thu, 2019-04-18 at 10:28 +0200, Daniel Vetter wrote:
> > On Thu, Apr 18, 2019 at 11:09:29AM +0300, Gwan-gyeong Mun wrote:
> > > The hotplug detection routine of drm_helper_hpd_irq_event() can
> > > detect
> > > changing of statu
On Thu, Apr 18, 2019 at 10:41:35AM +0200, Thomas Gleixner wrote:
> Replace the indirection through struct stack_trace by using the storage
> array based interfaces.
>
> The original code in all printing functions is really wrong. It allocates a
> storage array on stack which is unused because depo
On Thu, Apr 18, 2019 at 02:27:54PM +0530, Ramalingam C wrote:
> Content protection property is created once and stored in
> drm_mode_config. And attached to all HDCP capable connectors.
>
> Signed-off-by: Ramalingam C
Reviewed-by: Daniel Vetter
> ---
> drivers/gpu/drm/drm_atomic_uapi.c | 4 +
On Thu, Apr 18, 2019 at 02:27:56PM +0530, Ramalingam C wrote:
> This patch adds a DRM ENUM property to the selected connectors.
> This property is used for mentioning the protected content's type
> from userspace to kernel HDCP authentication.
>
> Type of the stream is decided by the protected con
On Thu, Apr 18, 2019 at 02:27:57PM +0530, Ramalingam C wrote:
> Attaches the content type property for HDCP2.2 capable connectors.
>
> Implements the update of content type from property and apply the
> restriction on HDCP version selection.
>
> v2:
> s/cp_content_type/content_protection_type [
On Fri, Apr 19, 2019 at 08:55:02AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/icl: Fix MG_DP_MODE() register programming
> URL : https://patchwork.freedesktop.org/series/59744/
> State : success
Thanks for the reviews, pushed to -dinq adding the not to the commit
messag
On Thu, 18 Apr 2019, Thomas Gleixner wrote:
> Replace the indirection through struct stack_trace by using the storage
> array based interfaces.
>
> Signed-off-by: Thomas Gleixner
Acked-by: Miroslav Benes
Feel free to take it through tip or let us know to pick it up.
Miroslav
On Fri, Apr 19, 2019 at 07:19:04PM +0100, Chris Wilson wrote:
> sync_dump() is an unused, unexported, function that adds 64k to the
> kernel image and doesn't even provide locking around the global array it
> uses.
>
> add/remove: 0/2 grow/shrink: 0/0 up/down: 0/-65734 (-65734)
> Function
Quoting Daniel Vetter (2019-04-23 09:21:16)
> On Fri, Apr 19, 2019 at 07:19:04PM +0100, Chris Wilson wrote:
> > sync_dump() is an unused, unexported, function that adds 64k to the
> > kernel image and doesn't even provide locking around the global array it
> > uses.
> >
> > add/remove: 0/2 grow/sh
Quoting Joonas Lahtinen (2019-04-18 15:04:49)
> + Jani and Rodrigo to comment
No objection here and drm-intel-next was freshly tagged, so this is:
Acked-by: Joonas Lahtinen
Regards, Joonas
>
> I'm definitely all for doing this, so it's only a matter of the timing.
>
> Question is, do we want
I'll want two things:
* Explicit ack from Rodrigo too
* The dependencies merged first, and this one posted as a single
patch. I really want this to stand out better, instead of semi-hidden
in the middle of a 30+ patch series.
Acked-by: Jani Nikula
On Tue, 23 Apr 2019, Joonas Lahtinen w
On Thu, Apr 18, 2019 at 10:31:32AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: adding state checker for gamma lut values (rev6)
> URL : https://patchwork.freedesktop.org/series/58039/
> State : failure
Hey,
This series is a rerun, which means that someone went to patc
On 20/04/2019 20:24, Noralf Trønnes wrote:
>
>
> Den 20.04.2019 12.45, skrev Noralf Trønnes:
>> This moves the modesetting code from drm_fb_helper to drm_client so it
>> can be shared by all internal clients.
>>
>> Changes this time:
>> - Use full drm_client_init/release for the modesets (Daniel
On 2019-04-23 at 10:11:48 +0200, Daniel Vetter wrote:
> On Thu, Apr 18, 2019 at 02:27:57PM +0530, Ramalingam C wrote:
> > Attaches the content type property for HDCP2.2 capable connectors.
> >
> > Implements the update of content type from property and apply the
> > restriction on HDCP version sel
Check that we can reorder batches around userspace sempahore waits by
injecting a semaphore that is only released by a later context.
Signed-off-by: Chris Wilson
---
tests/i915/gem_exec_schedule.c | 143 +
1 file changed, 143 insertions(+)
diff --git a/tests/i915
On Tue, Apr 23, 2019 at 1:15 PM Ramalingam C wrote:
>
> On 2019-04-23 at 10:11:48 +0200, Daniel Vetter wrote:
> > On Thu, Apr 18, 2019 at 02:27:57PM +0530, Ramalingam C wrote:
> > > Attaches the content type property for HDCP2.2 capable connectors.
> > >
> > > Implements the update of content type
On 17/04/2019 08:56, Chris Wilson wrote:
Currently there is an underlying assumption that i915_request_unsubmit()
is synchronous wrt the GPU -- that is the request is no longer in flight
as we remove it. In the near future that may change, and this may upset
our signaling as we can process an in
On 17/04/2019 08:56, Chris Wilson wrote:
In the current scheme, on submitting a request we take a single global
GEM wakeref, which trickles down to wake up all GT power domains. This
is undesirable as we would like to be able to localise our power
management to the available power domains and to
Libify resetting a spin for reuse.
v2: use also in perf_pmu
v3: s/cmd_spin/cmd_precondition
Cc: Chris Wilson
Cc: Tvrtko Ursulin
Signed-off-by: Mika Kuoppala
---
lib/igt_dummyload.c | 20
lib/igt_dummyload.h | 2 ++
tests/i915/gem_exec_latency.c | 19 +
Use spin->condition to mark the spot we have
saved for manipulating the looping condition.
Cc: Chris Wilson
Signed-off-by: Mika Kuoppala
---
lib/igt_dummyload.c | 66 ---
lib/igt_dummyload.h | 4 ++-
tests/i915/gem_exec_latency.c | 2 --
3 f
To simplify emitting the recursive batch, make batch
always the first object on the execbuf list.
v2: set handles early, poll_ptr indecency (Chris)
v3: allow dep with poll
Cc: Chris Wilson
Signed-off-by: Mika Kuoppala
---
lib/igt_dummyload.c | 124
Quoting Mika Kuoppala (2019-04-23 15:00:36)
> Libify resetting a spin for reuse.
>
> v2: use also in perf_pmu
> v3: s/cmd_spin/cmd_precondition
>
> Cc: Chris Wilson
> Cc: Tvrtko Ursulin
> Signed-off-by: Mika Kuoppala
> ---
> lib/igt_dummyload.c | 20
> lib/igt_d
Quoting Mika Kuoppala (2019-04-23 15:00:37)
> Use spin->condition to mark the spot we have
> saved for manipulating the looping condition.
... to make the batch variable available for later reuse as a pointer to
the object instead.
Tell use why! Then tell us how you went about to accomplish that
Libify resetting a spin for reuse.
v2: use also in perf_pmu
v3: s/cmd_spin/cmd_precondition
v4: remove early return for !spin (Chris)
Cc: Chris Wilson
Cc: Tvrtko Ursulin
Signed-off-by: Mika Kuoppala
Reviewed-by: Chris Wilson
---
lib/igt_dummyload.c | 17 +
lib/igt_d
Hi
Am 07.04.19 um 18:52 schrieb Noralf Trønnes:
> It is generic code and having it in the helper will let other drivers
> benefit from it.
>
> One change was necessary assuming this to be true:
> INTEL_INFO(dev_priv)->num_pipes == dev->mode_config.num_crtc
>
> Suggested-by: Daniel Vetter
> Cc:
The kms_flip test relies on VBlank support, and this situation may
exclude some virtual drivers to take advantage of this set of tests.
This commit adds a mechanism that checks if a module has VBlank. If the
target module has VBlank support, kms_flip will run all the VBlank
tests; otherwise, the VB
On Mon, Apr 22, 2019 at 06:37:48PM +, Sripada, Radhakrishna wrote:
> On Wed, 2019-04-10 at 20:08 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Before we go writing the infoframe let's make sure we have
> > the space for it. Not that it really matters since the write
> > loop wou
Den 23.04.2019 16.17, skrev Thomas Zimmermann:
> Hi
>
> Am 07.04.19 um 18:52 schrieb Noralf Trønnes:
>> It is generic code and having it in the helper will let other drivers
>> benefit from it.
>>
>> One change was necessary assuming this to be true:
>> INTEL_INFO(dev_priv)->num_pipes == dev->mo
Quoting Mika Kuoppala (2019-04-23 15:00:38)
> @@ -41,8 +42,13 @@ typedef struct igt_spin {
> uint32_t cmd_precondition;
>
> int out_fence;
> - struct drm_i915_gem_exec_object2 obj[2];
> +
> + struct drm_i915_gem_exec_object2 _obj[3];
> +#define SPIN_OBJ_BATCH 0
> +#def
== Series Details ==
Series: drm/fb-helper: Move modesetting code to drm_client (rev4)
URL : https://patchwork.freedesktop.org/series/58597/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4a9806c7e6fe drm/atomic: Move __drm_atomic_helper_disable_plane/set_config()
0ba328ef9996 d
== Series Details ==
Series: series starting with [1/3] lib/igt_dummyload: Introduce igt_spin_reset
(rev2)
URL : https://patchwork.freedesktop.org/series/59830/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5971 -> IGTPW_2906
==
On Fri, Apr 19, 2019 at 12:17:47PM +0100, Chris Wilson wrote:
> Despite what I think the prm recommends, commit f2253bd9859b
> ("drm/i915/ringbuffer: EMIT_INVALIDATE after switch context") turned out
> to be a huge mistake when enabling Ironlake contexts as the GPU would
> hang on either a MI_FLUSH
== Series Details ==
Series: drm/fb-helper: Move modesetting code to drm_client (rev4)
URL : https://patchwork.freedesktop.org/series/58597/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/atomic: Move __drm_atomic_helper_disable_plane/set_config()
Add the comparison between the current state and new_crtc_state for
newly added master_crtc pointer and slave bitmask so that
if any of those change then the curernt master-slave links have
changed and we need to reconfigure the transcoder port sync register
and hence trigger a full modeset.
Sugge
In case of tiled displays where different tiles are displayed across
different ports, we need to synchronize the transcoders involved.
This patch implements the transcoder port sync feature for
synchronizing one master transcoder with one or more slave
transcoders. This is only enbaled in slave tra
In case of tiled displays when the two tiles are sent across two CRTCs
over two separate DP SST connectors, we need a mechanism to synchronize
the two CRTCs and their corresponding transcoders.
So use the master-slave mode where there is one master corresponding
to last horizontal and vertical tile
As per the display enable sequence, we need to follow the enable sequence
for slaves first with DP_TP_CTL set to Idle and configure the transcoder
port sync register to select the corersponding master, then follow the
enable sequence for master leaving DP_TP_CTL to idle.
At this point the transcode
In case of tiled displays, each tile is sent across a separate CRTC and a
separate port/connector connected to the monitor. In this case we need to make
sure that the timings across these transcoders/ports are synchronized else
the two tile displays can be off.
Transcoder Port Sync is a transcoder
== Series Details ==
Series: drm/fb-helper: Move modesetting code to drm_client (rev4)
URL : https://patchwork.freedesktop.org/series/58597/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5971 -> Patchwork_12854
Summary
== Series Details ==
Series: Enable Transcoder Port Sync feature for Tiled displays
URL : https://patchwork.freedesktop.org/series/59837/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3288bd9171c1 drm/i915/icl: Assign Master slave crtc links for Transcoder Port
Sync
-:109: WAR
On Wed, Apr 17, 2019 at 07:33:24PM +0530, Swati Sharma wrote:
> v4: -Renamed intel_get_color_config to intel_color_get_config [Jani]
> -Added the user early on such that support for get_color_config()
> can be added platform by platform incrementally [Jani]
>
> Signed-off-by: Swati Sharma
On Wed, Apr 17, 2019 at 07:33:25PM +0530, Swati Sharma wrote:
> v4: -No need to initialize *blob [Jani]
> -Removed right shifts [Jani]
> -Dropped dev local var [Jani]
>
> Signed-off-by: Swati Sharma
> ---
> drivers/gpu/drm/i915/i915_reg.h| 3 +++
> drivers/gpu/drm/i915/intel_color.c
On Tue, Apr 23, 2019 at 12:40:10PM +0300, Jani Nikula wrote:
>
> I'll want two things:
>
> * Explicit ack from Rodrigo too
Acked-by: Rodrigo Vivi
(sorry for being late here)
>
> * The dependencies merged first, and this one posted as a single
> patch. I really want this to stand out bette
On Tue, 2019-04-23 at 17:34 +0300, Ville Syrjälä wrote:
> On Mon, Apr 22, 2019 at 06:37:48PM +, Sripada, Radhakrishna
> wrote:
> > On Wed, 2019-04-10 at 20:08 +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Before we go writing the infoframe let's make sure we have
> > > the
On Fri, Apr 19, 2019 at 06:13:53PM +0100, Chris Wilson wrote:
> While we talk to the punit over its sideband, we need to prevent the cpu
> from sleeping in order to prevent a potential machine hang.
>
> Note that by itself, it appears that pm_qos_update_request (via
> intel_idle) doesn't provide a
On Fri, Apr 19, 2019 at 06:13:54PM +0100, Chris Wilson wrote:
> As we now employ a very heavy pm_qos around the punit access, we want to
> minimise the number of synchronous requests by performing one for the
> whole punit sequence rather than around individual accesses. The
> sideband lock is used
== Series Details ==
Series: Enable Transcoder Port Sync feature for Tiled displays
URL : https://patchwork.freedesktop.org/series/59837/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5971 -> Patchwork_12855
Summary
---
On Fri, Apr 19, 2019 at 06:13:55PM +0100, Chris Wilson wrote:
> Lift the sideband acquisition for vlv_punit_read and vlv_punit_write
> into their callers, so that we can lock the sideband once for a sequence
> of operations, rather than perform the heavyweight acquisition on each
> request.
>
> Si
On Fri, Apr 19, 2019 at 06:13:56PM +0100, Chris Wilson wrote:
> Valleyview and Cherryview update the GPU frequency via the punit, which
> is very expensive as we have to ensure the cores do not sleep during the
> comms. If we perform frequent RPS evaluations, the frequent punit
> requests cause mea
On Fri, Apr 19, 2019 at 06:13:59PM +0100, Chris Wilson wrote:
> Split the sideback declarations out of the ginormous i915_drv.h
Ah, it was here all along :)
Reviewed-by: Ville Syrjälä
>
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/Makefile.header-test | 1 +
> drivers/gpu/drm
On Fri, Apr 19, 2019 at 06:14:02PM +0100, Chris Wilson wrote:
> sandybride_pcode is another sideband, so move it to their new home.
Close enough.
Reviewed-by: Ville Syrjälä
>
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/i915_drv.h | 10 --
> drivers/gpu/drm/i915/intel_hd
On Fri, Apr 19, 2019 at 06:14:00PM +0100, Chris Wilson wrote:
> Since intel_sideband_read and intel_sideband_write differ by only a
> couple of lines (depending on whether we feed the value in or out),
> merge the two into a single common accessor.
>
> v2: Restore vlv_flisdsi_read() lost during re
On Tue, 16 Apr 2019 16:56:26 +0100
Chris Wilson wrote:
> Quoting Bob Paauwe (2019-04-16 00:05:26)
> > There are real-time use cases where having deterministic CPU processes
> > can be more important than GPU power/performance. Parking the GPU at a
> > specific freqency by setting idle, min and ma
On Wed, Apr 17, 2019 at 11:59:01AM -0700, Radhakrishna Sripada wrote:
> Fixes the clock-gating issue when pipe scaling is enabled.
> (Lineage #2006604312)
>
> V2: Fix typo in headline(Chris)
> Handle the non double buffered nature of the register(Ville)
> V3: Fix checkpatch warning. BAT failur
set bit5 (Headerless Message for Pre-emptable Contexts) in SAMPLER_MODE
register while initializing render ring to enable support for headerless
messages for preemptable GPGPU contexts on Gen11.
Signed-off-by: Dongwon Kim
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_lr
== Series Details ==
Series: series starting with [1/3] lib/igt_dummyload: Introduce igt_spin_reset
(rev2)
URL : https://patchwork.freedesktop.org/series/59830/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5971_full -> IGTPW_2906_full
== Series Details ==
Series: drm/i915/gen11: enable support for headerless msgs
URL : https://patchwork.freedesktop.org/series/59839/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2f58a29e79fd drm/i915/gen11: enable support for headerless msgs
-:8: WARNING:TYPO_SPELLING: 'preem
== Series Details ==
Series: drm/i915/gen11: enable support for headerless msgs
URL : https://patchwork.freedesktop.org/series/59839/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5973 -> Patchwork_12856
Summary
---
Quoting Dongwon Kim (2019-04-23 20:05:03)
> set bit5 (Headerless Message for Pre-emptable Contexts) in SAMPLER_MODE
> register while initializing render ring to enable support for headerless
> messages for preemptable GPGPU contexts on Gen11.
See icl_ctx_workarounds_init() and explain why we must
== Series Details ==
Series: drm/fb-helper: Move modesetting code to drm_client (rev4)
URL : https://patchwork.freedesktop.org/series/58597/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5971_full -> Patchwork_12854_full
Su
== Series Details ==
Series: drm/i915/gen11: enable support for headerless msgs
URL : https://patchwork.freedesktop.org/series/59839/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5973_full -> Patchwork_12856_full
Summary
-
On Wed, 17 Apr 2019 16:06:11 +0300
Ville Syrjälä wrote:
Hi Ville,
> On Thu, Apr 11, 2019 at 04:36:00PM -0700, Vivek Kasireddy wrote:
> > This patch adds support for DPLL4 on EHL that include the
> > following restrictions:
> >
> > - DPLL4 cannot be used with DDIA (combo port A internal eDP usage
This patch broke userspace. I'm reverting it.
I know userspace was broken, but since it's a userspace lots of people
are using we shouldn't break it.
We either need to add this as a config option that we can let people
pick the breakage, or detect broken userspace somehow and magic around
it.
Bu
Hey Linus,
We interrupt your regularly scheduled drm fixes for a regression special.
The first is for a fix in i915 that had unexpected side effects
fallout in the userspace X.org modesetting driver where X would no
longer start. I got tired of the nitpicking and issued a large hammer
on it. The
From: John Harrison
With virtual engines, it is no longer possible to know which specific
physical engine a given request will be executed on at the time that
request is generated. This means that the request itself must be engine
agnostic - any direct register writes must be relative to the engi
== Series Details ==
Series: drm/i915: Engine relative MMIO (rev4)
URL : https://patchwork.freedesktop.org/series/57117/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f8a1f0afe196 drm/i915: Engine relative MMIO
-:92: ERROR:SPACING: space prohibited after that open parenthesis '
== Series Details ==
Series: drm/i915: Engine relative MMIO (rev4)
URL : https://patchwork.freedesktop.org/series/57117/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5979 -> Patchwork_12857
Summary
---
**SUCCESS**
== Series Details ==
Series: drm/i915: Engine relative MMIO (rev4)
URL : https://patchwork.freedesktop.org/series/57117/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5979_full -> Patchwork_12857_full
Summary
---
**S
On Wed, Apr 24, 2019 at 3:21 AM Dave Airlie wrote:
>
> Hey Linus,
>
> We interrupt your regularly scheduled drm fixes for a regression special.
>
> The first is for a fix in i915 that had unexpected side effects
> fallout in the userspace X.org modesetting driver where X would no
> longer start. I
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