On 29/01/2019 18:57, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-01-28 13:47:02)
On 28/01/2019 11:23, Chris Wilson wrote:
Check that we are allowed to reset the GPU prior to execution.
v2: Push the require checking up into a subgroup
Signed-off-by: Chris Wilson
---
tests/i915/gem_w
On 29/01/2019 17:02, Chris Wilson wrote:
On unwinding the active request we give it a small (limited to internal
priority levels) boost to prevent it from being gazumped a second time.
However, this means that it can be promoted to above the request that
triggered the preemption request, causing
On Tue, 29 Jan 2019, Lucas De Marchi wrote:
> On Tue, Jan 29, 2019 at 2:39 PM Stephen Rothwell
> wrote:
>>
>> Hi all,
>>
>> After merging the drm-intel-fixes tree, today's linux-next build (x86_64
>> allmodconfig) failed like this:
>>
>> drivers/gpu/drm/i915/intel_display.c: In function 'has_bog
Quoting Tvrtko Ursulin (2019-01-30 08:15:56)
>
> On 29/01/2019 17:02, Chris Wilson wrote:
> > On unwinding the active request we give it a small (limited to internal
> > priority levels) boost to prevent it from being gazumped a second time.
> > However, this means that it can be promoted to above
Quoting Patchwork (2019-01-30 07:32:25)
> Possible fixes
>
> * igt@gem_mmap_gtt@hang:
> - shard-kbl: FAIL [fdo#109469] -> PASS
> - shard-hsw: FAIL [fdo#109469] -> PASS
> - shard-snb: FAIL [fdo#109469] -> PASS
> - shard-glk: FAIL [fdo#
From: Tvrtko Ursulin
Timeline barrier allows serialization between different timelines.
After calling i915_timeline_set_barrier with a request, all following
submissions on this timeline will be set up as depending on this request,
or barrier. Once the barrier has been completed it automatically
From: Tvrtko Ursulin
Exercise the context image reconfiguration logic for idle and busy
contexts, with the resets thrown into the mix as well.
Free from the uAPI restrictions this test runs on all Gen9+ platforms
with slice power gating.
v2:
* Rename some helpers for clarity.
* Include subtes
From: Tvrtko Ursulin
Changes since last version:
* Rebase for drm-tip changes.
Test-with: 20190117110122.9509-1-tvrtko.ursu...@linux.intel.com
Lionel Landwerlin (2):
drm/i915: Record the sseu configuration per-context & engine
drm/i915/perf: lock powergating configuration to default when a
From: Tvrtko Ursulin
We want to allow userspace to reconfigure the subslice configuration on a
per context basis.
This is required for the functional requirement of shutting down non-VME
enabled sub-slices on Gen11 parts.
To do so, we expose a context parameter to allow adjustment of the RPCS
r
From: Lionel Landwerlin
If some of the contexts submitting workloads to the GPU have been
configured to shutdown slices/subslices, we might loose the NOA
configurations written in the NOA muxes.
One possible solution to this problem is to reprogram the NOA muxes
when we switch to a new context.
From: Lionel Landwerlin
We want to expose the ability to reconfigure the slices, subslice and
eu per context and per engine. To facilitate that, store the current
configuration on the context for each engine, which is initially set
to the device default upon creation.
v2: record sseu configurati
Quoting Tvrtko Ursulin (2019-01-30 09:34:12)
> diff --git a/drivers/gpu/drm/i915/i915_request.h
> b/drivers/gpu/drm/i915/i915_request.h
> index 3cffb96203b9..ecef6256dd24 100644
> --- a/drivers/gpu/drm/i915/i915_request.h
> +++ b/drivers/gpu/drm/i915/i915_request.h
> @@ -38,6 +38,16 @@ struct drm_
Quoting Tvrtko Ursulin (2019-01-30 09:34:15)
> + rq = i915_request_alloc(engine, i915->kernel_context);
> + if (IS_ERR(rq)) {
> + ret = PTR_ERR(rq);
> + goto out_put;
> + }
> +
> + /* Queue this switch after all other activity by this context. */
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev21)
URL : https://patchwork.freedesktop.org/series/48194/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
beb042dcd7ba drm/i915: Record the sseu configuration per-context & engine
b36f3c5a7fcc drm/i915/p
Quoting Tvrtko Ursulin (2019-01-30 08:11:05)
>
> On 29/01/2019 18:57, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-01-28 13:47:02)
> >>
> >> On 28/01/2019 11:23, Chris Wilson wrote:
> >>> Check that we are allowed to reset the GPU prior to execution.
> >>>
> >>> v2: Push the require checki
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev21)
URL : https://patchwork.freedesktop.org/series/48194/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Record the sseu configuration per-context & engine
-drivers/
On Fri, Jan 18, 2019 at 07:11:06PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> v2: Leave the stride alone for buffers that look to be for the cursor
> ---
> drivers/gpu/drm/i915/i915_gem.c | 7 ++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i
We may use HW semaphores to schedule nearly-ready work such that they
are already spinning on the GPU waiting for the completion on another
engine. However, we don't want for that spinning task to actually block
any real work should it be scheduled.
Signed-off-by: Chris Wilson
---
tests/i915/gem
Skip trying to stop unused fork helpers to avoid the various asserts
that they were running and didn't die early.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109468
Signed-off-by: Chris Wilson
---
lib/igt_core.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/lib/igt_core.c b/l
Present the latency results in nanoseconds not RCS cycles.
Signed-off-by: Chris Wilson
---
tests/i915/gem_exec_latency.c | 36 ---
1 file changed, 33 insertions(+), 3 deletions(-)
diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index de
The first dispatch incurs the cost of waking up the device, so also
measure after issuing a spinner to keep the device awake as we submit.
Signed-off-by: Chris Wilson
---
tests/i915/gem_exec_latency.c | 19 +--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/tests/
Check that we are allowed to hang/reset the GPU before we actually do so
for the first time.
Signed-off-by: Chris Wilson
---
tests/i915/gem_eio.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index 5250a414c..09059c311 100
To make the demonstration of the cheeky preemption more impactful, make
the second context a nop to contrast the first being 1024
MI_STORE_DWORD_IMM. Then if we execute and wait on the second context
before executing the first, the client latency is even more drastically
reduced.
To more clearly s
This pair, gem_exec_nop/{series,parallel}, are very light stress tests
of which we already perform the same sequence inside
i915_selftests/live_requests. We keep basic uABI coverage (i.e. plain
old gem_execbuf) via the likes of gem_exec_basic and gem_exec_reloc so
all gem_exec_nop adds are nefariou
On 30/01/2019 09:40, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-01-30 09:34:12)
diff --git a/drivers/gpu/drm/i915/i915_request.h
b/drivers/gpu/drm/i915/i915_request.h
index 3cffb96203b9..ecef6256dd24 100644
--- a/drivers/gpu/drm/i915/i915_request.h
+++ b/drivers/gpu/drm/i915/i915_request
In order to correctly serialise the order of execution between rings, we
need to flag the scratch address as being written. Make it so.
Signed-off-by: Chris Wilson
---
tests/i915/gem_exec_nop.c | 152 +-
1 file changed, 133 insertions(+), 19 deletions(-)
diff
Op 29-01-2019 om 19:50 schreef Uma Shankar:
> This patch attaches the colorspace connector property to the
> hdmi connector. Based on colorspace change, modeset will be
> triggered to switch to new colorspace.
>
> Based on colorspace property value create an infoframe
> with appropriate colorspace.
On Thu, Jan 24, 2019 at 09:31:01PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> v2: Rebase due to can_remap()
> ---
> drivers/gpu/drm/i915/intel_display.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_di
On Thu, Jan 24, 2019 at 08:59:36PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> With gtt remapping plugged in we can simply raise the stride
> limit on gen4+. Let's just pick the limit to match the render
> engine max stride (256KiB).
>
> No remapping CCS because the virtual address of
On 30/01/2019 09:45, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-01-30 09:34:15)
+ rq = i915_request_alloc(engine, i915->kernel_context);
+ if (IS_ERR(rq)) {
+ ret = PTR_ERR(rq);
+ goto out_put;
+ }
+
+ /* Queue this switch after all othe
Quoting Daniel Vetter (2019-01-30 09:58:56)
> On Thu, Jan 24, 2019 at 08:59:36PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > With gtt remapping plugged in we can simply raise the stride
> > limit on gen4+. Let's just pick the limit to match the render
> > engine max stride (256KiB
On Fri, Jan 18, 2019 at 05:27:18PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> With gtt remapping in place we can use arbitrarily large
> framebuffers. Let's bump the limits to 16kx16k on gen7+.
> The limit was chosen to match the maximum 2D surface size
> of the 3D engine.
>
> With th
On Wed, Jan 30, 2019 at 10:54:15AM +0100, Daniel Vetter wrote:
> On Fri, Jan 18, 2019 at 07:11:06PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > v2: Leave the stride alone for buffers that look to be for the cursor
> > ---
> > drivers/gpu/drm/i915/i915_gem.c | 7 ++-
> > 1 fil
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev21)
URL : https://patchwork.freedesktop.org/series/48194/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5507 -> Patchwork_12084
Summary
---
From: Lionel Landwerlin
We want to expose the ability to reconfigure the slices, subslice and
eu per context and per engine. To facilitate that, store the current
configuration on the context for each engine, which is initially set
to the device default upon creation.
v2: record sseu configurati
From: Tvrtko Ursulin
We want to allow userspace to reconfigure the subslice configuration on a
per context basis.
This is required for the functional requirement of shutting down non-VME
enabled sub-slices on Gen11 parts.
To do so, we expose a context parameter to allow adjustment of the RPCS
r
amdgpu only uses shared-fences internally, but dmabuf importers rely on
implicit write hazard tracking via the reservation_object.fence_excl.
For example, the importer use the write hazard for timing a page flip to
only occur after the exporter has finished flushing its write into the
surface. As s
On Wed, Dec 19, 2018 at 7:54 PM Daniel Vetter wrote:
>
> On Wed, Oct 24, 2018 at 03:28:16PM -0700, Manasi Navare wrote:
> > This patch adds inline functions and helpers for obtaining
> > DP sink's supported DSC parameters like DSC sink support,
> > eDP compressed BPP supported, maximum slice count
Chris Wilson writes:
> Skip trying to stop unused fork helpers to avoid the various asserts
> that they were running and didn't die early.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109468
> Signed-off-by: Chris Wilson
> ---
> lib/igt_core.c | 3 +++
> 1 file changed, 3 insertio
Chris Wilson writes:
> Check that we are allowed to hang/reset the GPU before we actually do so
> for the first time.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
> ---
> tests/i915/gem_eio.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/tests
Chris Wilson writes:
> This pair, gem_exec_nop/{series,parallel}, are very light stress tests
> of which we already perform the same sequence inside
> i915_selftests/live_requests. We keep basic uABI coverage (i.e. plain
> old gem_execbuf) via the likes of gem_exec_basic and gem_exec_reloc so
> a
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev23)
URL : https://patchwork.freedesktop.org/series/48194/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c605fb548963 drm/i915: Record the sseu configuration per-context & engine
57429719d90c drm/i915/p
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev23)
URL : https://patchwork.freedesktop.org/series/48194/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Record the sseu configuration per-context & engine
-drivers/
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev21)
URL : https://patchwork.freedesktop.org/series/48194/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5507_full -> Patchwork_12084_full
Summary
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev23)
URL : https://patchwork.freedesktop.org/series/48194/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5508 -> Patchwork_12085
Summary
---
== Series Details ==
Series: drm/amdgpu: Transfer fences to dmabuf importer (rev7)
URL : https://patchwork.freedesktop.org/series/47803/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3aaa20918d5d drm/amdgpu: Transfer fences to dmabuf importer
-:28: WARNING:COMMIT_LOG_LONG_LINE:
Am 30.01.19 um 11:55 schrieb Chris Wilson:
amdgpu only uses shared-fences internally, but dmabuf importers rely on
implicit write hazard tracking via the reservation_object.fence_excl.
For example, the importer use the write hazard for timing a page flip to
only occur after the exporter has finis
On 30/01/2019 02:18, Chris Wilson wrote:
We currently track GPU memory usage inside VMA, such that we never
release memory used by the GPU until after it has finished accessing it.
However, we may want to track other resources aside from VMA, or we may
want to split a VMA into multiple independe
Quoting Tvrtko Ursulin (2019-01-30 12:02:02)
>
> On 30/01/2019 02:18, Chris Wilson wrote:
> > +struct active_node {
> > + struct i915_gem_active base;
> > + struct i915_active *ref;
> > + struct rb_node node;
> > + u64 timeline;
> > +};
> > +
> > +static void
> > +__active_retire(s
>-Original Message-
>From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
>Maarten Lankhorst
>Sent: Wednesday, January 30, 2019 3:27 PM
>To: Shankar, Uma ; intel-gfx@lists.freedesktop.org;
>dri-de...@lists.freedesktop.org
>Cc: emil.l.veli...@gmail.com; Syrjala, Vi
This patch series creates a new connector property to program
colorspace to sink devices. Modern sink devices support more
than 1 type of colorspace like 601, 709, BT2020 etc. This helps
to switch based on content type which is to be displayed. The
decision lies with compositors as to in which scen
Create a new connector property to program colorspace to sink
devices. Modern sink devices support more than 1 type of
colorspace like 601, 709, BT2020 etc. This helps to switch
based on content type which is to be displayed. The decision
lies with compositors as to in which scenarios, a particular
This patch adds a DP colorspace property, enabling
userspace to switch to various supported colorspaces.
This will help enable BT2020 along with other colorspaces.
v2: Addressed Maarten and Ville's review comments. Enhanced
the colorspace enum to incorporate both HDMI and DP supported
colo
This patch attaches the colorspace connector property to the
hdmi connector. Based on colorspace change, modeset will be
triggered to switch to new colorspace.
Based on colorspace property value create an infoframe
with appropriate colorspace. This can be used to send an
infoframe packet with prop
On 29.1.2019 14.57, Gwan-gyeong Mun wrote:
Enabling FBC on a plane which has a combination of a 180-degree rotation
with having a Height that isn't divisible by 4 causes FIFO underrun,
so disable FBC on such a config.
Testcase: igt/kms_rotation_crc/multiplane-rotation-cropping-top
Bugzilla: http
== Series Details ==
Series: drm/amdgpu: Transfer fences to dmabuf importer (rev7)
URL : https://patchwork.freedesktop.org/series/47803/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5508 -> Patchwork_12086
Summary
---
== Series Details ==
Series: Add Colorspace connector property interface (rev10)
URL : https://patchwork.freedesktop.org/series/47132/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
9a1100d27d47 drm: Add HDMI colorspace property
a82fbbf3881e drm: Add DP colorspace property
-:64:
== Series Details ==
Series: Add Colorspace connector property interface (rev10)
URL : https://patchwork.freedesktop.org/series/47132/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5508 -> Patchwork_12087
Summary
---
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev24)
URL : https://patchwork.freedesktop.org/series/48194/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c78c976dba74 drm/i915: Record the sseu configuration per-context & engine
98f995c1bda2 drm/i915/p
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev24)
URL : https://patchwork.freedesktop.org/series/48194/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Record the sseu configuration per-context & engine
-drivers/
Actually measure how many batches we can fit into a ring before
blocking, or else we may end up hanging the device earlier than
expected!
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
tests/i915/gem_eio.c | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev24)
URL : https://patchwork.freedesktop.org/series/48194/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5508 -> Patchwork_12088
Summary
---
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev25)
URL : https://patchwork.freedesktop.org/series/48194/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
88b4cab9b547 drm/i915: Record the sseu configuration per-context & engine
93d18cca695c drm/i915/p
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev25)
URL : https://patchwork.freedesktop.org/series/48194/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Record the sseu configuration per-context & engine
-drivers/
Chris Wilson writes:
> Actually measure how many batches we can fit into a ring before
> blocking, or else we may end up hanging the device earlier than
> expected!
>
> Signed-off-by: Chris Wilson
> Cc: Mika Kuoppala
> ---
> tests/i915/gem_eio.c | 19 +++
> 1 file changed, 15 i
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev25)
URL : https://patchwork.freedesktop.org/series/48194/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5508 -> Patchwork_12089
Summary
---
Quoting Mika Kuoppala (2019-01-30 14:13:57)
> Chris Wilson writes:
>
> > Actually measure how many batches we can fit into a ring before
> > blocking, or else we may end up hanging the device earlier than
> > expected!
> >
> > Signed-off-by: Chris Wilson
> > Cc: Mika Kuoppala
> > ---
> > tests
Actually measure how many batches we can fit into a ring before
blocking, or else we may end up hanging the device earlier than
expected!
v2: Mostly conservative.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109014
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
tests/i915/gem_eio.
On Tue, Jan 29, 2019 at 03:54:30PM -0800, Matt Roper wrote:
> On Fri, Dec 21, 2018 at 07:14:29PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > I thought we could remove all the early latency==0 checks
> > and rely on skl_wm_method{1,2}() checking for it. But
> > skl_compute_plane_wm
Chris Wilson writes:
> Actually measure how many batches we can fit into a ring before
> blocking, or else we may end up hanging the device earlier than
> expected!
>
> v2: Mostly conservative.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109014
> Signed-off-by: Chris Wilson
> Cc:
When declaring the GPU wedged, we do need to hit the GPU with the reset
hammer so that its state matches our presumed state during cleanup. If
the reset fails, it fails, and we may be unhappy but wedged. However, if
we are testing our wedge/unwedged handling, the desync carries over into
the next t
On Tue, Jan 29, 2019 at 04:49:28PM -0800, Matt Roper wrote:
> Use of the new DRM_COLOR_LUT_NON_DECREASING test was a bit over-zealous;
> it doesn't actually need to be applied to the degamma on "bdw-style"
> platforms. Likewise, we overlooked the fact that CHV should have that
> test applied to th
Previously, we were able to rely on the recursive properties of
struct_mutex to allow us to serialise revoking mmaps and reacquiring the
FENCE registers with them being clobbered over a global device reset.
I then proceeded to throw out the baby with the bath water in order to
pursue a struct_mutex
On Wed, Jan 30, 2019 at 10:01:04AM +, Chris Wilson wrote:
> Quoting Daniel Vetter (2019-01-30 09:58:56)
> > On Thu, Jan 24, 2019 at 08:59:36PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > With gtt remapping plugged in we can simply raise the stride
> > > limit on gen4+. L
On Wed, Jan 30, 2019 at 11:01:50AM +0100, Daniel Vetter wrote:
> On Fri, Jan 18, 2019 at 05:27:18PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > With gtt remapping in place we can use arbitrarily large
> > framebuffers. Let's bump the limits to 16kx16k on gen7+.
> > The limit was c
== Series Details ==
Series: drm/amdgpu: Transfer fences to dmabuf importer (rev7)
URL : https://patchwork.freedesktop.org/series/47803/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5508_full -> Patchwork_12086_full
Summar
On Wed, Jan 30, 2019 at 11:06:07AM +0100, Daniel Vetter wrote:
> On Wed, Jan 30, 2019 at 10:54:15AM +0100, Daniel Vetter wrote:
> > On Fri, Jan 18, 2019 at 07:11:06PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > v2: Leave the stride alone for buffers that look to be for the c
From: Ville Syrjälä
The code managing the dbuf slices is borked and needs some
real work to fix. In the meantime let's just stop using the
second slice.
v2: Drop the change to intel_enabled_dbuf_slices_num() (Mahesh)
Cc: Mahesh Kumar
Reviewed-by: Imre Deak #v1
Signed-off-by: Ville Syrjälä
--
Hi,
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag,
fixing commit: 0e32b39ceed6 drm/i915: add DP 1.2 MST support (v0.7).
The bot has tested the following trees: v4.20.5, v4.19.18, v4.14.96, v4.9.153,
v4.4.172, v3.18.133.
v4.20.5: Build OK!
v4.19.
Hi,
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag,
fixing commit: 0e32b39ceed6 drm/i915: add DP 1.2 MST support (v0.7).
The bot has tested the following trees: v4.20.5, v4.19.18, v4.14.96, v4.9.153,
v4.4.172, v3.18.133.
v4.20.5: Build OK!
v4.19.
== Series Details ==
Series: Add Colorspace connector property interface (rev10)
URL : https://patchwork.freedesktop.org/series/47132/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5508_full -> Patchwork_12087_full
Summary
Hi,
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag,
fixing commit: 0e32b39ceed6 drm/i915: add DP 1.2 MST support (v0.7).
The bot has tested the following trees: v4.20.5, v4.19.18, v4.14.96, v4.9.153,
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v4.19.
On 30/01/2019 02:19, Chris Wilson wrote:
Wrap the active tracking for a GPU references in a slabcache for faster
allocations, and keep track of inflight nodes so we can reap the
stale entries upon parking (thereby trimming our memory usage).
I suggest a two staged approach. First patch add a s
== Series Details ==
Series: series starting with [1/2] drm/i915: Revoke mmaps and prevent access to
fence registers across reset
URL : https://patchwork.freedesktop.org/series/55988/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Revoke mma
Quoting Tvrtko Ursulin (2019-01-30 15:57:06)
>
> On 30/01/2019 02:19, Chris Wilson wrote:
> > Wrap the active tracking for a GPU references in a slabcache for faster
> > allocations, and keep track of inflight nodes so we can reap the
> > stale entries upon parking (thereby trimming our memory usa
On 30/01/2019 02:19, Chris Wilson wrote:
Looking forward, we need to break the struct_mutex dependency on
i915_gem_active. In the meantime, external use of i915_gem_active is
quite beguiling, little do new users suspect that it implies a barrier
as each request it tracks must be ordered wrt the
igt doesn't handle skipping from inside igt_fork very gracefully and
crashes instead of reporting the lack of requirements. One solution
would be to fix igt, but far easier is to just move the requirement
checking around to do it before we even fork.
Bugzilla: https://bugs.freedesktop.org/show_bug
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev26)
URL : https://patchwork.freedesktop.org/series/48194/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
bb469f319d41 drm/i915: Record the sseu configuration per-context & engine
9219b8ba7eb9 drm/i915/p
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev26)
URL : https://patchwork.freedesktop.org/series/48194/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Record the sseu configuration per-context & engine
-drivers/
== Series Details ==
Series: series starting with [1/2] drm/i915: Revoke mmaps and prevent access to
fence registers across reset
URL : https://patchwork.freedesktop.org/series/55988/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5509 -> Patchwork_12090
==
Wrap the active tracking for a GPU references in a slabcache for faster
allocations, and keep track of inflight nodes so we can reap the
stale entries upon idling (thereby trimming our memory usage).
v2: Automatically discard the trees everytime the tracker idles; they
should be rarely used and fa
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev26)
URL : https://patchwork.freedesktop.org/series/48194/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5509 -> Patchwork_12091
Summary
---
Quoting Chris Wilson (2019-01-30 16:37:30)
> @@ -20,8 +22,13 @@ static void
> __active_retire(struct i915_active *ref)
> {
> GEM_BUG_ON(!ref->count);
> - if (!--ref->count)
> - ref->retire(ref);
> + if (--ref->count)
> + return;
> +
> + /* ret
Wrap the active tracking for a GPU references in a slabcache for faster
allocations, and keep track of inflight nodes so we can reap the
stale entries upon idling (thereby trimming our memory usage).
v2: Automatically discard the trees everytime the tracker idles; they
should be rarely used and fa
On 30/01/2019 02:19, Chris Wilson wrote:
In preparation for enabling HW semaphores, we need to keep in flight
timeline HWSP alive until the entire system is idle, as any other
timeline active on the GPU may still refer back to the already retired
timeline. We both have to delay recycling availab
== Series Details ==
Series: drm/i915: Don't use the second dbuf slice on icl (rev2)
URL : https://patchwork.freedesktop.org/series/55517/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4c2c8d99954e drm/i915: Don't use the second dbuf slice on icl
-:34: CHECK:CAMELCASE: Avoid Ca
On 30/01/2019 02:19, Chris Wilson wrote:
In the next patch, we add another user that wants to check whether
requests can be merge into a single HW execution, and in the future we
want to add more conditions under which requests from the same context
cannot be merge. In preparation, extract out c
On Wed, Jan 30, 2019 at 12:06:45PM +0100, Daniel Vetter wrote:
> On Wed, Dec 19, 2018 at 7:54 PM Daniel Vetter wrote:
> >
> > On Wed, Oct 24, 2018 at 03:28:16PM -0700, Manasi Navare wrote:
> > > This patch adds inline functions and helpers for obtaining
> > > DP sink's supported DSC parameters lik
Use of the new DRM_COLOR_LUT_NON_DECREASING test was a bit over-zealous;
it doesn't actually need to be applied to the degamma on "bdw-style"
platforms. Likewise, we overlooked the fact that CHV should have that
test applied to the gamma LUT as well as the degamma LUT.
Rather than adding more com
From: Ville Syrjälä
commit 5b0bd14dcc6b ("drm/i915/icl: keep track of unused pll while
looping") inadvertently (I presume) changed the code to pick the
last unused dpll rather than the first unused one like we did before.
While there should most likely be no harm in changing the order
let's chan
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