From: Ville Syrjälä
Decode the NAK reply fields to make it easier to parse the logs.
v2: s/STR/DP_STR/ to avoid conflict with some header stuff (0day)
Use drm_dp_mst_req_type_str() more (DK)
Signed-off-by: Ville Syrjälä
Reviewed-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/drm_dp_mst_topo
From: Ville Syrjälä
Make the code a bit easier to read by providing symbolic names
for the reply_type (ACK vs. NAK). Also clean up some brace stuff
while at it.
v2: s/DP_REPLY/DP_SIDEBAND_REPLY/ (DK)
Fix some checkpatch issues
Signed-off-by: Ville Syrjälä
Reviewed-by: Dhinakaran Pandiyan
In bringup on simulated HW even rudimentary tests are slow, and so many
may fail that we want to be able to filter out the noise to focus on the
specific problem. Even just the tests groups provided for igt is not
specific enough, and we would like to isolate one particular subtest
(and probably su
== Series Details ==
Series: series starting with [v2,1/2] drm/dp/mst: Provide defines for ACK vs.
NAK reply type
URL : https://patchwork.freedesktop.org/series/55581/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
84875e8bb29f drm/dp/mst: Provide defines for ACK vs. NAK reply
== Series Details ==
Series: series starting with [v2,1/2] drm/dp/mst: Provide defines for ACK vs.
NAK reply type
URL : https://patchwork.freedesktop.org/series/55581/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5465 -> Patchwork_12007
==
This patch adds one test to evaluate suspend/resume operations using kms_flip.
Signed-off-by: Shayenne Moura
v2: Reduce test time to 10 (Daniel)
---
tests/kms_flip.c | 1 +
1 file changed, 1 insertion(+)
mode change 100644 => 100755 tests/kms_flip.c
diff --git a/tests/kms_flip.c b/tests/kms_f
On Tue, Jan 22, 2019 at 08:39:53PM -, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [v2,1/2] drm/dp/mst: Provide defines for ACK vs.
> NAK reply type
> URL : https://patchwork.freedesktop.org/series/55581/
> State : failure
>
> == Summary ==
>
> CI Bug Log - cha
== Series Details ==
Series: drm/i915/selftests: Apply a subtest filter (rev3)
URL : https://patchwork.freedesktop.org/series/55576/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5465 -> Patchwork_12008
Summary
---
*
On Gen 11 platform, to enable resolutions like 5K@120 where
the pixel clock is greater than pipe pixel rate, we need to split it across
2 pipes and enable it using DSC and big joiner. In order to support this
dual pipe single port mode, we need to link two crtcs involved in this
ganged mode.
This
== Series Details ==
Series: drm/i915/dp: Preliminary support for 2 pipe 1 port mode for 5K@120
URL : https://patchwork.freedesktop.org/series/55586/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7cdae1834120 drm/i915/dp: Preliminary support for 2 pipe 1 port mode for 5K@120
-:
On Tue, Jan 22, 2019 at 6:32 AM Chris Wilson wrote:
>
> Quoting Lucas De Marchi (2019-01-22 05:12:24)
> > Let's use a macro to make tables smaller and at the same time allow us
> > to add fields that apply to all entries in future.
> >
> > For the sake of readability, I'm calling an exception on 8
Quoting Lucas De Marchi (2019-01-22 21:33:25)
> On Tue, Jan 22, 2019 at 6:32 AM Chris Wilson wrote:
> >
> > Quoting Lucas De Marchi (2019-01-22 05:12:24)
> > > Let's use a macro to make tables smaller and at the same time allow us
> > > to add fields that apply to all entries in future.
> > >
> >
== Series Details ==
Series: drm/i915/dp: Preliminary support for 2 pipe 1 port mode for 5K@120
URL : https://patchwork.freedesktop.org/series/55586/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5465 -> Patchwork_12009
Sum
On 1/21/2019 14:20, Chris Wilson wrote:
In order to avoid preempting ourselves, we currently refuse to schedule
the tasklet if we reschedule an inflight context. However, this glosses
over a few issues such as what happens after a CS completion event and
we then preempt the newly executing contex
On 1/21/2019 14:20, Chris Wilson wrote:
In preparation for the next few commits, make resetting the GPU atomic.
Currently, we have prepared gen6+ for atomic resetting of individual
engines, but now there is a requirement to perform the whole device
level reset (just the register poking) from insi
On 1/21/2019 14:20, Chris Wilson wrote:
The guc (and huc) currently inexcruitably depend on struct_mutex for
device reinitialisation from inside the reset, and indeed taking any
mutex here is verboten (as we must be able to reset from underneath any
of our mutexes). That makes recovering the guc
Quoting John Harrison (2019-01-22 22:19:04)
> On 1/21/2019 14:20, Chris Wilson wrote:
> > In preparation for the next few commits, make resetting the GPU atomic.
> > Currently, we have prepared gen6+ for atomic resetting of individual
> > engines, but now there is a requirement to perform the whole
Quoting John Harrison (2019-01-22 22:18:46)
> On 1/21/2019 14:20, Chris Wilson wrote:
> > In order to avoid preempting ourselves, we currently refuse to schedule
> > the tasklet if we reschedule an inflight context. However, this glosses
> > over a few issues such as what happens after a CS complet
On Wed, 2019-01-16 at 15:43 -0800, José Roberto de Souza wrote:
> If the sink and source supports HBR3, TP4 should be used as link
> training pattern.
> For PSR2 there is no register to set and enable TP4 but according to
> eDP spec TP3 is still a training pattern acceptable for HBR3 panels.
>
Sou
On Wed, 2019-01-16 at 15:43 -0800, José Roberto de Souza wrote:
> A new field with the training pattern(TP) wakeup time for PSR2 was
These values are for PSR1, aren't they? Like you write in Patch 4/4,
the PSR2 control register does not have a bit to set anything other
than Tp2.
-DK
> added to V
== Series Details ==
Series: drm/i915/selftests: Apply a subtest filter (rev3)
URL : https://patchwork.freedesktop.org/series/55576/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5465_full -> Patchwork_12008_full
Summary
--
Quoting Chris Wilson (2019-01-21 22:21:16)
> We don't want to busywait on the GPU if we have other work to do. If we
> give non-busywaiting workloads higher (initial) priority than workloads
> that require a busywait, we will prioritise work that is ready to run
> immediately.
Fwiw, without preemp
On Fri, 2019-01-18 at 22:23 +, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [v4,1/4] drm/i915/psr: Allow PSR2 to be
> enabled when debugfs asks (rev2)
> URL : https://patchwork.freedesktop.org/series/55379/
> State : success
IGT series that this patches was depen
== Series Details ==
Series: drm/i915/dp: Preliminary support for 2 pipe 1 port mode for 5K@120
URL : https://patchwork.freedesktop.org/series/55586/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5465_full -> Patchwork_12009_full
===
On 1/21/2019 14:20, Chris Wilson wrote:
Always perform the requested reset, even if we believe the engine is
idle. Presumably there was a reason the caller wanted the reset, and in
the near future we lose the easy tracking for whether the engine is
idle.
Signed-off-by: Chris Wilson
---
driver
We may use HW semaphores to schedule nearly-ready work such that they
are already spinning on the GPU waiting for the completion on another
engine. However, we don't want for that spinning task to actually block
any real work should it be scheduled.
Signed-off-by: Chris Wilson
---
tests/i915/gem
Quoting John Harrison (2019-01-23 01:18:36)
> On 1/21/2019 14:20, Chris Wilson wrote:
> > @@ -479,8 +477,6 @@ static int __igt_reset_engine(struct drm_i915_private
> > *i915, bool active)
> > break;
> > }
> >
> > -
On 1/21/2019 14:21, Chris Wilson wrote:
Supplement the per-engine HWSP with a per-timeline HWSP. That is a
per-request pointer through which we can check a local seqno,
abstracting away the presumption of a global seqno. In this first step,
we point each request back into the engine's HWSP so eve
When reading GEN11_GT_INTR_DWx closely after enabling the interrupts
in gen11_irq_postinstall, the returned value is garbage. This can
cause other parts of the setup code (e.g. gen11_reset_one_iir) to
think that there are interrupts to be cleared when there are none.
The garbage value is only seen
On 1/22/2019 6:32 PM, Daniele Ceraolo Spurio wrote:
When reading GEN11_GT_INTR_DWx closely after enabling the interrupts
in gen11_irq_postinstall, the returned value is garbage. This can
To clarify, this only happens (or at least I've only seen it) during
runtime_resume.
Daniele
cause ot
== Series Details ==
Series: drm/i915/icl: do a posting read after irq install
URL : https://patchwork.freedesktop.org/series/55598/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5468 -> Patchwork_12010
Summary
---
*
On 2019.01.21 11:51:41 +0200, Jani Nikula wrote:
> Mixed C99 and kernel types use is getting ugly. Prefer kernel types.
>
> sed -i 's/\buint\(8\|16\|32\|64\)_t\b/u\1/g'
>
> Signed-off-by: Jani Nikula
> ---
Looks good to me.
Acked-by: Zhenyu Wang
Will queue this up. Thanks!
> drivers/gpu/dr
== Series Details ==
Series: drm/i915/icl: do a posting read after irq install
URL : https://patchwork.freedesktop.org/series/55598/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5468_full -> Patchwork_12010_full
Summary
--
== Series Details ==
Series: drm/i915: correct the pitch check for NV12 framebuffer (rev3)
URL : https://patchwork.freedesktop.org/series/53928/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5468 -> Patchwork_12011
Summary
On Tue, 2019-01-22 at 21:09 +0200, Ville Syrjälä wrote:
> On Tue, Jan 22, 2019 at 08:09:40PM +0200, Jani Nikula wrote:
> > On Tue, 22 Jan 2019, Ville Syrjälä
> > wrote:
> > > On Tue, Jan 22, 2019 at 02:58:24PM +0200, Mika Kahola wrote:
> > > > Avoid divide by zero warning on static analysis.
> > >
This patch prevents division by zero htotal.
Signed-off-by: Tina Zhang
Cc: Adam Jackson
Cc: Dave Airlie
Cc: Daniel Vetter
---
drivers/gpu/drm/drm_modes.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index adce9a2
101 - 136 of 136 matches
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