On Thu, Dec 13, 2018 at 08:25:30PM -0500, Lyude Paul wrote:
> There's no reason we need this, it's just confusing looking.
>
> Signed-off-by: Lyude Paul
> Cc: Juston Li
> ---
> drivers/gpu/drm/drm_dp_mst_topology.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/dri
On Thu, Dec 13, 2018 at 08:25:31PM -0500, Lyude Paul wrote:
> There should be no functional changes here
Would be good to explain what you did refactor here, instead of me trying
to reconstruct it from the patch. Especially pre-coffee that helps :-)
>
> Signed-off-by: Lyude Paul
> Cc: Juston Li
On Thu, Dec 13, 2018 at 08:25:32PM -0500, Lyude Paul wrote:
> The current way of handling refcounting in the DP MST helpers is really
> confusing and probably just plain wrong because it's been hacked up many
> times over the years without anyone actually going over the code and
> seeing if things
On Thu, Dec 13, 2018 at 08:25:35PM -0500, Lyude Paul wrote:
> So that the ports stay around until we've destroyed the connectors, in
> order to ensure that we don't pass an invalid pointer to any MST helpers
> once we introduce the new MST VCPI helpers.
>
> Signed-off-by: Lyude Paul
> ---
> driv
On Thu, Dec 13, 2018 at 08:25:34PM -0500, Lyude Paul wrote:
> Up until now, freeing payloads on remote MST hubs that just had ports
> removed has almost never worked because we've been relying on port
> validation in order to stop us from accessing ports that have already
> been freed from memory,
On Thu, Dec 13, 2018 at 08:25:33PM -0500, Lyude Paul wrote:
> This has never actually worked, and isn't needed anyway: the driver's
> always going to try to deallocate VCPI when it tears down the display
> that the VCPI belongs to.
>
> Signed-off-by: Lyude Paul
Reviewed-by: Daniel Vetter
> ---
Hi,
On Thu, Dec 13, 2018 at 01:55:25PM -0800, Matt Roper wrote:
> Some hardware may place additional restrictions on the gamma/degamma
> curves described by our LUT properties. E.g., that a gamma curve never
> decreases or that the red/green/blue channels of a LUT's entries must be
> equal. Let'
On Thu, Dec 13, 2018 at 04:35:31PM +0100, Hans de Goede wrote:
> DSI LCD panels describe an initialization sequence in the Video BIOS
> Tables using so called MIPI sequences. One possible element in these
> sequences is a PMIC specific element of 15 bytes.
>
> Although this is not really an ACPI o
On Thu, Dec 13, 2018 at 04:35:32PM +0100, Hans de Goede wrote:
> Implement the exec_mipi_pmic_seq_element callback for the CHT Whiskey Cove
> PMIC.
>
> On some CHT devices this fixes the LCD panel not lighting up when it was
> not initialized by the GOP, because an external monitor was plugged in
Quoting Ankit Navik (2018-12-11 12:14:17)
> drm/i915: Context aware user agnostic EU/Slice/Sub-slice control within kernel
>
> Current GPU configuration code for i915 does not allow us to change
> EU/Slice/Sub-slice configuration dynamically. Its done only once while context
> is created.
>
> Whi
Hi,
On 14-12-18 10:49, Mika Westerberg wrote:
On Thu, Dec 13, 2018 at 04:35:32PM +0100, Hans de Goede wrote:
Implement the exec_mipi_pmic_seq_element callback for the CHT Whiskey Cove
PMIC.
On some CHT devices this fixes the LCD panel not lighting up when it was
not initialized by the GOP, bec
On Fri, Dec 14, 2018 at 11:48:35AM +0100, Hans de Goede wrote:
> > > +#include
> >
> > Why is this include needed?
>
> It is no longer needed in v4, since the parsing of the raw
> MIPI sequence data (which needed this include) has been moved
> to the i915 VBT code now.
>
> I've dropped this fro
Quoting Tvrtko Ursulin (2018-12-10 17:40:34)
>
> On 09/11/2018 17:18, Tomasz Lis wrote:
> > The patch adds support of preempt-to-idle requesting by setting a proper
> > bit within Execlist Control Register, and receiving preemption result from
> > Context Status Buffer.
> >
> > Preemption in prev
On Fri, Dec 14, 2018 at 12:05 PM Mika Westerberg
wrote:
>
> On Fri, Dec 14, 2018 at 11:48:35AM +0100, Hans de Goede wrote:
> > > > +#include
> > >
> > > Why is this include needed?
> >
> > It is no longer needed in v4, since the parsing of the raw
> > MIPI sequence data (which needed this include
Hi Joonas,
On Fri, Dec 14, 2018 at 3:57 PM Joonas Lahtinen
wrote:
>
> Quoting Ankit Navik (2018-12-11 12:14:17)
> > drm/i915: Context aware user agnostic EU/Slice/Sub-slice control
> > within kernel
> >
> > Current GPU configuration code for i915 does not allow us to change
> > EU/Slice/Sub-sl
Add support for PMIC MIPI sequences using the new
intel_soc_pmic_exec_mipi_pmic_seq_element function.
This fixes the DSI LCD panel not lighting up when not initialized by the
GOP (because an external monitor was connected) on GPD win and GPD pocket
devices.
Specifically the LCD panel seems to nee
Implement the exec_mipi_pmic_seq_element callback for the CHT Whiskey Cove
PMIC.
On some CHT devices this fixes the LCD panel not lighting up when it was
not initialized by the GOP, because an external monitor was plugged in and
the GOP initialized only the external monitor.
Reviewed-by: Mika Wes
Hi All,
The main reason for sending out this v5 is because the CI failed v4
(even though it liked v1-v3 and nothing significant changed), this
was likely a false positive, so the main goal of this version is to give
this another CI run.
Besides that I've dropped the unnecessary #include from the
DSI LCD panels describe an initialization sequence in the Video BIOS
Tables using so called MIPI sequences. One possible element in these
sequences is a PMIC specific element of 15 bytes.
Although this is not really an ACPI opregion, the ACPI opregion code is the
closest thing we have. We need to
From: Tvrtko Ursulin
Exercise the context image reconfiguration logic for idle and busy
contexts, with the resets thrown into the mix as well.
Free from the uAPI restrictions this test runs on all Gen9+ platforms
with slice power gating.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/
From: Tvrtko Ursulin
We want to allow userspace to reconfigure the subslice configuration on a
per context basis.
This is required for the functional requirement of shutting down non-VME
enabled sub-slices on Gen11 parts.
To do so, we expose a context parameter to allow adjustment of the RPCS
r
From: Tvrtko Ursulin
Timeline barrier allows serialization between different timelines.
After calling i915_timeline_set_barrier with a request, all following
submissions on this timeline will be set up as depending on this request,
or barrier. Once the barrier has been completed it automatically
From: Lionel Landwerlin
We want to expose the ability to reconfigure the slices, subslice and
eu per context and per engine. To facilitate that, store the current
configuration on the context for each engine, which is initially set
to the device default upon creation.
v2: record sseu configurati
From: Lionel Landwerlin
If some of the contexts submitting workloads to the GPU have been
configured to shutdown slices/subslices, we might loose the NOA
configurations written in the NOA muxes.
One possible solution to this problem is to reprogram the NOA muxes
when we switch to a new context.
From: Tvrtko Ursulin
Re-send of the old series with the following highlights:
* Rebased for drm-tip changes, mostly IS_GEN changes.
* New patch adding some selftests for the feature. (Since majority of test code
has been removed from the IGT.)
Lionel Landwerlin (2):
drm/i915: Record the
From: Tvrtko Ursulin
When OA is active we want to lock the powergating configuration, but on
Icelake, users like the media stack will have issues if we lock to the
full device configuration.
Instead lock to a subset of (sub)slices which are currently a known
working configuration for all users.
From: Tvrtko Ursulin
Configuring RPCS in context image just before pin is sufficient and will
come extra handy in one of the following patches.
v2:
* Split image setup a bit differently. (Chris Wilson)
v3:
* Update context image after reset as well - otherwise the application
of pinned def
== Series Details ==
Series: ACPI/i915: Add support for PMIC MIPI sequence elements
URL : https://patchwork.freedesktop.org/series/54050/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5317 -> Patchwork_11094
Summary
---
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev8)
URL : https://patchwork.freedesktop.org/series/48194/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7bc81b868afe drm/i915/execlists: Move RPCS setup to context pin
5939874afc3d drm/i915: Record the
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev8)
URL : https://patchwork.freedesktop.org/series/48194/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/execlists: Move RPCS setup to context pin
Okay!
Commit: drm/i
Quoting Tvrtko Ursulin (2018-12-14 12:34:49)
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
> b/drivers/gpu/drm/i915/i915_gem_context.c
> index 78d449b6245e..fcb19b6f635e 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -1042,24 +1
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev8)
URL : https://patchwork.freedesktop.org/series/48194/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5317 -> Patchwork_11095
Summary
---
Quoting Tvrtko Ursulin (2018-12-14 12:34:49)
> +static struct i915_vma *rpcs_query_batch(struct i915_vma *vma)
> +{
> + struct drm_i915_gem_object *obj;
> + u32 *cmd;
> + int err;
> +
> + if (INTEL_GEN(vma->vm->i915) < 8)
> + return ERR_PTR(-EINVAL);
> +
> +
Quoting Tvrtko Ursulin (2018-12-14 12:34:46)
> diff --git a/drivers/gpu/drm/i915/i915_timeline.h
> b/drivers/gpu/drm/i915/i915_timeline.h
> index ebd71b487220..6ee301f20bab 100644
> --- a/drivers/gpu/drm/i915/i915_timeline.h
> +++ b/drivers/gpu/drm/i915/i915_timeline.h
> @@ -72,6 +72,16 @@ struct
Now that our state comparison functions are pretty complete, we should
enable fastset by default when a modeset can be avoided. Even if we're
not completely certain about the inherited state, we can be certain
after the first modeset that our sw state matches the hw state.
Signed-off-by: Maarten L
Now that we've solved the backlight issue, I think it's time to enable
this again by default. We've enabled it in the past, but backlight
issues prevented us from enabling it by default.
Our hardware readout is pretty complete, and with all of the connector
state moved to atomic I'm hoping we fina
On lynxpoint the bios sometimes sets up the backlight using the CPU
display, but the driver expects using the PWM PCH override register.
Read the value from the CPU register, then convert it to the other
units by converting from the old duty cycle, to freq, to the new units.
This value is then pr
Restore our saved values for backlight. This way even with fastset on
S4 resume we will correctly restore the backlight to the active values.
Changes since v1:
- Call enable_backlight() when backlight.level is set. On suspend
backlight.enabled is always cleared, this makes it not a good
indica
Quoting Tvrtko Ursulin (2018-12-14 12:34:47)
> +static int get_sseu(struct i915_gem_context *ctx,
> + struct drm_i915_gem_context_param *args)
> +{
> + struct drm_i915_gem_context_param_sseu user_sseu;
> + struct intel_engine_cs *engine;
> + struct intel_context
== Series Details ==
Series: series starting with [1/4] drm/i915/backlight: Restore backlight on
resume, v2.
URL : https://patchwork.freedesktop.org/series/54052/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d772e5f0dbbb drm/i915/backlight: Restore backlight on resume, v2.
de
== Series Details ==
Series: series starting with [1/4] drm/i915/backlight: Restore backlight on
resume, v2.
URL : https://patchwork.freedesktop.org/series/54052/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/backlight: Restore backlight on
== Series Details ==
Series: ACPI/i915: Add support for PMIC MIPI sequence elements
URL : https://patchwork.freedesktop.org/series/54050/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5317_full -> Patchwork_11094_full
Summa
== Series Details ==
Series: series starting with [1/4] drm/i915/backlight: Restore backlight on
resume, v2.
URL : https://patchwork.freedesktop.org/series/54052/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5317 -> Patchwork_11096
===
pm runtime uses the timer infrastructure for autosuspend. This implies that
the minimum time before autosuspending a device is in the range
of 1 tick included to 2 ticks excluded
-On arm64 this means between 4ms and 8ms with default jiffies configuration
-And on arm, it is between 10ms and 20ms
Th
From: Thara Gopinath
This patch replaces jiffies based accoutning for runtime_active_time
and runtime_suspended_time with ktime base accounting. This makes the
runtime debug counters inline with genpd and other pm subsytems which
uses ktime based accounting.
Signed-off-by: Thara Gopinath
[move
Move pm_runtime on hrtimer and raw ns time to get finer granularity
Patch 1 moves runtime_pm autosuspend on hrtimer framework
Patch 2 moves time accounting on raw ns. This patch initially used
ktime instead of raw ns but it was easier to move i915 driver on raw ns
than on ktime
Patch 3 fixes drm
With jiffies been replaced by raw ns in PM core accounting, 915 driver is
updated to use this new time infrastructure.
Signed-off-by: Vincent Guittot
---
drivers/gpu/drm/i915/i915_pmu.c | 12 ++--
drivers/gpu/drm/i915/i915_pmu.h | 4 ++--
2 files changed, 8 insertions(+), 8 deletions(-)
>-Original Message-
>From: Roper, Matthew D
>Sent: Friday, December 14, 2018 3:25 AM
>To: dri-de...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
>Cc: Roper, Matthew D ; Shankar, Uma
>; Sharma, Swati2 ; Brian
>Starkey
>Subject: [PATCH v2 1/2] drm: Add color management LUT valida
>-Original Message-
>From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
>Matt Roper
>Sent: Friday, December 14, 2018 3:25 AM
>To: dri-de...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
>Cc: Shankar, Uma ; Sharma, Swati2
>
>Subject: [PATCH v2 2/2] drm/i
== Series Details ==
Series: PM/pm_runtime: move on hrtimer and nsec
URL : https://patchwork.freedesktop.org/series/54059/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c435ac8f04a4 PM/pm_runtime: move autosuspend on hrtimer
-:142: CHECK:PARENTHESIS_ALIGNMENT: Alignment should
On Fri, 14 Dec 2018 at 15:22, Vincent Guittot
wrote:
>
> With jiffies been replaced by raw ns in PM core accounting, 915 driver is
> updated to use this new time infrastructure.
>
> Signed-off-by: Vincent Guittot
> ---
> drivers/gpu/drm/i915/i915_pmu.c | 12 ++--
> drivers/gpu/drm/i915/i
== Series Details ==
Series: PM/pm_runtime: move on hrtimer and nsec
URL : https://patchwork.freedesktop.org/series/54059/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: PM/pm_runtime: move autosuspend on hrtimer
Okay!
Commit: PM/runtime:Replace jiffi
== Series Details ==
Series: PM/pm_runtime: move on hrtimer and nsec
URL : https://patchwork.freedesktop.org/series/54059/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5317 -> Patchwork_11097
Summary
---
**FAILURE**
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev8)
URL : https://patchwork.freedesktop.org/series/48194/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5317_full -> Patchwork_11095_full
Summary
-
== Series Details ==
Series: series starting with [1/4] drm/i915/backlight: Restore backlight on
resume, v2.
URL : https://patchwork.freedesktop.org/series/54052/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5317_full -> Patchwork_11096_full
=
On Thu, Dec 13, 2018 at 08:25:42PM -0500, Lyude Paul wrote:
> There has been a TODO waiting for quite a long time in
> drm_dp_mst_topology.c:
>
> /* We cannot rely on port->vcpi.num_slots to update
>* topology_state->avail_slots as the port may not exist if the parent
>* bran
From: Clint Taylor
Program PORT_TX_DW7 to the value specified in the DDI Buffer section of the
BSPEC.
BSEPC: 21257
Cc: Madhav Chauhan
Cc: Jani Nikula
Cc: Imre Deak
Signed-off-by: Clint Taylor
---
drivers/gpu/drm/i915/icl_dsi.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/
== Series Details ==
Series: drm/i915/dsi: Add PORT_TX_DW7 programming to DSI vswing sequence
URL : https://patchwork.freedesktop.org/series/54069/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
DESCEND objtool
CHK include/generated/compile.h
CC [M] drivers/gpu/drm/
Make the defines for LE and L3 caching options to contain the shifts and
remove the zeros from the tables as shifting zeros always result in
zero.
Starting from Ice Lake the MOCS table is defined in the spec and
contains all entries. So to simplify checking the table with the values
set in code, t
This reworks v6 of the series
(https://patchwork.freedesktop.org/series/51258/) to handle the comments
there and some more of my own.
I added 2 patches in which most of the changes were done and then
rebased those commits to adhere to the new table format. All values for
the table were cross check
Instead of checking the gen number every time we need to know the max
number of entries, just save it into the table struct so we don't need
extra branches throughout the code.
Suggested-by: Tvrtko Ursulin
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_mocs.c | 31 ++-
From: Tomasz Lis
The MOCS tables are going to be very similar across platforms.
To reduce the amount of copied code, this patch rips the common part and
puts it into a definition valid for all gen9 platforms.
v2: Made defines for or-ing flags. Renamed macros from MOCS_TABLE
to MOCS_ENTRIES.
From: Tomasz Lis
The table has been unified across OSes to minimize virtualization overhead.
The MOCS table is now published as part of bspec, and versioned. Entries
are supposed to never be modified, but new ones can be added. Adding
entries increases table version. The patch includes version 1
On Fri, Dec 14, 2018 at 09:43:08AM +, Alexandru-Cosmin Gheorghe wrote:
...
> > +int drm_color_lut_check(struct drm_property_blob *lut,
> > +uint32_t tests)
> > +{
> > + struct drm_color_lut *entry;
> > + int i;
> > +
> > + if (!lut)
> > + return 0;
> > +
> >
This is needed by the next patch to determine if a DDI TypeC port is
physically wired to a legacy DP or legacy HDMI connector or if the port
is wired to a USB-C/Thunderbolt connector.
Cc: Jani Nikula
Cc: Paulo Zanoni
Cc: Ville Syrjälä
Cc: José Roberto de Souza
Cc: Rodrigo Vivi
Signed-off-by:
It's useful to see at which point a TypeC port gets disconnected, so add
a debug print for it.
Cc: Paulo Zanoni
Cc: Ville Syrjälä
Cc: José Roberto de Souza
Cc: Rodrigo Vivi
Signed-off-by: Imre Deak
Reviewed-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_dp.c | 34 --
Atm HPD disconnect events on TypeC ports will break things, since we'll
switch the TypeC mode (between legacy and disconnected modes as well as
among USB DP alternate, Thunderbolt alternate and disconnected modes) on
the fly from the HPD disconnect interrupt work while the port may be
still active.
This is v2 of [1]. The changes in v2:
- Use VBT for detecting legacy ports. There was already a flag for this
in VBT, I just missed it. Thanks for Siva for pointing that out. With
that we have a detection that works all the time for DP ports as well.
- Remove a redundant special casing of legac
Add a fallback detection method for TypeC legacy ports in case the
VBT port information used to detect normally such ports is
incorrect.
For the fallback method we use the TypeC legacy mode specific HPD
interrupt flag which should only be raised for a legacy port.
WARN if the VBT port info is inc
Some hardware may place additional restrictions on the gamma/degamma
curves described by our LUT properties. E.g., that a gamma curve never
decreases or that the red/green/blue channels of a LUT's entries must be
equal. Let's add a helper function that drivers can use to test that a
userspace-pro
We currently program userspace-provided gamma and degamma LUT's into our
hardware without really checking to see whether they satisfy our
hardware's rules. We should try to catch tables that are invalid for
our hardware early and reject the atomic transaction.
All of our platforms that accept a d
Previous version of the series was here:
https://lists.freedesktop.org/archives/dri-devel/2018-December/200505.html
The only change in this version is dropping the extra LUT size test I
added in v2; Alexandru pointed out that that already gets tested when a
new atomic blob is uploaded.
Matt Ro
== Series Details ==
Series: Define MOCS table for Icelake
URL : https://patchwork.freedesktop.org/series/54070/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5318 -> Patchwork_11099
Summary
---
**WARNING**
Minor
== Series Details ==
Series: drm/i915/icl: Fix TypeC legacy HPD handling (rev2)
URL : https://patchwork.freedesktop.org/series/54017/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
39a8e2bef8b8 drm/i915/icl: Add a debug print for TypeC port disconnection
-:29: WARNING:STATIC_CON
== Series Details ==
Series: drm/i915/icl: Fix TypeC legacy HPD handling (rev2)
URL : https://patchwork.freedesktop.org/series/54017/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/icl: Add a debug print for TypeC port disconnection
Okay!
Com
On 2018-12-11 5:37 a.m., Chunming Zhou wrote:
> v2: adapt to new transfer ioctl
>
> Signed-off-by: Chunming Zhou
+igt-dev
I think intel-gfx still works for IGT development but most of the IGT work
happens on igt-...@lists.freedesktop.org now.
Harry
> ---
> include/drm-uapi/drm.h | 33 ++
Oops, failure caused by ICL_PORT_TX_DW7 not being defined yet. Still
waiting on r-b for a patch that includes the DW7 definition.
-Clint
On 12/14/18 10:15, Patchwork wrote:
== Series Details ==
Series: drm/i915/dsi: Add PORT_TX_DW7 programming to DSI vswing sequence
URL : https://patchwor
== Series Details ==
Series: drm/i915/icl: Fix TypeC legacy HPD handling (rev2)
URL : https://patchwork.freedesktop.org/series/54017/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5318 -> Patchwork_11100
Summary
---
== Series Details ==
Series: Add gamma/degamma LUT validation helper (rev2)
URL : https://patchwork.freedesktop.org/series/54023/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
6710b80676f0 drm: Add color management LUT validation helper (v3)
-:30: WARNING:BAD_SIGN_OFF: 'Reviewe
== Series Details ==
Series: Add gamma/degamma LUT validation helper (rev2)
URL : https://patchwork.freedesktop.org/series/54023/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5318 -> Patchwork_11101
Summary
---
**WA
== Series Details ==
Series: Define MOCS table for Icelake
URL : https://patchwork.freedesktop.org/series/54070/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5318_full -> Patchwork_11099_full
Summary
---
**WARNING**
[ This code is old, but it's pretty confusing so I decided to send the
email anyway. - dan ]
Hello Chris Wilson,
The patch 03ac84f1830e: "drm/i915: Pass around sg_table to
get_pages/put_pages backend" from Oct 28, 2016, leads to the
following static checker warning:
drivers/gpu/drm/i9
== Series Details ==
Series: drm/i915/icl: Fix TypeC legacy HPD handling (rev2)
URL : https://patchwork.freedesktop.org/series/54017/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5318_full -> Patchwork_11100_full
Summary
-
On Fri, Dec 14, 2018 at 11:34:13AM -0800, Clint Taylor wrote:
>Oops, failure caused by ICL_PORT_TX_DW7 not being defined yet. Still
>waiting on r-b for a patch that includes the DW7 definition.
I believe it is easier to re-send both patches together. Specially
because apparently one justif
== Series Details ==
Series: Add gamma/degamma LUT validation helper (rev2)
URL : https://patchwork.freedesktop.org/series/54023/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5318_full -> Patchwork_11101_full
Summary
-
On Fri, Dec 14, 2018 at 01:25:07AM +0200, Imre Deak wrote:
> On Thu, Dec 13, 2018 at 01:06:51PM -0800, Rodrigo Vivi wrote:
> > On Thu, Dec 13, 2018 at 09:48:49PM +0200, Imre Deak wrote:
> > > Atm HPD disconnect events on TypeC ports will break things, since we'll
> > > switch the TypeC mode (betwee
On Fri, Dec 14, 2018 at 02:22:09PM -0800, Rodrigo Vivi wrote:
> On Fri, Dec 14, 2018 at 01:25:07AM +0200, Imre Deak wrote:
> > On Thu, Dec 13, 2018 at 01:06:51PM -0800, Rodrigo Vivi wrote:
> > > On Thu, Dec 13, 2018 at 09:48:49PM +0200, Imre Deak wrote:
> > > > Atm HPD disconnect events on TypeC po
From: talha nassar
Enables blend optimization for floating point RTs
This restores the workaround that was reverted in c358514ba8da
("Revert "drm/i915/icl: WaEnableFloatBlendOptimization"").
The revert was due to the register write seemingly not sticking,
but the HW team has confirmed that this
CNL macros for register groups CNL_PORT_TX_DW2_* / CNL_PORT_TX_DW5_* are
configured incorrectly wrt definition of _CNL_PORT_TX_DW_GRP.
Cc: Clint Taylor
Cc: Imre Deak
Signed-off-by: Aditya Swarup
---
drivers/gpu/drm/i915/i915_reg.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
== Series Details ==
Series: drm/i915/icl: restore WaEnableFloatBlendOptimization
URL : https://patchwork.freedesktop.org/series/54091/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7da6a989f1e7 drm/i915/icl: restore WaEnableFloatBlendOptimization
-:8: ERROR:GIT_COMMIT_ID: Plea
== Series Details ==
Series: drm/i915/icl: restore WaEnableFloatBlendOptimization
URL : https://patchwork.freedesktop.org/series/54091/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5320 -> Patchwork_11102
Summary
---
== Series Details ==
Series: drm/i915/cnl: Fix CNL macros for Voltage Swing programming
URL : https://patchwork.freedesktop.org/series/54092/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5320 -> Patchwork_11103
Summary
---
Hi Uma,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on v4.20-rc6 next-20181214]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https
== Series Details ==
Series: drm/i915/cnl: Fix CNL macros for Voltage Swing programming
URL : https://patchwork.freedesktop.org/series/54092/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5320_full -> Patchwork_11103_full
S
Hi Clint,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on next-20181214]
[cannot apply to v4.20-rc6]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url
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