On 12/03/2018 04:19 AM, Ville Syrjälä wrote:
On Fri, Nov 30, 2018 at 02:58:01PM -0800, clinton.a.tay...@intel.com wrote:
From: Clint Taylor
In August 2018 the BSPEC changed the ICL port programming sequence to
closely resemble earlier gen programming sequence.
BSpec: 21257
Cc: Ville Syrjälä
On Mon, Dec 03, 2018 at 11:34:16AM -0800, Clint Taylor wrote:
>
>
> On 12/03/2018 04:19 AM, Ville Syrjälä wrote:
> > On Fri, Nov 30, 2018 at 02:58:01PM -0800, clinton.a.tay...@intel.com wrote:
> >> From: Clint Taylor
> >>
> >> In August 2018 the BSPEC changed the ICL port programming sequence to
Thanks fo rthe reviw, pushed to dinq!
Manasi
On Mon, Dec 03, 2018 at 02:05:42PM +0200, Ville Syrjälä wrote:
> On Fri, Nov 30, 2018 at 05:04:12PM -0800, Manasi Navare wrote:
> > Fix the intel_link_compute_m_n in case of display stream
> > compression. This patch passes the compressed_bpp to
> > i
On Fri, 2018-11-30 at 15:35 -0800, Dhinakaran Pandiyan wrote:
> On Thu, 2018-11-29 at 18:25 -0800, José Roberto de Souza wrote:
> > i915 yet don't support PSR in Apple panels, so lets keep it
> > disabled
> > while we work on that.
> >
> > v2: Renamed DP_DPCD_QUIRK_PSR_NOT_CURRENTLY_SUPPORTED to
>
On Fri, 2018-11-30 at 15:54 -0800, Dhinakaran Pandiyan wrote:
> On Thu, 2018-11-29 at 18:25 -0800, José Roberto de Souza wrote:
> > As we have a else block for the 'if (dev_priv->psr.psr2_enabled) {'
> > and this bit is only set for PSR1 move it to that block to make it
> > more easy to read.
> >
On Fri, 2018-11-30 at 15:35 -0800, Dhinakaran Pandiyan wrote:
> On Thu, 2018-11-29 at 18:25 -0800, José Roberto de Souza wrote:
> > i915 yet don't support PSR in Apple panels, so lets keep it
> > disabled
> > while we work on that.
> >
> > v2: Renamed DP_DPCD_QUIRK_PSR_NOT_CURRENTLY_SUPPORTED to
>
On Fri, 2018-11-30 at 16:37 -0800, Dhinakaran Pandiyan wrote:
> On Thu, 2018-11-29 at 18:25 -0800, José Roberto de Souza wrote:
> > Selective updates have a default granularity requirements as stated
> > by eDP spec
> Needs reference to the location in the spec.
Done
>
> > , so check if HW can m
On 2018-11-28 4:14 a.m., Joonas Lahtinen wrote:
> Quoting Ho, Kenny (2018-11-27 17:41:17)
>> On Tue, Nov 27, 2018 at 4:46 AM Joonas Lahtinen
>> wrote:
>>> I think a more abstract property "% of GPU (processing power)" might
>>> be a more universal approach. One can then implement that through
>>
On Mon, Dec 03, 2018 at 04:29:17AM -0800, Peres, Martin wrote:
> On 30/11/2018 19:27, Vivi, Rodrigo wrote:
> > On Fri, Nov 30, 2018 at 03:04:40PM +0200, Martin Peres wrote:
> >>
> >>
> >> On 29/11/2018 19:36, Rodrigo Vivi wrote:
> >>> On Wed, Nov 28, 2018 at 11:52:49PM -0800, Saarinen, Jani wrote:
On Thu, 2018-11-29 at 18:25 -0800, José Roberto de Souza wrote:
> According to eDP spec, sink can required specific selective update
> granularity that source must comply.
> Here caching the value if required and checking if source supports
> it.
>
> Cc: Rodrigo Vivi
> Cc: Dhinakaran Pandiyan
>
On Thu, Nov 29, 2018 at 10:08:07AM +0100, Andrzej Hajda wrote:
> On 21.11.2018 19:19, Laurent Pinchart wrote:
> > Hi Ville,
> >
> > Thank you for the patch.
> >
> > On Tuesday, 20 November 2018 18:13:42 EET Ville Syrjala wrote:
> >> From: Ville Syrjälä
> >>
> >> Make life easier for drivers by sim
On Thu, Nov 29, 2018 at 09:46:16AM +0100, Andrzej Hajda wrote:
> Quite late, hopefully not too late.
>
>
> On 21.11.2018 12:51, Ville Syrjälä wrote:
> > On Wed, Nov 21, 2018 at 01:40:43PM +0200, Jani Nikula wrote:
> >>
> >>> return;
> >>> diff --git a/drivers/gpu/drm/bridge/sil-sii8620.
>-Original Message-
>From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
>Sent: Tuesday, November 20, 2018 12:25 PM
>To: intel-gfx@lists.freedesktop.org
>Cc: Chris Wilson ; Jani Nikula
>; Ville Syrjala ;
>Navare, Manasi D ; Srivatsa, Anusha
>
>Subject: [PATCH 2/2] drm/i915/dp: Fix incons
On Mon, 2018-12-03 at 12:59 -0800, Dhinakaran Pandiyan wrote:
> On Thu, 2018-11-29 at 18:25 -0800, José Roberto de Souza wrote:
> > According to eDP spec, sink can required specific selective update
> > granularity that source must comply.
> > Here caching the value if required and checking if sour
On Mon, 2018-12-03 at 12:14 -0800, Souza, Jose wrote:
> On Fri, 2018-11-30 at 15:35 -0800, Dhinakaran Pandiyan wrote:
> > On Thu, 2018-11-29 at 18:25 -0800, José Roberto de Souza wrote:
> > > i915 yet don't support PSR in Apple panels, so lets keep it
> > > disabled
> > > while we work on that.
> >
On Mon, 2018-12-03 at 14:45 -0800, Dhinakaran Pandiyan wrote:
> On Mon, 2018-12-03 at 12:14 -0800, Souza, Jose wrote:
> > On Fri, 2018-11-30 at 15:35 -0800, Dhinakaran Pandiyan wrote:
> > > On Thu, 2018-11-29 at 18:25 -0800, José Roberto de Souza wrote:
> > > > i915 yet don't support PSR in Apple p
On Tue, Nov 20, 2018 at 08:24:39PM +, Chris Wilson wrote:
> Always show the FEC capability as it is initialised to 0 before error.
That is a good point, do you think we should do the same for DSC DPCD and print
that unconditionally?
Manasi
> Fixing,
>
> drivers/gpu/drm/i915/intel_dp.c:3846
On Sat, 2018-12-01 at 18:32 +, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [v3,1/2] drm/i915: Add HAS_DISPLAY() and
> use it
> URL : https://patchwork.freedesktop.org/series/53341/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_5237_fu
On Thu, 2018-11-29 at 18:25 -0800, José Roberto de Souza wrote:
> - Reusing the EDP_PSR2_FRAME_BEFORE_SU_SHIFT in
> EDP_PSR2_FRAME_BEFORE_SU
> - Removing unused EDP_PSR2_FRAME_BEFORE_SU_MASK
> - Adding EDP_PSR2_FRAME_BEFORE_SU_MAX
> - Adding EDP_PSR2_IDLE_FRAME()
> - Adding EDP_PSR2_IDLE_FRAME_MAX
On Mon, Dec 03, 2018 at 03:03:52PM -0800, Dhinakaran Pandiyan wrote:
> On Thu, 2018-11-29 at 18:25 -0800, José Roberto de Souza wrote:
> > - Reusing the EDP_PSR2_FRAME_BEFORE_SU_SHIFT in
> > EDP_PSR2_FRAME_BEFORE_SU
> > - Removing unused EDP_PSR2_FRAME_BEFORE_SU_MASK
> > - Adding EDP_PSR2_FRAME_BEF
On Mon, 2018-12-03 at 14:45 -0800, Souza, Jose wrote:
> On Mon, 2018-12-03 at 12:59 -0800, Dhinakaran Pandiyan wrote:
> > On Thu, 2018-11-29 at 18:25 -0800, José Roberto de Souza wrote:
> > > According to eDP spec, sink can required specific selective
> > > update
> > > granularity that source must
On Mon, 2018-12-03 at 15:12 -0800, Pandiyan, Dhinakaran wrote:
> On Mon, 2018-12-03 at 14:45 -0800, Souza, Jose wrote:
> > On Mon, 2018-12-03 at 12:59 -0800, Dhinakaran Pandiyan wrote:
> > > On Thu, 2018-11-29 at 18:25 -0800, José Roberto de Souza wrote:
> > > > According to eDP spec, sink can requ
As we have a else block for the 'if (dev_priv->psr.psr2_enabled) {'
and this bit is only set for PSR1 move it to that block to make it
more easy to read.
Cc: Dhinakaran Pandiyan
Cc: Rodrigo Vivi
Reviewed-by: Dhinakaran Pandiyan
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/int
For PSR2 there is no register to tell HW to keep main link enabled
while PSR2 is active, so don't configure sink DPCD with a
misleading value.
v2: Moving the set of DP_PSR_CRC_VERIFICATION to the else block
of 'if (dev_priv->psr.psr2_enabled)' to another patch. (Rodrigo)
Cc: Dhinakaran Pandiyan
Selective updates have a default granularity requirements as stated
by eDP spec(PSR2 SELECTIVE UPDATE X GRANULARITY CAPABILITY register
definition), so check if HW can match those requirements before
enabling PSR2.
v2:
- Changes in the comments and commit message(Dhinakaran)
- Printing the hdispla
According to eDP spec, sink can required specific selective update
granularity that source must comply.
Here caching the value if required and checking if source supports
it.
v2:
- Returning the default granularity in case DPCD read fails(Dhinakaran)
- Changed DPCD error message level(Dhinakaran)
i915 yet don't support PSR in Apple panels, so lets keep it disabled
while we work on that.
v2: Renamed DP_DPCD_QUIRK_PSR_NOT_CURRENTLY_SUPPORTED to
DP_DPCD_QUIRK_NO_PSR (Ville)
v3:
Adding documentation to DP_DPCD_QUIRK_NO_PSR(Dhinakaran and Jani)
Fixed typo in comment of the new quirk entry(Jani
On Thu, 2018-11-29 at 15:37 -0800, Rodrigo Vivi wrote:
> On Thu, Nov 29, 2018 at 10:54:50PM +, Atwood, Matthew S wrote:
> > On Thu, 2018-11-29 at 14:00 -0800, Manasi Navare wrote:
> > > From: Matt Atwood
> > >
> > > According to DP spec (2.9.3.1 of DP 1.4) if
> > > EXTENDED_RECEIVER_CAPABILIT
For ICL the bit 12 of CHICKEN_TRANS is reserved so we should not
touch it and as by default VSC_DATA_SEL_SOFTWARE_CONTROL is already
unset in gen10 + GLK we can just drop it and fix for both gens.
Cc: Dhinakaran Pandiyan
Reviewed-by: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
---
driver
Source is required to comply to sink SU granularity when
DP_PSR2_SU_GRANULARITY_REQUIRED is set in DP_PSR_CAPS,
so adding the registers offsets.
v2: Also adding DP_PSR2_SU_Y_GRANULARITY(Rodrigo)
Cc: Dhinakaran Pandiyan
Cc: Rodrigo Vivi
Reviewed-by: Dhinakaran Pandiyan
Signed-off-by: José Rober
eDP spec states 2 different bits to enable sink to trigger a
interruption when there is a CRC mismatch.
DP_PSR_CRC_VERIFICATION is for PSR only and
DP_PSR_IRQ_HPD_WITH_CRC_ERRORS is for PSR2 only.
Cc: Dhinakaran Pandiyan
Reviewed-by: Dhinakaran Pandiyan
Reviewed-by: Rodrigo Vivi
Signed-off-by:
Our frontbuffer tracking improved over the years + the WA #0884
helped us keep PSR2 enabled while triggering screen updates when
necessary so this FIXME is not valid anymore.
Acked-by: Dhinakaran Pandiyan
Reviewed-by: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i
== Series Details ==
Series: series starting with [v3,1/9] drm/i915: Disable PSR in Apple panels
URL : https://patchwork.freedesktop.org/series/53447/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Disable PSR in Apple panels
Okay!
Commit: d
== Series Details ==
Series: series starting with [v3,1/9] drm/i915: Disable PSR in Apple panels
URL : https://patchwork.freedesktop.org/series/53447/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5250 -> Patchwork_11003
Su
According to eDP spec, sink can required specific selective update
granularity that source must comply.
Here caching the value if required and checking if source supports
it.
v3:
- Returning the default granularity in case DPCD read fails(Dhinakaran)
- Changed DPCD error message level(Dhinakaran)
For PSR2 there is no register to tell HW to keep main link enabled
while PSR2 is active, so don't configure sink DPCD with a
misleading value.
v2: Moving the set of DP_PSR_CRC_VERIFICATION to the else block
of 'if (dev_priv->psr.psr2_enabled)' to another patch. (Rodrigo)
Cc: Dhinakaran Pandiyan
Our frontbuffer tracking improved over the years + the WA #0884
helped us keep PSR2 enabled while triggering screen updates when
necessary so this FIXME is not valid anymore.
Acked-by: Dhinakaran Pandiyan
Reviewed-by: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i
Source is required to comply to sink SU granularity when
DP_PSR2_SU_GRANULARITY_REQUIRED is set in DP_PSR_CAPS,
so adding the registers offsets.
v2: Also adding DP_PSR2_SU_Y_GRANULARITY(Rodrigo)
Cc: Dhinakaran Pandiyan
Cc: Rodrigo Vivi
Reviewed-by: Dhinakaran Pandiyan
Signed-off-by: José Rober
i915 yet don't support PSR in Apple panels, so lets keep it disabled
while we work on that.
v2: Renamed DP_DPCD_QUIRK_PSR_NOT_CURRENTLY_SUPPORTED to
DP_DPCD_QUIRK_NO_PSR (Ville)
v3:
Adding documentation to DP_DPCD_QUIRK_NO_PSR(Dhinakaran and Jani)
Fixed typo in comment of the new quirk entry(Jani
Selective updates have a default granularity requirements as stated
by eDP spec(PSR2 SELECTIVE UPDATE X GRANULARITY CAPABILITY register
definition), so check if HW can match those requirements before
enabling PSR2.
v3:
- Changes in the comments and commit message(Dhinakaran)
- Printing the hdispla
As we have a else block for the 'if (dev_priv->psr.psr2_enabled) {'
and this bit is only set for PSR1 move it to that block to make it
more easy to read.
Cc: Dhinakaran Pandiyan
Cc: Rodrigo Vivi
Reviewed-by: Dhinakaran Pandiyan
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/int
eDP spec states 2 different bits to enable sink to trigger a
interruption when there is a CRC mismatch.
DP_PSR_CRC_VERIFICATION is for PSR only and
DP_PSR_IRQ_HPD_WITH_CRC_ERRORS is for PSR2 only.
Cc: Dhinakaran Pandiyan
Reviewed-by: Dhinakaran Pandiyan
Reviewed-by: Rodrigo Vivi
Signed-off-by:
For ICL the bit 12 of CHICKEN_TRANS is reserved so we should not
touch it and as by default VSC_DATA_SEL_SOFTWARE_CONTROL is already
unset in gen10 + GLK we can just drop it and fix for both gens.
Cc: Dhinakaran Pandiyan
Reviewed-by: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
---
driver
== Series Details ==
Series: series starting with [v4,1/9] drm/i915: Disable PSR in Apple panels
URL : https://patchwork.freedesktop.org/series/53448/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Disable PSR in Apple panels
Okay!
Commit: d
On Thu, 2018-11-29 at 18:31 -0800, José Roberto de Souza wrote:
> There is no issues changing the PSR variables even if PSR will be not
> enabled but it avoid having misleading values like have psr2_enabled
> set but enabled unset.
>
> Cc: Maarten Lankhorst
> Cc: Dhinakaran Pandiyan
> Cc: Rodrig
== Series Details ==
Series: series starting with [v4,1/9] drm/i915: Disable PSR in Apple panels
URL : https://patchwork.freedesktop.org/series/53448/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5250 -> Patchwork_11004
Su
On Mon, 2018-12-03 at 16:58 -0800, Dhinakaran Pandiyan wrote:
> On Thu, 2018-11-29 at 18:31 -0800, José Roberto de Souza wrote:
> > There is no issues changing the PSR variables even if PSR will be
> > not
> > enabled but it avoid having misleading values like have
> > psr2_enabled
> > set but enab
On Thu, 2018-11-29 at 18:31 -0800, José Roberto de Souza wrote:
> Changing the i915_edp_psr_debug was enabling, disabling or switching
> PSR version by directly calling intel_psr_disable_locked() and
> intel_psr_enable_locked(), what is not the default PSR path that is
> executed in a regular modes
On Mon, 2018-12-03 at 17:33 -0800, Dhinakaran Pandiyan wrote:
> On Thu, 2018-11-29 at 18:31 -0800, José Roberto de Souza wrote:
> > Changing the i915_edp_psr_debug was enabling, disabling or
> > switching
> > PSR version by directly calling intel_psr_disable_locked() and
> > intel_psr_enable_locked
== Series Details ==
Series: series starting with [v3,1/9] drm/i915: Disable PSR in Apple panels
URL : https://patchwork.freedesktop.org/series/53447/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5250_full -> Patchwork_11003_full
==
This trys to make 'kvmgt' module as self loadable instead of loading
by i915/gvt device model. So hypervisor specific module could be
stand-alone, e.g only after loading hypervisor specific module, GVT
feature could be enabled via specific hypervisor interface, e.g VFIO/mdev.
So this trys to use h
On Mon, 2018-12-03 at 17:54 -0800, Souza, Jose wrote:
> On Mon, 2018-12-03 at 17:33 -0800, Dhinakaran Pandiyan wrote:
> > On Thu, 2018-11-29 at 18:31 -0800, José Roberto de Souza wrote:
> > > Changing the i915_edp_psr_debug was enabling, disabling or
> > > switching
> > > PSR version by directly ca
== Series Details ==
Series: series starting with [v4,1/9] drm/i915: Disable PSR in Apple panels
URL : https://patchwork.freedesktop.org/series/53448/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5250_full -> Patchwork_11004_full
==
DSC can be supported per DP connector. This patch adds a per connector
debugfs node to expose DSC support capability by the kernel.
The same node can be used from userspace to force DSC enable.
force_dsc_en written through this debugfs node is used to force
DSC even for lower resolutions.
v5:
* N
== Series Details ==
Series: Change KVMGT into self loadable module (rev2)
URL : https://patchwork.freedesktop.org/series/53379/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5250 -> Patchwork_11005
Summary
---
**WAR
== Series Details ==
Series: drm/i915/dsc: Add Per connector debugfs node for DSC support/enable
URL : https://patchwork.freedesktop.org/series/53449/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3e6218c6f05e drm/i915/dsc: Add Per connector debugfs node for DSC support/enable
== Series Details ==
Series: drm/i915/dsc: Add Per connector debugfs node for DSC support/enable
URL : https://patchwork.freedesktop.org/series/53449/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5250 -> Patchwork_11006
Su
== Series Details ==
Series: Change KVMGT into self loadable module (rev2)
URL : https://patchwork.freedesktop.org/series/53379/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5250_full -> Patchwork_11005_full
Summary
--
Hi,
Just one BDW regression fix for tiling mode format return
on vfio gfx dmabuf.
Thanks
--
The following changes since commit 7513edbc096a006f967eaf39088091442e623b83:
drm/i915/gvt: Avoid use-after-free iterating the gtt list (2018-11-21
17:31:56 +0800)
are available in the Git repository
+intel-gfx.
> -Original Message-
> From: Zhang, Yanmin
> Sent: Tuesday, December 04, 2018 10:31 AM
> To: Vivi, Rodrigo ; Deak, Imre
> Cc: Syrjala, Ville ; dri-de...@lists.freedesktop.org
> Subject: RE: DP1.2 MST HUB
>
> +People in community.
>
> Rodrigo,
>
> Thanks for the kind info.
>
On 03.12.2018 22:48, Ville Syrjälä wrote:
> On Thu, Nov 29, 2018 at 09:46:16AM +0100, Andrzej Hajda wrote:
>> Quite late, hopefully not too late.
>>
>>
>> On 21.11.2018 12:51, Ville Syrjälä wrote:
>>> On Wed, Nov 21, 2018 at 01:40:43PM +0200, Jani Nikula wrote:
> return;
> diff --
> -Original Message-
> From: Nikula, Jani
> Sent: Monday, December 3, 2018 7:39 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: ville.syrj...@linux.intel.com; Chauhan, Madhav
> ; Kulkarni, Vandita
> ; Lisovskiy, Stanislav
> ; Deak, Imre
> Subject: Re: [PATCH v11 00/23] drm/i915/icl: dsi ena
On 03.12.2018 22:38, Ville Syrjälä wrote:
> On Thu, Nov 29, 2018 at 10:08:07AM +0100, Andrzej Hajda wrote:
>> On 21.11.2018 19:19, Laurent Pinchart wrote:
>>> Hi Ville,
>>>
>>> Thank you for the patch.
>>>
>>> On Tuesday, 20 November 2018 18:13:42 EET Ville Syrjala wrote:
From: Ville Syrjälä
101 - 163 of 163 matches
Mail list logo
