On Thu, 2018-11-29 at 07:37 +, Lisovskiy, Stanislav wrote:
> On Wed, 2018-11-28 at 22:21 +0100, Daniel Vetter wrote:
> >
> > > I tried to read the bug and I have no idea what's going on here.
> > > Userspace
> > > is supposed to shut off outputs that are disconnected, whether
> > > that's DP,
On Wed, 28 Nov 2018, Guang Bai wrote:
> On some GEN9 platforms, slowly unplugging (wiggling) the HDMI cable makes
> the kernel to believe the HDMI display is still connected. This is because
> the HDMI DDC lines are disconnected a little bit later after the hot-plug
> interrupt triggered thus an i
On Wed, 28 Nov 2018, Radhakrishna Sripada
wrote:
> For gen10+ the offsets for Slice PG cntl/ EU PG cntl donot scale well
> for higher slices.
>
> v2: Use _PICK instead of formulae(Jani)
>
> Cc: Jani Nikula
> Cc: Rodrigo Vivi
> Cc: Lucs De Marchi
> Cc: Daniele Ceraolo Spurio
> Signed-off-by: R
On Thu, Nov 29, 2018 at 9:52 AM Guang Bai wrote:
> On some GEN9 platforms, slowly unplugging (wiggling) the HDMI cable makes
> the kernel to believe the HDMI display is still connected. This is because
> the HDMI DDC lines are disconnected a little bit later after the hot-plug
> interrupt trigger
://github.com/0day-ci/linux/commits/Chris-Wilson/drm-i915-selftests-Terminate-hangcheck-sanitycheck-forcibly/20181129-053109
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-allmodconfig (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the
Quite late, hopefully not too late.
On 21.11.2018 12:51, Ville Syrjälä wrote:
> On Wed, Nov 21, 2018 at 01:40:43PM +0200, Jani Nikula wrote:
>>
>>> return;
>>> diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c
>>> b/drivers/gpu/drm/bridge/sil-sii8620.c
>>> index a6e8f4591e63..0cc293a
On Thu, Nov 29, 2018 at 8:37 AM Lisovskiy, Stanislav
wrote:
>
> On Wed, 2018-11-28 at 22:21 +0100, Daniel Vetter wrote:
> > On Wed, Nov 28, 2018 at 09:51:13PM +0100, Daniel Vetter wrote:
> > > On Wed, Nov 28, 2018 at 03:55:58PM +0200, Stanislav Lisovskiy
> > > wrote:
> > > > Currently kernel might
On 2018.11.25 23:25:24 +, Colin King wrote:
> From: Colin Ian King
>
> There is a spelling mistake in an error message, fix it.
>
> Signed-off-by: Colin Ian King
> ---
> drivers/gpu/drm/i915/gvt/interrupt.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/g
On 21.11.2018 19:19, Laurent Pinchart wrote:
> Hi Ville,
>
> Thank you for the patch.
>
> On Tuesday, 20 November 2018 18:13:42 EET Ville Syrjala wrote:
>> From: Ville Syrjälä
>>
>> Make life easier for drivers by simply passing the connector
>> to drm_hdmi_avi_infoframe_from_display_mode() and
>>
On Thu, 2018-11-29 at 09:48 +0100, Daniel Vetter wrote:
> I didn't check wayland (well, weston or any of the others, wayland
> doesn't exist as an implementation), but -modesetting and -amdgpu.
> And
> they all have the same issue. It's roughly:
> - You unplug
> - Kernel sends out uevent
> - Usersp
On Wed, Nov 28, 2018 at 01:52:56PM -0800, Eric Anholt wrote:
> Daniel Vetter writes:
>
> > On Tue, Nov 27, 2018 at 12:38:44PM -0800, Eric Anholt wrote:
> >> Daniel Vetter writes:
> >>
> >> > On Mon, Nov 26, 2018 at 04:36:21PM -0800, Eric Anholt wrote:
> >> >> Noralf Trønnes writes:
> >> >> > +
On Wed, Nov 28, 2018 at 10:38:13PM -0800, Kevin Strasser wrote:
> 64 bpp half float formats are supported on hdr planes only and are subject
> to the following restrictions:
> * 90/270 rotation not supported
> * Yf Tiling not supported
> * Frame Buffer Compression not supported
> * Color Ke
On Wed, Nov 28, 2018 at 08:14:13PM -0500, Lyude Paul wrote:
>
> On Wed, 2018-11-28 at 09:17 +0100, Daniel Vetter wrote:
> > On Tue, Nov 27, 2018 at 08:44:14PM -0500, Lyude Paul wrote:
> > > On Tue, 2018-11-27 at 20:44 +0100, Daniel Vetter wrote:
> > >
> > > We could do this the other way around s
We inspect the requests under the assumption that they will be marked as
completed/signaled when they are removed from the queue. Currently
however, in the process of wedging the requests will be removed from the
queue before they are completed, so rearrange the code to signal the
fences before the
== Series Details ==
Series: Return only active connectors for get_resources ioctl (rev3)
URL : https://patchwork.freedesktop.org/series/53163/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5217_full -> Patchwork_10937_full
Sending the exact same hotplug event is not great uapi. Luckily the
only already merged implementation of leases (in the -modesetting
driver) doesn't care about what kind of uevent it gets, and
unconditionally processes both hotplug and lease changes. So we can
still adjust the uapi here.
But e.g.
== Series Details ==
Series: drm/i915: Signal the fences as they are cancelled due to wedging
URL : https://patchwork.freedesktop.org/series/53226/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b2cb1720bfa2 drm/i915: Signal the fences as they are cancelled due to wedging
-:13:
== Series Details ==
Series: series starting with [CI,v13,01/17] drm/i915/dp: Add DSC params and DSC
config to intel_crtc_state (rev2)
URL : https://patchwork.freedesktop.org/series/53184/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5217_full -> Patchwork_10939_full
===
== Series Details ==
Series: drm/i915: Signal the fences as they are cancelled due to wedging
URL : https://patchwork.freedesktop.org/series/53226/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5221 -> Patchwork_10947
Summa
== Series Details ==
Series: drm/lease: Send a distinct uevent
URL : https://patchwork.freedesktop.org/series/53228/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
821f2a44b955 drm/lease: Send a distinct uevent
-:58: WARNING:STATIC_CONST_CHAR_ARRAY: char * array declaration migh
On Wed, Nov 28, 2018 at 4:14 AM Joonas Lahtinen
wrote:
> So we can only choose the lowest common denominator, right?
>
> Any core count out of total core count should translate nicely into a
> fraction, so what would be the problem with percentage amounts?
I don't think having an abstracted res
== Series Details ==
Series: drm/lease: Send a distinct uevent
URL : https://patchwork.freedesktop.org/series/53228/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5221 -> Patchwork_10948
Summary
---
**SUCCESS**
No
Currently kernel might allocate different connector ids
for the same outputs in case of DP MST, which seems to
confuse userspace. There are can be different connector
ids in the list, which could be assigned to the same
output, while being in different states.
This results in issues, like external
== Series Details ==
Series: drm/dp-mst-helper: Remove hotplug callback
URL : https://patchwork.freedesktop.org/series/53192/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5217_full -> Patchwork_10942_full
Summary
---
On Thu, Nov 29, 2018 at 01:09:21PM +0200, Stanislav Lisovskiy wrote:
> Currently kernel might allocate different connector ids
> for the same outputs in case of DP MST, which seems to
> confuse userspace. There are can be different connector
> ids in the list, which could be assigned to the same
>
Hi all,
On 02-11-18 12:44, Hans de Goede wrote:
The GOP sometimes initializes the DSI pclk at a (slightly) different freq
then the pclk which we pick. intel_pipe_config_compare() allows for this
by doing a fuzzy compare on the port_clock.
But the pclk difference not only results in the port_clo
== Series Details ==
Series: Return only active connectors for get_resources ioctl (rev4)
URL : https://patchwork.freedesktop.org/series/53163/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5221 -> Patchwork_10949
Summary
-
Unclutter the haswell_crtc_enable() and haswell_crtc_disable() functions
a bit by moving the pll to port mapping and unmapping functions to the
ddi encoder hooks. This allows removal of a bunch of boilerplate code
from the functions.
Additionally, the ICL DSI encoder needs to do the clock gating a
== Series Details ==
Series: drm/i915/icl: push pll to port mapping/unmapping to ddi encoder hooks
URL : https://patchwork.freedesktop.org/series/53237/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5221 -> Patchwork_10950
Restore our saved values for backlight. This way even with fastset on
S4 resume we will correctly restore the backlight to the active values.
Signed-off-by: Maarten Lankhorst
Cc: Tolga Cakir
Cc: Basil Eric Rabi
Cc: Hans de Goede
Cc: Ville Syrjälä
Reported-by: Ville Syrjälä
---
drivers/gpu/d
On lynxpoint the bios sometimes sets up the backlight using the CPU
display, but the driver expects using the PWM PCH override register.
Read the value from the CPU register, then convert it to the other
units by converting from the old duty cycle, to freq, to the new units.
This value is then pr
We inspect the requests under the assumption that they will be marked as
completed/signaled when they are removed from the queue. Currently
however, in the process of wedging the requests will be removed from the
queue before they are completed, so rearrange the code to signal the
fences before the
== Series Details ==
Series: series starting with [1/2] drm/i915/backlight: Restore backlight on
resume
URL : https://patchwork.freedesktop.org/series/53239/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
39d3f7d1a54b drm/i915/backlight: Restore backlight on resume
776b5f4bda9e
== Series Details ==
Series: series starting with [1/2] drm/i915/backlight: Restore backlight on
resume
URL : https://patchwork.freedesktop.org/series/53239/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/backlight: Restore backlight on resum
== Series Details ==
Series: series starting with [1/2] drm/i915/backlight: Restore backlight on
resume
URL : https://patchwork.freedesktop.org/series/53239/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5221 -> Patchwork_10951
== Series Details ==
Series: drm/i915: Signal the fences as they are cancelled due to wedging (rev2)
URL : https://patchwork.freedesktop.org/series/53226/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
66bd2de23002 drm/i915: Signal the fences as they are cancelled due to wedging
== Series Details ==
Series: drm/i915: Signal the fences as they are cancelled due to wedging (rev2)
URL : https://patchwork.freedesktop.org/series/53226/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5221 -> Patchwork_10952
From: Tvrtko Ursulin
There is no white-listing before Gen8 and after the removal ringbuffer
support for these platforms we can remove the call to this no-op.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/g
From: Tvrtko Ursulin
It seems that the documentation does not reference this any more, plus,
bit 28 does not stick when written to the register.
Therefore I can only assume this is something which was documented in the
past but got removed from the hardware in the meantime.
Signed-off-by: Tvrtk
Quoting Tvrtko Ursulin (2018-11-29 13:41:28)
> From: Tvrtko Ursulin
>
> There is no white-listing before Gen8 and after the removal ringbuffer
> support for these platforms we can remove the call to this no-op.
Nope, even my devil's advocate is silent. Though maybe replacing it with
a GEM_BUG_ON
== Series Details ==
Series: series starting with [1/2] drm/i915/backlight: Restore backlight on
resume (rev2)
URL : https://patchwork.freedesktop.org/series/53239/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
65214d12d27f drm/i915/backlight: Restore backlight on resume
bbcaa
On Wed, Nov 28, 2018 at 11:54:21PM +0200, Souza, Jose wrote:
> On Wed, 2018-11-28 at 13:34 +0200, Imre Deak wrote:
> > On Wed, Nov 07, 2018 at 04:05:52PM -0800, José Roberto de Souza
> > wrote:
> > > When suspending or unloading the driver, it needs to release the
> > > TC ports so HW can change it
== Series Details ==
Series: series starting with [1/2] drm/i915/backlight: Restore backlight on
resume (rev2)
URL : https://patchwork.freedesktop.org/series/53239/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/backlight: Restore backlight o
Tvrtko Ursulin writes:
> From: Tvrtko Ursulin
>
> It seems that the documentation does not reference this any more, plus,
> bit 28 does not stick when written to the register.
>
> Therefore I can only assume this is something which was documented in the
> past but got removed from the hardware i
On Tue, 27 Nov 2018, Imre Deak wrote:
> The requirement for the DDI port clock gating for a port in DSI mode is
> the opposite wrt. the case when the port is in DDI mode: the clock
> should be gated when the port is active and ungated when the port is
> inactive. Note that we cannot simply keep th
== Series Details ==
Series: series starting with [1/2] drm/i915/backlight: Restore backlight on
resume (rev2)
URL : https://patchwork.freedesktop.org/series/53239/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5222 -> Patchwork_10953
=
Unclutter the haswell_crtc_enable() and haswell_crtc_disable() functions
a bit by moving the pll to port mapping and unmapping functions to the
ddi encoder hooks. This allows removal of a bunch of boilerplate code
from the functions.
Additionally, the ICL DSI encoder needs to do the clock gating a
From: Vandita Kulkarni
This patch implements the functionality for getting PIPE configuration
to which DSI encoder is connected. Use the same method to get port clock
like other DDI encoders. Used during the atomic modeset.
v2 by Jani:
- Squash Madhav's and Vandita's get config bits together
- M
From: Imre Deak
The requirement for the DDI port clock gating for a port in DSI mode is
the opposite wrt. the case when the port is in DDI mode: the clock
should be gated when the port is active and ungated when the port is
inactive. Note that we cannot simply keep the DDI clock gated when the
po
From: Vandita Kulkarni
The same pll manager functions can be used to enable dpll for
mipi. Hence enabling the IO power and esc clock as part of pre pll
enable call.
v2 by Jani:
- fix function parameter indent (Madhav)
Signed-off-by: Vandita Kulkarni
Reviewed-by: Madhav Chauhan
Signed-off-by:
From: Madhav Chauhan
This patch allocates memory for DSI encoder and connector
which will be used for various DSI encoder/connector operations
and attaching the same to DRM subsystem. This patch also extracts
DSI modes info from VBT and save the desired mode info to connector.
v2 by Jani:
- Dro
v11 of [1], incorporating DSI PLL work [2] from Vandita as well as PLL
mapping and gating patches [3] from me and [4] from Imre.
It made sense to squash some patches in [1] and [2] together, I've tried
to set authorship and co-developed-by tags fairly.
The series is also available in icl-dsi-2018
From: Madhav Chauhan
Display Pins are the only GPIOs that need to be used by
driver for DSI panels. So driver should now have its own
implementation to toggle these pins based on GPIO info
received from VBT sequences.
Signed-off-by: Madhav Chauhan
Signed-off-by: Jani Nikula
---
drivers/gpu/dr
Add encoder specific pll mapping for DSI. The differences with the DDI
version are big enough to warrant a separate function.
Cc: Madhav Chauhan
Cc: Vandita Kulkarni
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/icl_dsi.c | 24
1 file changed, 24 insertions(+)
d
From: Madhav Chauhan
This patch calculates various DPLL dividers and
parameters for DSI encoder and adjust AFE clock
for DSI. For DSI, 8x clock is AFE clock.
v2: Extend haswell_crtc_compute_clock() for Gen11 DSI
v3: Rebase
v4: use port clock instead of bitrate.
v5: Reabse and remove divide by
From: Madhav Chauhan
This patch read out the current hw state for DSI and
return true if encoder is active.
v2 by Jani:
- Squash connector get hw state hook here
- Squash encode get hw state fix here
v3 by Jani:
- Add encoder->get_power_domains() (Imre)
v4 by Jani:
- Make encoder->get_powe
From: Madhav Chauhan
This patch configures DSI video mode dual link by
programming DSS_CTL registers.
v2: Use new bitfield definitions from Anusha's patch
Correct register to be programmed and use max
depth buffer value (James)
v3 by Jani:
- checkpatch fixes
Signed-off-by: Madhav Chau
From: Madhav Chauhan
This patch implements compute config for Gen11 DSI encoder which is
required at the time of modeset.
For DSI 8X clock is AFE clock which is 5 times port clock.
v2 by Jani:
- drop the enable nop hook
- fixed_mode is always true
- HAS_GMCH_DISPLAY() is always false
v3 by
From: Madhav Chauhan
Allocate DSI host structure for each DSI port available on gen11 and
register them with DSI fwk of DRM. Some of the DSI host operations are
also registered as part of this.
Retrieves DSI pkt (from DSI msg) to be sent over DSI link using DRM DSI
exported functions. A wrapper
From: Madhav Chauhan
This patch fills backlight, CABC and general port
info for Gen11 DSI.
Signed-off-by: Madhav Chauhan
Reviewed-by: Jani Nikula
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/icl_dsi.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/icl
From: Madhav Chauhan
There are two panel power sequencers. Each register
has two addressable instances. This patch defines
both the instances of Panel power control register
Signed-off-by: Madhav Chauhan
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_reg.h | 11 +++
1 file c
From: Madhav Chauhan
For Gen11 DSI, we use similar registers like for eDP
to find if DSI encoder is connected or not to a pipe.
This patch refactors existing hsw_get_transcoder_state()
to handle this.
v2 by Jani:
- Add WARN_ON(dsi && edp) (Ville)
Signed-off-by: Madhav Chauhan
Signed-off-by: J
From: Madhav Chauhan
Transcoder timings for Gen11 DSI encoder
is available at pipe level unlike in older platform
where port specific registers need to be accessed.
v2 by Jani:
- get timings for (!dsi || icl) instead of (dsi && icl).
Signed-off-by: Madhav Chauhan
Signed-off-by: Jani Nikula
-
Some machines seem to have a broken opregion where the VBT overflows the
mailbox. Ignore this until properly fixed.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_bios.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_bios.c
b/drivers/gpu/drm/i915/intel_
From: Madhav Chauhan
Ungate the clocks on the selected port.
Signed-off-by: Madhav Chauhan
Signed-off-by: Vandita Kulkarni
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/icl_dsi.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/d
From: Madhav Chauhan
As per BSPEC, depending on the DSI transcoder being used,
DDI clock for the associated port should be gated. This
patch does the same.
Signed-off-by: Madhav Chauhan
Signed-off-by: Vandita Kulkarni
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/icl_dsi.c | 20 +++
Add dummy debug logging GPIO element execution function for ICL.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dsi_vbt.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi_vbt.c
b/drivers/gpu/drm/i915/intel_dsi_vbt.c
index b4
From: Madhav Chauhan
This patch define missing bitfield for shortplug ctl ddi
register which will be used for ICL DSI GPIO programming.
Signed-off-by: Madhav Chauhan
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/
From: Madhav Chauhan
For ICELAKE DSI, Display Pins are the only GPIOs
that need to be programmed. So DSI driver should have
its own implementation to toggle these pins based on
GPIO info coming from VBT sequences instead of using
platform specific GPIO driver.
Signed-off-by: Madhav Chauhan
Sign
From: Madhav Chauhan
Gen11 DSI doesn't use DCS commands based functionality
for enabling/disabling backlight but uses PWM based
functions similar to eDP.
Note by Jani: This should be decided by VBT, not hard coded. DCS
brightness control is still a thing.
Signed-off-by: Madhav Chauhan
Signed-o
== Series Details ==
Series: drm/i915: Remove whitelist application from ringbuffer backend
URL : https://patchwork.freedesktop.org/series/53243/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5222 -> Patchwork_10954
Summary
Enable ICL pipe csc hardware. CSC block is enabled
in CSC_MODE register instead of PLANE_COLOR_CTL.
v2: Addressed Maarten's review comments.
v3: Addressed Matt's review comments. Removed rmw patterns
as suggested by Matt.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/i915_reg.h| 2 +
Add the degamma and gamma lut sizes to gen11 capability
structure.
v2: Reorder the patch as per Maarten's suggestion.
v3: Rebase
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/i915_pci.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c
Add support for icl pipe degamma and gamma.
v2: Removed a POSTING_READ and corrected the Bit
Definition as per Maarten's comments.
v3: Addressed Matt's review comments. Removed rmw patterns
as suggested by Matt.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/i915_reg.h| 3 ++
drivers
This patch series adds support for Gen11 pipe degamma, CSC
and gamma hardware blocks.
CRC checks are not working for 10bit gamma but works for 8bit
pallete modes which seems to be due to some rounding errors in pipe.
ToDo: Support for Multi Segmented Gamma will be added later.
v2: Addressed Maar
>-Original Message-
>From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
>Brian Starkey
>Sent: Wednesday, November 28, 2018 8:17 PM
>To: Shankar, Uma
>Cc: Syrjala, Ville ; jo...@kwiboo.se; intel-
>g...@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>han
>-Original Message-
>From: Sharma, Shashank
>Sent: Wednesday, November 28, 2018 9:41 PM
>To: Shankar, Uma ; intel-gfx@lists.freedesktop.org;
>dri-de...@lists.freedesktop.org
>Cc: Lankhorst, Maarten ; Syrjala, Ville
>; jo...@kwiboo.se; hansv...@cisco.com;
>brian.star...@arm.com
>Subject: R
== Series Details ==
Series: drm/i915/icl: Remove Wa_1604302699
URL : https://patchwork.freedesktop.org/series/53244/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5222 -> Patchwork_10955
Summary
---
**WARNING**
M
On 29/11/2018 14:27, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Remove whitelist application from ringbuffer backend
> URL : https://patchwork.freedesktop.org/series/53243/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_5222 -> Patchwork_10954
> ==
== Series Details ==
Series: drm/i915/icl: dsi enabling (rev6)
URL : https://patchwork.freedesktop.org/series/51011/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a65617b53ade drm/i915/icl: push pll to port mapping/unmapping to ddi encoder
hooks
37ef11ea7aa7 drm/i915/icl: Sani
== Series Details ==
Series: drm/i915/icl: dsi enabling (rev6)
URL : https://patchwork.freedesktop.org/series/51011/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/icl: push pll to port mapping/unmapping to ddi encoder hooks
Okay!
Commit: drm
== Series Details ==
Series: Add support for Gen 11 pipe color features (rev3)
URL : https://patchwork.freedesktop.org/series/51408/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
1427600ab4e5 drm/i915/icl: Add icl pipe degamma and gamma support
-:74: CHECK:SPACING: No space is
== Series Details ==
Series: drm/i915/icl: dsi enabling (rev6)
URL : https://patchwork.freedesktop.org/series/51011/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5222 -> Patchwork_10956
Summary
---
**SUCCESS**
No
== Series Details ==
Series: Add support for Gen 11 pipe color features (rev3)
URL : https://patchwork.freedesktop.org/series/51408/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5222 -> Patchwork_10957
Summary
---
*
On Wed, Nov 28, 2018 at 5:07 AM Daniel Vetter wrote:
>
> I've misplaced two functions by accident:
> - drm_atomic_helper_duplicate_state is really part of the
> resume/suspend/shutdown device-wide helpers.
> - drm_atomic_helper_legacy_gamma_set is part of the legacy ioctl
> compat helpers.
>
>
The DDI eDP/pipe A/B/C transcoders must be enabled whenever we observe
the DDI buffer of the port connected to them to be enabled (via
DDI_BUF_CTL). Add a consistency check for this to the HW readout code of
these transcoders.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_ddi.c | 4 +++
== Series Details ==
Series: drm/i915: Fix the HDMI hot plug disconnection failure (rev4)
URL : https://patchwork.freedesktop.org/series/50477/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5220_full -> Patchwork_10943_full
== Series Details ==
Series: drm/i915/cnl: Fix the formulae for register offsets (rev2)
URL : https://patchwork.freedesktop.org/series/52960/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5220_full -> Patchwork_10944_full
S
== Series Details ==
Series: drm/i915: Remove whitelist application from ringbuffer backend (rev2)
URL : https://patchwork.freedesktop.org/series/53243/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5224 -> Patchwork_10958
== Series Details ==
Series: drm/i915/ddi: Check for unexpectedly disabled transcoders
URL : https://patchwork.freedesktop.org/series/53256/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5224 -> Patchwork_10959
Summary
On Thu, 29 Nov 2018 10:17:49 +0200
Jani Nikula wrote:
> On Wed, 28 Nov 2018, Guang Bai wrote:
> > On some GEN9 platforms, slowly unplugging (wiggling) the HDMI cable
> > makes the kernel to believe the HDMI display is still connected.
> > This is because the HDMI DDC lines are disconnected a lit
On Wed, Nov 28, 2018 at 11:52:49PM -0800, Saarinen, Jani wrote:
> Hi,
>
> > -Original Message-
> > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> > Of
> > Rodrigo Vivi
> > Sent: torstai 29. marraskuuta 2018 8.18
> > To: Souza, Jose
> > Cc: intel-gfx@lists.f
== Series Details ==
Series: drm/i915: Remove whitelist application from ringbuffer backend (rev3)
URL : https://patchwork.freedesktop.org/series/53243/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5224 -> Patchwork_10960
Daniel Vetter wrote:
> Do we have end-to-end userspace for this?
I have patches for IGT and I'm planning on adding usage code to Weston. Apart
from that there is a Windows use case that Tina mentioned previously. I take
it that you will need to see the Weston part before accepting this.
Thanks,
K
From: Ville Syrjälä
Rename the punit display power register to match the spec.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_reg.h | 2 +-
drivers/gpu/drm/i915/intel_cdclk.c | 14 +++---
drivers/gpu/drm/i915/intel_pm.c | 6 +++---
drivers/gpu/drm/i91
From: Ville Syrjälä
As there are no upstream drivers for VED or ISP let's just
assert that they are power gated. Otherwise they would
prevent s0ix entry.
For ISP this is only relevant when it is not exposed as a
PCI device and instead is a subordinate of the gunit. When
exposed as a PCI device i
== Series Details ==
Series: drm/i915: Signal the fences as they are cancelled due to wedging
URL : https://patchwork.freedesktop.org/series/53226/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5221_full -> Patchwork_10947_full
=
== Series Details ==
Series: series starting with [1/2] drm/i915:
s/PUNIT_REG_DSPFREQ/PUNIT_REG_DSPSSPM/
URL : https://patchwork.freedesktop.org/series/53275/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5224 -> Patchwork_10961
===
Reviewed-by: Lyude Paul
On Wed, 2018-11-28 at 23:12 +0100, Daniel Vetter wrote:
> When everyone implements it exactly the same way, among all 4
> implementations, there's not really a need to overwrite this at all.
>
> Aside: drm_kms_helper_hotplug_event is pretty much core functionality
> at th
From: Matt Atwood
According to DP spec (2.9.3.1 of DP 1.4) if
EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT is set the addresses in DPCD
02200h through 0220Fh shall contain the DPRX's true capability. These
values will match 0h through Fh, except for DPCD_REV,
MAX_LINK_RATE, DOWN_STREAM_PORT
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