[Intel-gfx] [PATCH v3 2/3] drm/i915: Make EDP PSR flags not depend on enum values

2018-11-20 Thread Imre Deak
Depending on the transcoder enum values to translate from transcoder to EDP PSR flags can easily break if we add a new transcoder. So remove the dependency by using an explicit mapping. While at it also add a WARN for unexpected trancoders. v2: - Simplify things by defining flag shift values inst

[Intel-gfx] [PATCH v3 3/3] drm/i915: Add code comment on assumption of pipe==transcoder

2018-11-20 Thread Imre Deak
Add a comment to the pipe and transcoder enum definitions about our assumption in the code about enum values for pipes and transcoders with a 1:1 transcoder -> pipe mapping. v2: - Clarify more what are the assumptions about the enum values. (Ville) v3: (Lucas) - s/->/ -> / so it looks less like po

[Intel-gfx] [PATCH 1/3] drm/i915: Make pipe/transcoder offsets not depend on enum values

2018-11-20 Thread Imre Deak
Depending on the transcoder enum values to translate from transcoder to pipe/transcoder register addresses can easily break if we add a new transcoder. So remove the dependency by using named initializers. Suggested-by: Ville Syrjälä Cc: Ville Syrjälä Signed-off-by: Imre Deak Reviewed-by: Ville

Re: [Intel-gfx] [PATCH 2/2] drm/atomic: Create and use __drm_atomic_helper_crtc_reset() everywhere

2018-11-20 Thread Philipp Zabel
On Mon, 2018-11-12 at 16:01 +0100, Maarten Lankhorst wrote: > We already have __drm_atomic_helper_connector_reset() and > __drm_atomic_helper_plane_reset(), extend this to crtc as well. > > Most drivers already have a gpu reset hook, correct it. > Nouveau already implemented its own __drm_atomic_h

Re: [Intel-gfx] [PATCH] drm/i915: Write GPU relocs harder with gen3

2018-11-20 Thread Joonas Lahtinen
Quoting Chris Wilson (2018-11-19 17:41:53) > Under moderate amounts of GPU stress, we can observe on Bearlake and > Pineview (later gen3 models) that we execute the following batch buffer > before the write into the batch is coherent. Adding extra (tested with > upto 32x) MI_FLUSH to either the inv

Re: [Intel-gfx] [PATCH] drm/i915: Write GPU relocs harder with gen3

2018-11-20 Thread Chris Wilson
Quoting Joonas Lahtinen (2018-11-20 09:48:36) > Quoting Chris Wilson (2018-11-19 17:41:53) > > Under moderate amounts of GPU stress, we can observe on Bearlake and > > Pineview (later gen3 models) that we execute the following batch buffer > > before the write into the batch is coherent. Adding ext

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Make pipe/transcoder offsets not depend on enum values

2018-11-20 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915: Make pipe/transcoder offsets not depend on enum values URL : https://patchwork.freedesktop.org/series/52742/ State : warning == Summary == $ dim checkpatch origin/drm-tip c9eb72bdc9a6 drm/i915: Make pipe/transcoder offsets not

[Intel-gfx] [PATCH] drm/i915/backlight: Fix backlight takeover on LPT

2018-11-20 Thread Maarten Lankhorst
On lynxpoint the bios sometimes sets up the backlight using the CPU display, but the driver expects using the PWM PCH override register. Read the value from the CPU register, then convert it to the other units by converting from the old duty cycle, to freq, to the new units. This value is then pr

[Intel-gfx] [PATCH] HAX FOR CI: Enable cross-release

2018-11-20 Thread Daniel Vetter
Only way to convince our CI to enable stuff that's new and defaulting to off. Obviously not for merging. v2: Also enable fullstack backtraces. Signed-off-by: Daniel Vetter --- lib/Kconfig.debug | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/Kconfig.debug b/lib/Kconfig

Re: [Intel-gfx] [PATCH] HAX FOR CI: Enable cross-release

2018-11-20 Thread Daniel Vetter
On Thu, Nov 08, 2018 at 09:41:47AM +, Chris Wilson wrote: > Quoting Daniel Vetter (2018-11-08 09:31:11) > > Only way to convince our CI to enable stuff that's new and defaulting > > to off. Obviously not for merging. > > See DRM_I915_DEBUG where we define what extras we need for CI. Yeah I kn

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Make pipe/transcoder offsets not depend on enum values

2018-11-20 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915: Make pipe/transcoder offsets not depend on enum values URL : https://patchwork.freedesktop.org/series/52742/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5169 -> Patchwork_10857 = == Summary - SUCCESS ==

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/backlight: Fix backlight takeover on LPT

2018-11-20 Thread Patchwork
== Series Details == Series: drm/i915/backlight: Fix backlight takeover on LPT URL : https://patchwork.freedesktop.org/series/52746/ State : warning == Summary == $ dim checkpatch origin/drm-tip 9b0ac137925f drm/i915/backlight: Fix backlight takeover on LPT -:43: CHECK:BRACES: braces {} should

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/backlight: Fix backlight takeover on LPT

2018-11-20 Thread Patchwork
== Series Details == Series: drm/i915/backlight: Fix backlight takeover on LPT URL : https://patchwork.freedesktop.org/series/52746/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/backlight: Fix backlight takeover on LPT -O:drivers/gpu/drm/i91

Re: [Intel-gfx] [PATCH v2 1/5] drm/i915: extract fixed point math to i915_fixed.h

2018-11-20 Thread Jani Nikula
On Fri, 16 Nov 2018, Jani Nikula wrote: > Reduce bloat in one of the bigger header files. Fix some indentation > while at it. No functional changes. > > v2: Add include guards (Joonas) > > Reviewed-by: Joonas Lahtinen > Signed-off-by: Jani Nikula Pushed the series, thanks for the review. BR, J

Re: [Intel-gfx] [PATCH 3/5] drm/i915/fixed: simplify FP_16_16_MAX definition

2018-11-20 Thread Jani Nikula
On Fri, 16 Nov 2018, Chris Wilson wrote: > Quoting Jani Nikula (2018-11-15 12:01:24) >> No need to use a compound statement enclosed in parenthesis where a C99 >> compound literal will do. No functional changes. >> >> Signed-off-by: Jani Nikula >> --- >> drivers/gpu/drm/i915/i915_fixed.h | 6 +-

Re: [Intel-gfx] "drm/i915: Use the correct crtc when sanitizing plane mapping" seems to cause the readback plane state to always be 0

2018-11-20 Thread Ville Syrjälä
On Mon, Nov 19, 2018 at 11:47:00PM +0100, Hans de Goede wrote: > Hi Ville, > > While debugging the briefly purple screen on DSI panels issue for > which I just send a revert, I also noticed something odd with > your commit 9b27390139db ("drm/i915: Use the correct crtc when > sanitizing plane mappi

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/backlight: Fix backlight takeover on LPT

2018-11-20 Thread Patchwork
== Series Details == Series: drm/i915/backlight: Fix backlight takeover on LPT URL : https://patchwork.freedesktop.org/series/52746/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5169 -> Patchwork_10858 = == Summary - SUCCESS == No regressions found. External URL: ht

[Intel-gfx] [PATCH] drm/i915/selftests: Hold task reference to reset worker

2018-11-20 Thread Chris Wilson
As the worker may exit by itself, we need to hold a task reference to it in the parent. References: https://bugs.freedesktop.org/show_bug.cgi?id=108735 Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/13] locking/lockdep: restore cross-release checks (rev3)

2018-11-20 Thread Patchwork
== Series Details == Series: series starting with [01/13] locking/lockdep: restore cross-release checks (rev3) URL : https://patchwork.freedesktop.org/series/52167/ State : warning == Summary == $ dim checkpatch origin/drm-tip a3b9f37357c8 locking/lockdep: restore cross-release checks -:9: WA

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/13] locking/lockdep: restore cross-release checks (rev3)

2018-11-20 Thread Patchwork
== Series Details == Series: series starting with [01/13] locking/lockdep: restore cross-release checks (rev3) URL : https://patchwork.freedesktop.org/series/52167/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: locking/lockdep: restore cross-release

Re: [Intel-gfx] "drm/i915: Use the correct crtc when sanitizing plane mapping" seems to cause the readback plane state to always be 0

2018-11-20 Thread Hans de Goede
Hi, On 20-11-18 12:28, Ville Syrjälä wrote: On Mon, Nov 19, 2018 at 11:47:00PM +0100, Hans de Goede wrote: Hi Ville, While debugging the briefly purple screen on DSI panels issue for which I just send a revert, I also noticed something odd with your commit 9b27390139db ("drm/i915: Use the corr

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [01/13] locking/lockdep: restore cross-release checks (rev3)

2018-11-20 Thread Patchwork
== Series Details == Series: series starting with [01/13] locking/lockdep: restore cross-release checks (rev3) URL : https://patchwork.freedesktop.org/series/52167/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_5171 -> Patchwork_10859 = == Summary - FAILURE == Serious u

Re: [Intel-gfx] [igt-dev] [PATCH v17 2/4] tests/gem_ctx_sseu: Dynamic (sub)slice programming tests

2018-11-20 Thread Joonas Lahtinen
Quoting Tvrtko Ursulin (2018-11-15 18:37:07) > From: Lionel Landwerlin > > Verify that the per-context dynamic SSEU uAPI works as expected. > +static bool > +kernel_has_per_context_sseu_support(int fd) > +{ > + struct drm_i915_gem_context_param_sseu sseu = { }; > + struct drm_i915_

Re: [Intel-gfx] [PATCH i-g-t 3/4] tests/gem_media_vme: Simple test to exercise the VME block

2018-11-20 Thread Joonas Lahtinen
+ Haihaho who's been involved with gem_media_fill test, if you could provide review, too. Quoting Tvrtko Ursulin (2018-11-13 16:36:28) > From: Tony Ye > > Simple test which exercises the VME fixed function block. > > v2: (Tvrtko Ursulin) > * Small cleanups like copyright date, tabs, remove unu

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Hold task reference to reset worker

2018-11-20 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Hold task reference to reset worker URL : https://patchwork.freedesktop.org/series/52750/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5171 -> Patchwork_10860 = == Summary - SUCCESS == No regressions found. External UR

Re: [Intel-gfx] [PATCH v2 0/7] Make GEN macros more similar

2018-11-20 Thread Tvrtko Ursulin
On 19/11/2018 22:20, Lucas De Marchi wrote: On Thu, Nov 08, 2018 at 11:23:46AM +, Tvrtko Ursulin wrote: [snip] So are you against changing the == to use the macros, changing the >=, >, <, <=, or all of them? Definitely not all of them. Just plain if ladders I think are definitely more

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915: Make pipe/transcoder offsets not depend on enum values

2018-11-20 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915: Make pipe/transcoder offsets not depend on enum values URL : https://patchwork.freedesktop.org/series/52742/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5169_full -> Patchwork_10857_full = == Summary - WAR

[Intel-gfx] [PATCH 1/2] drm/i915: Force a LUT update in intel_initial_commit()

2018-11-20 Thread Ville Syrjala
From: Ville Syrjälä If we force a plane update to fix up our half populated plane state we'll also force on the pipe gamma for the plane (since we always enable pipe gamma currently). If the BIOS hasn't programmed a sensible LUT into the hardware this will cause the image to become corrupted. Typ

[Intel-gfx] [PATCH 2/2] drm/i915: Add rotation readout for plane initial config

2018-11-20 Thread Ville Syrjala
From: Ville Syrjälä If we need to force a full plane update before userspace/fbdev have given us a proper plane state we should try to maintain the current plane state as much as possible (apart from the parts of the state we're trying to fix up with the plane update). To that end add basic reado

[Intel-gfx] [v3 0/3] Add Colorspace connector property interface

2018-11-20 Thread Uma Shankar
This patch series creates a new connector property to program colorspace to sink devices. Modern sink devices support more than 1 type of colorspace like 601, 709, BT2020 etc. This helps to switch based on content type which is to be displayed. The decision lies with compositors as to in which scen

[Intel-gfx] [v3 2/3] drm: Add DP colorspace property

2018-11-20 Thread Uma Shankar
This patch adds a DP colorspace property, enabling userspace to switch to various supported colorspaces. This will help enable BT2020 along with other colorspaces. v2: Addressed Maarten and Ville's review comments. Enhanced the colorspace enum to incorporate both HDMI and DP supported colo

[Intel-gfx] [v3 1/3] drm: Add HDMI colorspace property

2018-11-20 Thread Uma Shankar
This patch adds a HDMI colorspace property, enabling userspace to switch to various supported colorspaces. This will help enable BT2020 along with other colorspaces. v2: Addressed Maarten and Ville's review comments. Enhanced the colorspace enum to incorporate both HDMI and DP supported colorspace

[Intel-gfx] [v3 3/3] drm/i915: Attach colorspace property and enable modeset

2018-11-20 Thread Uma Shankar
This patch attaches the colorspace connector property to the hdmi connector. Based on colorspace change, modeset will be triggered to switch to new colorspace. Based on colorspace property value create an infoframe with appropriate colorspace. This can be used to send an infoframe packet with prop

[Intel-gfx] [PATCH 2/2] drm/i915: Re-enable fastset by default

2018-11-20 Thread Maarten Lankhorst
Now that we've solved the backlight issue, I think it's time to enable this again by default. We've enabled it in the past, but backlight issues prevented us from enabling it by default. Our hardware readout is pretty complete, and with all of the connector state moved to atomic I'm hoping we fina

[Intel-gfx] [PATCH 1/2] drm/i915: Enable fastset for non-boot modesets.

2018-11-20 Thread Maarten Lankhorst
Now that our state comparison functions are pretty complete, we should enable fastset by default when a modeset can be avoided. Even if we're not completely certain about the inherited state, we can be certain after the first modeset that our sw state matches the hw state. Signed-off-by: Maarten L

Re: [Intel-gfx] [v3 2/3] drm: Add DP colorspace property

2018-11-20 Thread Chris Wilson
Quoting Uma Shankar (2018-11-20 14:22:10) > @@ -1457,6 +1480,18 @@ int drm_mode_create_colorspace_property(struct > drm_connector *connector) > return -ENOMEM; > > dev->mode_config.hdmi_colorspace_property = prop; > + } else if (connector->connector_

Re: [Intel-gfx] [PATCH 0/5] drm/gem: Add drm_gem_object_funcs

2018-11-20 Thread Noralf Trønnes
Den 10.11.2018 15.56, skrev Noralf Trønnes: This patchset adds a GEM object function table and makes use of it in the CMA helper. This was originally part of a shmem helper series[1] that didn't make it. Daniel and Christian showed interest in the vtable part so I have hooked it up to some refac

Re: [Intel-gfx] [v3 2/3] drm: Add DP colorspace property

2018-11-20 Thread Shankar, Uma
>-Original Message- >From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] >Sent: Tuesday, November 20, 2018 7:41 PM >To: Shankar, Uma ; dri-de...@lists.freedesktop.org; >intel-gfx@lists.freedesktop.org >Cc: Syrjala, Ville ; jo...@kwiboo.se; >hansv...@cisco.com; Shankar, Uma ; Lankhorst, >

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Hold task reference to reset worker

2018-11-20 Thread Joonas Lahtinen
Quoting Chris Wilson (2018-11-20 14:06:01) > As the worker may exit by itself, we need to hold a task reference to it > in the parent. > > References: https://bugs.freedesktop.org/show_bug.cgi?id=108735 > Signed-off-by: Chris Wilson Checks out. I assume you hit this during debug of the above bug

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Hold task reference to reset worker

2018-11-20 Thread Chris Wilson
Quoting Joonas Lahtinen (2018-11-20 14:17:33) > Quoting Chris Wilson (2018-11-20 14:06:01) > > As the worker may exit by itself, we need to hold a task reference to it > > in the parent. > > > > References: https://bugs.freedesktop.org/show_bug.cgi?id=108735 > > Signed-off-by: Chris Wilson > > C

Re: [Intel-gfx] [PATCH v12 1/2] drm: Introduce new DRM_FORMAT_XYUV

2018-11-20 Thread Ville Syrjälä
On Fri, Nov 09, 2018 at 11:39:15AM +0200, Stanislav Lisovskiy wrote: > v5: This is YUV444 packed format same as AYUV, but without alpha, > as supported by i915. > > v6: Removed unneeded initializer for new XYUV format. > > v7: Added is_yuv field initialization according to latest > drm_fo

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Force a LUT update in intel_initial_commit()

2018-11-20 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Force a LUT update in intel_initial_commit() URL : https://patchwork.freedesktop.org/series/52754/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5172 -> Patchwork_10861 = == Summary - SUCCESS == No regres

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/backlight: Fix backlight takeover on LPT

2018-11-20 Thread Patchwork
== Series Details == Series: drm/i915/backlight: Fix backlight takeover on LPT URL : https://patchwork.freedesktop.org/series/52746/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5169_full -> Patchwork_10858_full = == Summary - WARNING == Minor unknown changes coming wit

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add Colorspace connector property interface (rev3)

2018-11-20 Thread Patchwork
== Series Details == Series: Add Colorspace connector property interface (rev3) URL : https://patchwork.freedesktop.org/series/47132/ State : warning == Summary == $ dim checkpatch origin/drm-tip a84155117012 drm: Add HDMI colorspace property -:105: CHECK:PARENTHESIS_ALIGNMENT: Alignment shoul

Re: [Intel-gfx] [v3 2/3] drm: Add DP colorspace property

2018-11-20 Thread Ville Syrjälä
On Tue, Nov 20, 2018 at 02:16:38PM +, Shankar, Uma wrote: > > > >-Original Message- > >From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] > >Sent: Tuesday, November 20, 2018 7:41 PM > >To: Shankar, Uma ; dri-de...@lists.freedesktop.org; > >intel-gfx@lists.freedesktop.org > >Cc: Syrj

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add Colorspace connector property interface (rev3)

2018-11-20 Thread Patchwork
== Series Details == Series: Add Colorspace connector property interface (rev3) URL : https://patchwork.freedesktop.org/series/47132/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm: Add HDMI colorspace property Okay! Commit: drm: Add DP colorspace

Re: [Intel-gfx] [v3 1/3] drm: Add HDMI colorspace property

2018-11-20 Thread Ville Syrjälä
On Tue, Nov 20, 2018 at 07:52:09PM +0530, Uma Shankar wrote: > This patch adds a HDMI colorspace property, enabling > userspace to switch to various supported colorspaces. > This will help enable BT2020 along with other colorspaces. > > v2: Addressed Maarten and Ville's review comments. Enhanced >

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Enable fastset for non-boot modesets.

2018-11-20 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Enable fastset for non-boot modesets. URL : https://patchwork.freedesktop.org/series/52758/ State : warning == Summary == $ dim checkpatch origin/drm-tip 3b5cfdf09793 drm/i915: Enable fastset for non-boot modesets. -:36: CHECK:

Re: [Intel-gfx] [PATCH 2/4] include/linux/ascii85: Update ascii85_encode()

2018-11-20 Thread Jordan Crouse
On Tue, Nov 20, 2018 at 05:07:29PM +0530, Sharat Masetty wrote: > The current implementation of ascii85_encode() does not copy the encoded > buffer 'z' to the output buffer in case the input is zero. This patch > simply adds this missing piece. This makes it easier to use this > function to encode

[Intel-gfx] ✓ Fi.CI.BAT: success for Add Colorspace connector property interface (rev3)

2018-11-20 Thread Patchwork
== Series Details == Series: Add Colorspace connector property interface (rev3) URL : https://patchwork.freedesktop.org/series/47132/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5174 -> Patchwork_10862 = == Summary - SUCCESS == No regressions found. External URL: h

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Enable fastset for non-boot modesets.

2018-11-20 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Enable fastset for non-boot modesets. URL : https://patchwork.freedesktop.org/series/52758/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5174 -> Patchwork_10863 = == Summary - SUCCESS == No regressions f

[Intel-gfx] [PATCH 1/4] drm/edid: Pass connector to AVI inforframe functions

2018-11-20 Thread Ville Syrjala
From: Ville Syrjälä Make life easier for drivers by simply passing the connector to drm_hdmi_avi_infoframe_from_display_mode() and drm_hdmi_avi_infoframe_quant_range(). That way drivers don't need to worry about is_hdmi2_sink mess. Cc: Alex Deucher Cc: "Christian König" Cc: "David (ChunMing) Z

[Intel-gfx] [PATCH 2/4] drm/i915: Use drm_hdmi_avi_infoframe_quant_range() for SDVO HDMI as well

2018-11-20 Thread Ville Syrjala
From: Ville Syrjälä Fill out the AVI infoframe quantization range bits using drm_hdmi_avi_infoframe_quant_range() for SDVO HDMI encoder as well. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_sdvo.c | 19 ++- 1 file changed, 10 insertions(+), 9 deletions(-) diff -

[Intel-gfx] [PATCH 3/4] drm/radeon: Use drm_hdmi_avi_infoframe_quant_range()

2018-11-20 Thread Ville Syrjala
From: Ville Syrjälä Fill out the AVI infoframe quantization range bits using drm_hdmi_avi_infoframe_quant_range() instead of hand rolling it. This changes the behaviour slightly as drm_hdmi_avi_infoframe_quant_range() will set a non-zero Q bit even when QS==0 iff the Q bit matched the default qu

[Intel-gfx] [PATCH 4/4] drm/edid: Add display_info.rgb_quant_range_selectable

2018-11-20 Thread Ville Syrjala
From: Ville Syrjälä Move the CEA-861 QS bit handling entirely into the edid code. No need to bother the drivers with this. Cc: Alex Deucher Cc: "Christian König" Cc: "David (ChunMing) Zhou" Cc: amd-...@lists.freedesktop.org Cc: Eric Anholt (supporter:DRM DRIVERS FOR VC4) Signed-off-by: Ville

Re: [Intel-gfx] [PATCH 1/4] drm/edid: Pass connector to AVI inforframe functions

2018-11-20 Thread Thierry Reding
On Tue, Nov 20, 2018 at 06:13:42PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Make life easier for drivers by simply passing the connector > to drm_hdmi_avi_infoframe_from_display_mode() and > drm_hdmi_avi_infoframe_quant_range(). That way drivers don't > need to worry about is_hdmi2_s

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/edid: Pass connector to AVI inforframe functions

2018-11-20 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/edid: Pass connector to AVI inforframe functions URL : https://patchwork.freedesktop.org/series/52767/ State : warning == Summary == $ dim checkpatch origin/drm-tip 3b5027b538c5 drm/edid: Pass connector to AVI inforframe functions 25

[Intel-gfx] [PATCH 2/4] drm/edid: Abstract away cea_edid_modes[]

2018-11-20 Thread Ville Syrjala
From: Ville Syrjälä We're going to need two cea mode tables (on for VICs < 128, another one for VICs >= 193). To that end replace the direct edid_cea_modes[] lookups with a function call. And we'll rename the array to edid_cea_modes_0[] to indicathe how it's to be indexed. Cc: Hans Verkuil Cc:

[Intel-gfx] [PATCH 1/4] drm/edid: Add CTA-861-G modes with VIC < 128

2018-11-20 Thread Ville Syrjala
From: Ville Syrjälä Fill out our list of cea modes with the new stuff from CTA-861-G. We only do the modes with VIC < 128 here. Adding the higher numbered VICs will need some slight code refactoring first. Cc: Hans Verkuil Cc: Shashank Sharma Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/

[Intel-gfx] [PATCH 4/4] drm/edid: Throw away the dummy VIC 0 cea mode

2018-11-20 Thread Ville Syrjala
From: Ville Syrjälä Now that the cea mode handling is not 100% tied to the single array the dummy VIC 0 mode is pretty much pointles. Throw it out. Cc: Hans Verkuil Cc: Shashank Sharma Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/drm_edid.c | 14 +- 1 file changed, 5 insertio

[Intel-gfx] [PATCH 3/4] drm/edid: Add CTA-861-G modes with VIC >= 193

2018-11-20 Thread Ville Syrjala
From: Ville Syrjälä Add a second table to the cea modes with VIC >= 193. Cc: Hans Verkuil Cc: Shashank Sharma Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/drm_edid.c | 151 - 1 file changed, 149 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/d

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/edid: Pass connector to AVI inforframe functions

2018-11-20 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/edid: Pass connector to AVI inforframe functions URL : https://patchwork.freedesktop.org/series/52767/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5174 -> Patchwork_10864 = == Summary - SUCCESS == No regressi

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/edid: Add CTA-861-G modes with VIC < 128

2018-11-20 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/edid: Add CTA-861-G modes with VIC < 128 URL : https://patchwork.freedesktop.org/series/52770/ State : warning == Summary == $ dim checkpatch origin/drm-tip 4fec2531580e drm/edid: Add CTA-861-G modes with VIC < 128 4214536fc50e drm/ed

Re: [Intel-gfx] [PATCH v9 22/24] drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION

2018-11-20 Thread Manasi Navare
On Mon, Nov 19, 2018 at 10:19:42PM +0200, Ville Syrjälä wrote: > On Tue, Nov 13, 2018 at 05:52:30PM -0800, Manasi Navare wrote: > > From: Anusha Srivatsa > > > > If the panel supports FEC, the driver has to > > set the FEC_READY bit in the dpcd register: > > FEC_CONFIGURATION. > > > > This has t

[Intel-gfx] [PATCH] drm/i915/selftests: Log test and subtest names for easier debugging

2018-11-20 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Since pr_debug is not printed by default, change both test and subtest log messages to pr_info so they are always logged. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/selftests/i915_selftest.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Log test and subtest names for easier debugging

2018-11-20 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-11-20 17:28:39) > From: Tvrtko Ursulin > > Since pr_debug is not printed by default, change both test and subtest > log messages to pr_info so they are always logged. I just use the trace... As when the test fails we say which subtest failed, and hopefully include mo

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/edid: Add CTA-861-G modes with VIC < 128

2018-11-20 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/edid: Add CTA-861-G modes with VIC < 128 URL : https://patchwork.freedesktop.org/series/52770/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5174 -> Patchwork_10865 = == Summary - SUCCESS == No regressions found

[Intel-gfx] [PATCH] drm/atomic: Fix the early return in drm_atomic_set_mode_for_crtc()

2018-11-20 Thread Ville Syrjala
From: Ville Syrjälä The early return in drm_atomic_set_mode_for_crtc() isn't quite right. It would mistakenly return and fail to update crtc_state->enable if someone actually tried to set a zeroed mode on a currently disabled crtc. I suppose that should never happen but better safe than sorry. A

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Log test and subtest names for easier debugging

2018-11-20 Thread Tvrtko Ursulin
On 20/11/2018 17:33, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-11-20 17:28:39) From: Tvrtko Ursulin Since pr_debug is not printed by default, change both test and subtest log messages to pr_info so they are always logged. I just use the trace... As when the test fails we say which su

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Log test and subtest names for easier debugging

2018-11-20 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Log test and subtest names for easier debugging URL : https://patchwork.freedesktop.org/series/52774/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5174 -> Patchwork_10866 = == Summary - SUCCESS == No regressions found.

[Intel-gfx] [PATCH i-g-t] tests/drv_selftest: Allow passing in module options from the command line

2018-11-20 Thread Tvrtko Ursulin
From: Tvrtko Ursulin A new option '--kmod-options' is added which takes a string which will be passed to modprobe when loading the module. This for instance allows easy override of things like the random seed when trying to reproduce failures. Signed-off-by: Tvrtko Ursulin --- lib/igt_core.c

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Log test and subtest names for easier debugging

2018-11-20 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-11-20 17:58:33) > > On 20/11/2018 17:33, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2018-11-20 17:28:39) > >> From: Tvrtko Ursulin > >> > >> Since pr_debug is not printed by default, change both test and subtest > >> log messages to pr_info so they are always log

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Hold task reference to reset worker

2018-11-20 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Hold task reference to reset worker URL : https://patchwork.freedesktop.org/series/52750/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5171_full -> Patchwork_10860_full = == Summary - WARNING == Minor unknown changes comi

Re: [Intel-gfx] [PATCH i-g-t] tests/drv_selftest: Allow passing in module options from the command line

2018-11-20 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-11-20 18:07:57) > From: Tvrtko Ursulin > > A new option '--kmod-options' is added which takes a string which will be > passed to modprobe when loading the module. > > This for instance allows easy override of things like the random seed when > trying to reproduce fai

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Log test and subtest names for easier debugging

2018-11-20 Thread Tvrtko Ursulin
On 20/11/2018 18:10, Chris Wilson wrote: > Quoting Tvrtko Ursulin (2018-11-20 17:58:33) >> >> On 20/11/2018 17:33, Chris Wilson wrote: >>> Quoting Tvrtko Ursulin (2018-11-20 17:28:39) From: Tvrtko Ursulin Since pr_debug is not printed by default, change both test and subtest l

Re: [Intel-gfx] [PATCH i-g-t] tests/drv_selftest: Allow passing in module options from the command line

2018-11-20 Thread Chris Wilson
Quoting Chris Wilson (2018-11-20 18:16:53) > Quoting Tvrtko Ursulin (2018-11-20 18:07:57) > > From: Tvrtko Ursulin > > > > A new option '--kmod-options' is added which takes a string which will be > > passed to modprobe when loading the module. > > > > This for instance allows easy override of t

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/atomic: Fix the early return in drm_atomic_set_mode_for_crtc()

2018-11-20 Thread Patchwork
== Series Details == Series: drm/atomic: Fix the early return in drm_atomic_set_mode_for_crtc() URL : https://patchwork.freedesktop.org/series/52777/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5174 -> Patchwork_10867 = == Summary - SUCCESS == No regressions found.

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Log test and subtest names for easier debugging

2018-11-20 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-11-20 18:18:00) > > On 20/11/2018 18:10, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2018-11-20 17:58:33) > >> > >> On 20/11/2018 17:33, Chris Wilson wrote: > >>> Quoting Tvrtko Ursulin (2018-11-20 17:28:39) > From: Tvrtko Ursulin > > Since pr_debug

Re: [Intel-gfx] [PATCH i-g-t] tests/drv_selftest: Allow passing in module options from the command line

2018-11-20 Thread Tvrtko Ursulin
On 20/11/2018 18:16, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-11-20 18:07:57) From: Tvrtko Ursulin A new option '--kmod-options' is added which takes a string which will be passed to modprobe when loading the module. This for instance allows easy override of things like the random se

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Force a LUT update in intel_initial_commit()

2018-11-20 Thread Hans de Goede
Hi Ville, On 20-11-18 14:54, Ville Syrjala wrote: From: Ville Syrjälä If we force a plane update to fix up our half populated plane state we'll also force on the pipe gamma for the plane (since we always enable pipe gamma currently). If the BIOS hasn't programmed a sensible LUT into the hardwa

[Intel-gfx] [PATCH v10 05/23] drm/dsc: Add helpers for DSC picture parameter set infoframes

2018-11-20 Thread Manasi Navare
According to Display Stream compression spec 1.2, the picture parameter set metadata is sent from source to sink device using the DP Secondary data packet. An infoframe is formed for the PPS SDP header and PPS SDP payload bytes. This patch adds helpers to fill the PPS SDP header and PPS SDP payload

[Intel-gfx] [PATCH v10 04/23] drm/dsc: Define Rate Control values that do not change over configurations

2018-11-20 Thread Manasi Navare
From: "Srivatsa, Anusha" DSC has some Rate Control values that remain constant across all configurations. These are as per the DSC standard. v3: * Define them in drm_dsc.h as they are DSC constants (Manasi) v2: * Add DP_DSC_ prefix (Jani Nikula) Cc: dri-de...@lists.freedesktop.org Cc: Manasi Na

[Intel-gfx] [PATCH v10 03/23] drm/dsc: Define VESA Display Stream Compression Capabilities

2018-11-20 Thread Manasi Navare
This defines all the DSC parameters as per the VESA DSC spec that will be required for DSC encoder/decoder v6: (From Manasi) * Add a bit mask for RANGE_BPG_OFFSET for 6 bits(Manasi) v5 (From Manasi) * Add the RC constants as per the spec v4 (From Manasi) * Add the DSC_MUX_WORD_SIZE constants (Mana

[Intel-gfx] [PATCH v10 07/23] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state

2018-11-20 Thread Manasi Navare
Basic DSC parameters and DSC configuration data needs to be computed for each of the requested mode during atomic check. This is required since for certain modes, valid DSC parameters and config data might not be computed in which case compression cannot be enabled for that mode. For that reason we

[Intel-gfx] [PATCH v10 12/23] drm/i915/dp: Enable/Disable DSC in DP Sink

2018-11-20 Thread Manasi Navare
From: Gaurav K Singh This patch enables decompression support in sink device before link training and disables the same during the DDI disabling. v3 (From manasi): * Pass bool state to enable/disable (Ville) v2:(From Manasi) * Change the enable/disable function to take crtc_state instead of inte

[Intel-gfx] [PATCH v10 10/23] drm/i915/dsc: Define & Compute VESA DSC params

2018-11-20 Thread Manasi Navare
From: Gaurav K Singh This patches does the following: 1. This patch defines all the DSC parameters as per the VESA DSC specification. These are stored in the encoder and used to compute the PPS parameters to be sent to the Sink. 2. Compute all the DSC parameters which are derived from DSC state

[Intel-gfx] [PATCH v10 06/23] drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants

2018-11-20 Thread Manasi Navare
DSC specification defines linebuf_depth which contains the line buffer bit depth used to generate the bitstream. These values are defined as per Table 4.1 in DSC 1.2 spec v2 (From Manasi): * Rename as MAX_LINEBUF_DEPTH for DSC 1.1 and DSC 1.2 Cc: dri-de...@lists.freedesktop.org Cc: Jani Nikula C

[Intel-gfx] [PATCH v10 19/23] drm/i915/dsc: Enable and disable appropriate power wells for VDSC

2018-11-20 Thread Manasi Navare
A separate power well 2 (PG2) is required for VDSC on eDP transcoder whereas all other transcoders use the power wells associated with the transcoders for VDSC. This patch adds a helper to obtain correct power domain depending on transcoder being used and enables/disables the power wells during VDS

[Intel-gfx] [PATCH v10 16/23] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes

2018-11-20 Thread Manasi Navare
DSC PPS secondary data packet infoframes are filled with DSC picure parameter set metadata according to the DSC standard. These infoframes are sent to the sink device and used during DSC decoding. v3: * Rename to intel_dp_write_pps_sdp (Ville) * Use const intel_crtc_state (Ville) v2: * Rebase ond

[Intel-gfx] [PATCH v10 02/23] drm/dsc: Define Display Stream Compression PPS infoframe

2018-11-20 Thread Manasi Navare
This patch defines a new header file for all the DSC 1.2 structures and creates a structure for PPS infoframe which will be used to send picture parameter set secondary data packet for display stream compression. All the PPS infoframe syntax elements are taken from DSC 1.2 specification from VESA.

[Intel-gfx] [PATCH v10 17/23] drm/i915/dp: Configure Display stream splitter registers during DSC enable

2018-11-20 Thread Manasi Navare
Display Stream Splitter registers need to be programmed to enable the joiner if two DSC engines are used and also to enable the left and the right DSC engines. This happens as part of the DSC enabling routine in the source in atomic commit. v4: * Remove redundant comment (Ville) v3: * Use cpu_tran

[Intel-gfx] [PATCH v10 08/23] drm/i915/dp: Compute DSC pipe config in atomic check

2018-11-20 Thread Manasi Navare
DSC params like the enable, compressed bpp, slice count and dsc_split are added to the intel_crtc_state. These parameters are set based on the requested mode and available link parameters during the pipe configuration in atomic check phase. These values are then later used to populate the remaining

[Intel-gfx] [PATCH v10 00/23] Respin of remaining DSC + FEC patches

2018-11-20 Thread Manasi Navare
This patch series addresses review comments from previous series posted: https://patchwork.freedesktop.org/series/52461/ Anusha Srivatsa (4): i915/dp/fec: Add fec_enable to the crtc state. drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION i915/dp/fec: Configure the Forward Error Correction bi

[Intel-gfx] [PATCH v10 13/23] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI

2018-11-20 Thread Manasi Navare
On Icelake, a separate power well PG2 is created for VDSC engine used for eDP/MIPI DSI. This patch adds a new display power domain for Power well 2. v3: * Call it POWER_DOMAIN_TRANSCODER_EDP_VDSC (Ville) * Move it around TRANSCODER power domain defs (Ville) v2: * Fix the power well mismatch CI er

[Intel-gfx] [PATCH v10 11/23] drm/i915/dsc: Compute Rate Control parameters for DSC

2018-11-20 Thread Manasi Navare
From: Gaurav K Singh This computation of RC params happens in the atomic commit phase during compute_config() to validate if display stream compression can be enabled for the requested mode. v7 (From Manasi): * Use DRM_DEBUG instead of DRM_ERROR (Ville) * Use Error numberinstead of -1 (Ville) v6

[Intel-gfx] [PATCH v10 22/23] i915/dp/fec: Configure the Forward Error Correction bits.

2018-11-20 Thread Manasi Navare
From: Anusha Srivatsa If FEC is supported, the corresponding DP_TP_CTL register bits have to be configured. The driver has to program the FEC_ENABLE in DP_TP_CTL[30] register and wait till FEC_STATUS in DP_TP_CTL[28] is 1. Also add the warn message to make sure that the control register is alrea

[Intel-gfx] [PATCH v10 15/23] drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs

2018-11-20 Thread Manasi Navare
Infoframes are used to send secondary data packets. This patch adds support for DSC Picture parameter set secondary data packets in the existing write_infoframe helpers. v3: * Unused variables cleanup (Ville) v2: * Rebase on drm-tip (Manasi) Cc: Jani Nikula Cc: Ville Syrjala Cc: Anusha Srivatsa

[Intel-gfx] [PATCH v10 01/23] drm/dsc: Modify DRM helper to return complete DSC color depth capabilities

2018-11-20 Thread Manasi Navare
DSC DPCD color depth register advertises its color depth capabilities by setting each of the bits that corresponding to a specific color depth. This patch defines those specific color depths and adds a helper to return an array of color depth capabilities. v2: * Simplify the logic (Ville) Signed-

[Intel-gfx] [PATCH v10 20/23] i915/dp/fec: Add fec_enable to the crtc state.

2018-11-20 Thread Manasi Navare
From: Anusha Srivatsa For DP 1.4 and above, Display Stream compression can be enabled only if Forward Error Correctin can be performed. Add a crtc state for FEC. Currently, the state is determined by platform, DP and DSC being enabled. Moving forward we can use the state to have error correction

[Intel-gfx] [PATCH v10 09/23] drm/i915/dp: Do not enable PSR2 if DSC is enabled

2018-11-20 Thread Manasi Navare
If a eDP panel supports both PSR2 and VDSC, our HW cannot support both at a time. Give priority to PSR2 if a requested resolution can be supported without compression else enable VDSC and keep PSR2 disabled. v4: Fix the unrealted stuff removed during rebase (Ville) v3: * Rebase v2: * Add warning f

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