This patch extends g2v notification to notify host GVT-g of
ppgtt update from guest, including alloc_4lvl, clear_4lv4 and
insert_4lvl. It uses shared page to pass the additional params.
This patch also add one new pvmmio level to control ppgtt update.
Use PVMMIO_PPGTT_UPDATE to control this level
both u32 pv_caps field and pvmmio_caps are used to control the different
level pvmmio feature for MMIO emulation in both guest and GVT.
These fields are default zero, no pvmmio feature enabled.
it also adds VGT_CAPS_PVMMIO capability BIT for guest to check GVTg
can support PV feature or not.
v0:
To enable pvmmio feature, we need to prepare one 4K shared page
which will be accessed by both guest and backend i915 driver used for
data exchagne.
the layout of shared_page also defined as well in this patch.
guest i915 will allocate one page memory and then pass this page's physical
address to
implement enable_pvmmio PVINFO register handler in GVTg to
control different level pvmmio optimization within guest.
report VGT_CAPS_PVMMIO capability in pvinfo page for guest.
v0: RFC
v1: rebase
v2: rebase
v3: renamed enable_pvmmio to pvmmio_caps which is used for host
pv caps.
Cc: Zhenyu Wang
To improve GVTg performance, it could reduce the mmio access trap
numbers within guest driver in some certain scenarios since mmio
access trap will introuduce vm exit/vm enter cost.
the solution in this patch set is to setup a shared memory region
which accessed both by guest and GVTg without trap
It is performance optimization to reduce mmio trap numbers from 4 to
1 durning ELSP porting writing (context submission).
When context subission, to cache elsp_data[4] values in
the shared page, the last elsp_data[0] port writing will be trapped
to gvt for real context submission.
Use PVMMIO_ELSP
GVTg implemented shared_page setup operation and read_shared_page
functionality based on hypervisor_read_gpa().
the shared_page_gpa was passed from guest driver through PVINFO
shared_page_gpa register.
v0: RFC
v1: rebase
v2: rebase
v3: added shared_page_gpa check and if read_gpa failure, return z
implemented context submission pvmmio optimizaiton with GVTg.
GVTg to read context submission data (elsp_data) from the shared_page
directly without trap cost to improve guest GPU peformrnace.
v0: RFC
v1: rebase
v2: rebase
v3: report pv context submission cap and handle VGT_G2V_ELSP_SUBMIT
g2v pv
This patch handles ppgtt update from g2v notification.
It read out ppgtt pte entries from guest pte tables page and
convert them to host pfns.
It creates local ppgtt tables and insert the content pages
into the local ppgtt tables directly, which does not track
the usage of guest page table and re
On 12/11/2018 17:36, Ville Syrjälä wrote:
On Mon, Nov 12, 2018 at 05:12:37PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Idea of runtime device info is to contain all fields from the existing
device info which are modified at runtime.
Initially we move there fields which are never set
On 12/11/2018 17:24, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-11-12 17:12:38)
struct intel_device_info {
- u16 device_id;
u16 gen_mask;
- u8 gen;
+ u8 __gen;
u8 gt; /* GT number, 0 if undefined */
- intel_ring_mask_t ring_mask; /* Rings su
On 12/11/2018 17:25, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-11-12 17:12:39)
From: Tvrtko Ursulin
Now that we are down to one caller, which does not even modify copied
device info, we can remove the mkwrite_device_info helper and convert the
device info pointer itself to be a pointer
On 12/11/2018 17:29, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-11-12 17:12:41)
diff --git a/drivers/gpu/drm/i915/intel_device_info.c
b/drivers/gpu/drm/i915/intel_device_info.c
index 00758d11047b..b9d08428f35b 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i9
On 12/11/2018 21:22, Lucas De Marchi wrote:
On Mon, Nov 12, 2018 at 05:12:38PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
After the previous change which cleared the static tables from effectively
unused storage, we now replicate entries which have defaults set from
there, but can be o
Use intel_plane_destroy_state in intel_plane_free to free the state.
Also fix intel_plane_alloc() to use __drm_atomic_helper_plane_reset(),
to get sane defaults from the atomic core.
Signed-off-by: Maarten Lankhorst
Reported-by: Ville Syrjälä
Cc: Ville Syrjälä
Fixes: b20815255693 ("drm/i915: Ad
Regards
Shashank
On 11/7/2018 10:48 PM, Ville Syrjala wrote:
From: Ville Syrjälä
We no longer change LSPCON into PCON mode if it boots up in
LS mode. This was broken by some code shuffling in
commit 96e35598cead ("drm/i915: Check LSPCON vendor OUI").
I actually can't see a reason why that c
Quoting Tvrtko Ursulin (2018-11-13 09:13:47)
>
> On 12/11/2018 17:24, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2018-11-12 17:12:38)
> >> struct intel_device_info {
> >> - u16 device_id;
> >> u16 gen_mask;
> >>
> >> - u8 gen;
> >> + u8 __gen;
> >> u8
== Series Details ==
Series: i915 pvmmio to improve GVTg performance
URL : https://patchwork.freedesktop.org/series/52410/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
9c2f6b34b1d3 drm/i915: introduced pv capability for vgpu
-:68: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'd
== Series Details ==
Series: i915 pvmmio to improve GVTg performance
URL : https://patchwork.freedesktop.org/series/52410/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: introduced pv capability for vgpu
-drivers/gpu/drm/i915/selftests/../i91
Quoting Xiaolin Zhang (2018-11-13 08:35:12)
> To improve GVTg performance, it could reduce the mmio access trap
> numbers within guest driver in some certain scenarios since mmio
> access trap will introuduce vm exit/vm enter cost.
This still looks merely like a proof-of-concept, and does not look
== Series Details ==
Series: i915 pvmmio to improve GVTg performance
URL : https://patchwork.freedesktop.org/series/52410/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_5127 -> Patchwork_10811 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_10811
On 09/11/2018 11:44, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-11-09 07:30:34)
On 08/11/2018 16:48, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-11-08 16:23:08)
On 08/11/2018 08:17, Chris Wilson wrote:
Ignore trying to shrink from i915 if we fail to acquire the struct_mutex
in t
On Mon, 12 Nov 2018, Guang Bai wrote:
> Actually I'm still working on it right now with
> DRM_MODE_CONNECTOR_HDMIA/HDMIB, recommended by James, I'm able to
> differentiate the HDMI or DP even the encoder type is the
> "INTEL_OUTPUT_DDI", I still have the "trybot" intermittent test failures
> with
== Series Details ==
Series: drm/i915: Fix plane allocation/free functions
URL : https://patchwork.freedesktop.org/series/52413/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5129 -> Patchwork_10812 =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_10
On Tue, 13 Nov 2018, Tvrtko Ursulin wrote:
> On 12/11/2018 17:25, Chris Wilson wrote:
>> Quoting Tvrtko Ursulin (2018-11-12 17:12:39)
>>> From: Tvrtko Ursulin
>>>
>>> Now that we are down to one caller, which does not even modify copied
>>> device info, we can remove the mkwrite_device_info helpe
On Mon, 12 Nov 2018, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> It is more space efficient to store these two at the runtime copy since
> both are trivially derived from the static data.
Any consideration for potential future config option for reduced number
of supported device infos, and
Quoting Jani Nikula (2018-11-13 11:28:11)
> On Tue, 13 Nov 2018, Tvrtko Ursulin wrote:
> > On 12/11/2018 17:25, Chris Wilson wrote:
> >> Quoting Tvrtko Ursulin (2018-11-12 17:12:39)
> >>> From: Tvrtko Ursulin
> >>>
> >>> Now that we are down to one caller, which does not even modify copied
> >>>
On Mon, 12 Nov 2018, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Introduce subplatform mask to eliminate throughout the code devid checking
> sprinkle, mostly courtesy of IS_*_UL[TX] macros.
>
> Subplatform mask initialization is done at runtime device info init.
I kind of like the concept,
On Mon, 12 Nov 2018, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Now that we are down to one caller, which does not even modify copied
> device info, we can remove the mkwrite_device_info helper and convert the
> device info pointer itself to be a pointer to static table instead of a
> copy.
On 13/11/2018 11:30, Jani Nikula wrote:
On Mon, 12 Nov 2018, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
It is more space efficient to store these two at the runtime copy since
both are trivially derived from the static data.
Any consideration for potential future config option for reduced
On Tue, 13 Nov 2018, Jani Nikula wrote:
> On Mon, 12 Nov 2018, Tvrtko Ursulin wrote:
>> From: Tvrtko Ursulin
>>
>> Now that we are down to one caller, which does not even modify copied
>> device info, we can remove the mkwrite_device_info helper and convert the
>> device info pointer itself to b
Quoting Jani Nikula (2018-11-13 11:45:02)
> On Mon, 12 Nov 2018, Tvrtko Ursulin wrote:
> > From: Tvrtko Ursulin
> >
> > Now that we are down to one caller, which does not even modify copied
> > device info, we can remove the mkwrite_device_info helper and convert the
> > device info pointer itsel
On 13/11/2018 11:48, Tvrtko Ursulin wrote:
On 13/11/2018 11:30, Jani Nikula wrote:
On Mon, 12 Nov 2018, Tvrtko Ursulin
wrote:
From: Tvrtko Ursulin
It is more space efficient to store these two at the runtime copy since
both are trivially derived from the static data.
Any consideration fo
On Mon, Nov 12, 2018 at 06:45:03PM -0800, Lucas De Marchi wrote:
> Bspec 21257 says "DDIA PHY is the comp master, so it must
> not be un-initialized if other combo PHYs are in use". Here
> we are shutting down all phys, so it's not strictly required.
> However let's be consistent on deinitializing
On Tue, Nov 13, 2018 at 03:19:06PM +0200, Imre Deak wrote:
> On Mon, Nov 12, 2018 at 06:45:03PM -0800, Lucas De Marchi wrote:
> > Bspec 21257 says "DDIA PHY is the comp master, so it must
> > not be un-initialized if other combo PHYs are in use". Here
> > we are shutting down all phys, so it's not
== Series Details ==
Series: drm/i915: Fix plane allocation/free functions
URL : https://patchwork.freedesktop.org/series/52413/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5129_full -> Patchwork_10812_full =
== Summary - SUCCESS ==
No regressions found.
== Known
On Mon, Nov 12, 2018 at 06:45:02PM -0800, Lucas De Marchi wrote:
> These are the only places that assume ports A and B are the ones with
> combo phy. Let's use intel_port_is_combophy() there to make sure
> it checks for combo phy ports the same way everywhere.
>
> v2: define for_each_combo_port()
On Fri, Nov 09, 2018 at 04:09:23PM +0200, Mika Kuoppala wrote:
> Register DBUF_CTL_S2 is read and it's value is not used. As
> there is no explanation why we should prime the hardware with
> read, remove it as spurious.
>
> Fixes: aa9664ffe863 ("drm/i915/icl: Enable 2nd DBuf slice only when needed
On Tue, Nov 13, 2018 at 10:28:04AM +0100, Maarten Lankhorst wrote:
> Use intel_plane_destroy_state in intel_plane_free to free the state.
Not entirely necessary since we have nothing in the state at that moment
that would required to be freed separately. But seems more future proof
anyway.
> Also
Currently whenever we attempt to recalculate
watermarks, we assign dirty_pipes to zero,
then compare current wm results to the recalculated
one and if they changed we set correspondent dirty_pipes
bit again.
This can lead to situation, when we same clearing dirty_pipes,
same wm results twice and no
Currently whenever we attempt to recalculate
watermarks, we assign dirty_pipes to zero,
then compare current wm results to the recalculated
one and if they changed we set correspondent dirty_pipes
bit again.
This can lead to situation, when we are clearing dirty_pipes,
same wm results twice in a ro
From: Tvrtko Ursulin
Just a resend since almost two months have passed since the last one and there
were some rebases needed due underlying code changes.
Nothing major to warrant re-requesting the reviews, or in other words, the
series is still fully reviewed.
Lionel Landwerlin (2):
drm/i915:
From: Lionel Landwerlin
We want to expose the ability to reconfigure the slices, subslice and
eu per context and per engine. To facilitate that, store the current
configuration on the context for each engine, which is initially set
to the device default upon creation.
v2: record sseu configurati
From: Tvrtko Ursulin
We want to allow userspace to reconfigure the subslice configuration on a
per context basis.
This is required for the functional requirement of shutting down non-VME
enabled sub-slices on Gen11 parts.
To do so, we expose a context parameter to allow adjustment of the RPCS
r
From: Tvrtko Ursulin
Configuring RPCS in context image just before pin is sufficient and will
come extra handy in one of the following patches.
v2:
* Split image setup a bit differently. (Chris Wilson)
v3:
* Update context image after reset as well - otherwise the application
of pinned def
From: Tvrtko Ursulin
Timeline barrier allows serialization between different timelines.
After calling i915_timeline_set_barrier with a request, all following
submissions on this timeline will be set up as depending on this request,
or barrier. Once the barrier has been completed it automatically
From: Lionel Landwerlin
If some of the contexts submitting workloads to the GPU have been
configured to shutdown slices/subslices, we might loose the NOA
configurations written in the NOA muxes.
One possible solution to this problem is to reprogram the NOA muxes
when we switch to a new context.
From: Tvrtko Ursulin
When OA is active we want to lock the powergating configuration, but on
Icelake, users like the media stack will have issues if we lock to the
full device configuration.
Instead lock to a subset of (sub)slices which are currently a known
working configuration for all users.
From: Tony Ye
On Icelake we need to turn off subslices not containing the VME block or
the VME kernel will hang.
v2: (Tvrtko Ursulin)
* Remove libdrm usage for setting context param.
* Cleanup bitmask operation.
* Only apply the workaround for ICL.
v3:
* Added hang detector. (Chris Wilson)
From: Lionel Landwerlin
---
include/drm-uapi/amdgpu_drm.h | 52 +++-
include/drm-uapi/drm.h | 17 ++
include/drm-uapi/drm_fourcc.h | 224 +++
include/drm-uapi/drm_mode.h| 26 +-
include/drm-uapi/etnaviv_drm.h | 6 +
include/drm-uapi/exynos_drm.h | 240
From: Lionel Landwerlin
Verify that the per-context dynamic SSEU uAPI works as expected.
To achieve that, in the absence of a better mechamism, we read the value
of PWR_CLK_STATE register, or use MI_SET_PREDICATE on platforms before
Cannonlake.
This register is written to by the GPU on context
From: Tvrtko Ursulin
Tests to accompany the respective i915 series.
Contributed by Tony Ye is gem_media_vme, anew test which exercises the media VME
block to demonstrate the effectiveness of the uAPI for this particular issue.
Lionel Landwerlin (2):
headers: bump
tests/gem_ctx_sseu: Dynamic
From: Tony Ye
Simple test which exercises the VME fixed function block.
v2: (Tvrtko Ursulin)
* Small cleanups like copyright date, tabs, remove unused bits.
v3: (Tony Ye)
* Added curbe data entry for dst surface.
* Read the dst surface after the VME kernel being executed.
Signed-off-by: Ton
On Tue, Nov 13, 2018 at 04:27:28PM +0200, Stanislav Lisovskiy wrote:
> Currently whenever we attempt to recalculate
> watermarks, we assign dirty_pipes to zero,
> then compare current wm results to the recalculated
> one and if they changed we set correspondent dirty_pipes
> bit again.
> This can l
== Series Details ==
Series: Fix the possible watermark miswriting
URL : https://patchwork.freedesktop.org/series/52423/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5132 -> Patchwork_10813 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchw
Quoting Tvrtko Ursulin (2018-11-13 14:35:29)
> From: Tvrtko Ursulin
>
> Just a resend since almost two months have passed since the last one and there
> were some rebases needed due underlying code changes.
>
> Nothing major to warrant re-requesting the reviews, or in other words, the
> series i
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev7)
URL : https://patchwork.freedesktop.org/series/48194/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e5e9458e7692 drm/i915/execlists: Move RPCS setup to context pin
5c2565cbc409 drm/i915: Record the
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev7)
URL : https://patchwork.freedesktop.org/series/48194/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/execlists: Move RPCS setup to context pin
Okay!
Commit: drm/i
== Series Details ==
Series: Fix the possible watermark miswriting for skl+
URL : https://patchwork.freedesktop.org/series/52425/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5132 -> Patchwork_10814 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev7)
URL : https://patchwork.freedesktop.org/series/48194/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_5132 -> Patchwork_10815 =
== Summary - FAILURE ==
Serious unknown changes coming with Patch
On Fri, Nov 02, 2018 at 11:47:13AM +0200, Juha-Pekka Heikkila wrote:
> This seems to fix some DRM_FORMAT_RGB565 (up-)scaling IGT tests on on my
> KBL.
>
> Tested-by: Juha-Pekka Heikkila
Pushed with Maarten's irc r-b and t-b. Thanks for the review and
testing.
>
> On 29.10.2018 20:18, Ville Sy
On Thu, Nov 08, 2018 at 05:09:55PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Reduce the clutter in the sprite update functions by writing
> both TILEOFF and LINOFF registers unconditionally. We already
> did this for primary planes so might as well do it for the
> sprites too.
>
> Th
On Mon, Oct 22, 2018 at 09:41:36PM +0200, Hans de Goede wrote:
> Hi,
>
> On 22-10-18 16:19, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Let's make sure the DSI port is actually on before we go
> > poking at the plane register to determine which way
> > it's rotated. Otherwise we could b
On Thu, Nov 08, 2018 at 05:10:13PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> No point in cluttering the common codepaths with the
> skip_intermediate_wm handling. Just move it into
> ilk_compute_intermediate_wm() as those are the only
> platforms using this.
>
> Signed-off-by: Ville
Quoting Stanislav Lisovskiy (2018-11-13 14:31:38)
> Currently whenever we attempt to recalculate
> watermarks, we assign dirty_pipes to zero,
> then compare current wm results to the recalculated
> one and if they changed we set correspondent dirty_pipes
> bit again.
> This can lead to situation, w
Quoting Tvrtko Ursulin (2018-11-13 10:24:43)
>
> On 09/11/2018 11:44, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2018-11-09 07:30:34)
> >>
> >> On 08/11/2018 16:48, Chris Wilson wrote:
> >>> Quoting Tvrtko Ursulin (2018-11-08 16:23:08)
>
> On 08/11/2018 08:17, Chris Wilson wrote:
>
On 13/11/2018 11:40, Jani Nikula wrote:
On Mon, 12 Nov 2018, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Introduce subplatform mask to eliminate throughout the code devid checking
sprinkle, mostly courtesy of IS_*_UL[TX] macros.
Subplatform mask initialization is done at runtime device info
On 13/11/2018 11:45, Jani Nikula wrote:
On Mon, 12 Nov 2018, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Now that we are down to one caller, which does not even modify copied
device info, we can remove the mkwrite_device_info helper and convert the
device info pointer itself to be a pointer t
From: Ville Syrjälä
SKL+ do not use crtc_state->update_wm_pre, so there is absolutely no
point it setting it. crtc_state->update_wm_pre only exists as a
temporary hack for pre-g4x platforms until we redo their
watermarks to be be atomic.
Cc: Stanislav Lisovskiy
Signed-off-by: Ville Syrjälä
---
From: Ville Syrjälä
skl_compute_wm() wants to compare the old and new watermarks. Currently
it gets at the old watermarks via crtc->state, which is confusing since
it can point at either the old or the new state depending on where
in the sequence we are. In this case it is correct since we have n
From: Ville Syrjälä
We do return an error when the watermark calculation fails, so
the FIXME claiming otherwise is outdated. Remove it.
Cc: Stanislav Lisovskiy
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_pm.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/d
On 13/11/2018 11:51, Chris Wilson wrote:
Quoting Jani Nikula (2018-11-13 11:45:02)
On Mon, 12 Nov 2018, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Now that we are down to one caller, which does not even modify copied
device info, we can remove the mkwrite_device_info helper and convert the
Quoting Tvrtko Ursulin (2018-11-13 17:33:38)
>
> On 13/11/2018 11:51, Chris Wilson wrote:
> > Quoting Jani Nikula (2018-11-13 11:45:02)
> >> On Mon, 12 Nov 2018, Tvrtko Ursulin wrote:
> >>> From: Tvrtko Ursulin
> >>>
> >>> Now that we are down to one caller, which does not even modify copied
> >
On Tue, Nov 13, 2018 at 03:23:07PM +0200, Imre Deak wrote:
> On Tue, Nov 13, 2018 at 03:19:06PM +0200, Imre Deak wrote:
> > On Mon, Nov 12, 2018 at 06:45:03PM -0800, Lucas De Marchi wrote:
> > > Bspec 21257 says "DDIA PHY is the comp master, so it must
> > > not be un-initialized if other combo PHY
From: Ville Syrjälä
I have a Thinkpad X220 Tablet in my hands that is losing vblank
interrupts whenever LP3 watermarks are used.
If I nudge the latency value written to the WM3 register just
by one in either direction the problem disappears. That to me
suggests that the punit will not enter the
== Series Details ==
Series: series starting with [1/3] drm/i915: Use explicit old crtc state in
skl_compute_wm()
URL : https://patchwork.freedesktop.org/series/52436/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5133 -> Patchwork_10816 =
== Summary - SUCCESS ==
No reg
Quoting Ville Syrjala (2018-11-13 18:10:23)
> From: Ville Syrjälä
>
> I have a Thinkpad X220 Tablet in my hands that is losing vblank
> interrupts whenever LP3 watermarks are used.
>
> If I nudge the latency value written to the WM3 register just
> by one in either direction the problem disappea
On Tue, Nov 13, 2018 at 06:25:47PM +, Chris Wilson wrote:
> Quoting Ville Syrjala (2018-11-13 18:10:23)
> > From: Ville Syrjälä
> >
> > I have a Thinkpad X220 Tablet in my hands that is losing vblank
> > interrupts whenever LP3 watermarks are used.
> >
> > If I nudge the latency value writte
== Series Details ==
Series: drm/i915: Disable LP3 watermarks on all SNB machines
URL : https://patchwork.freedesktop.org/series/52440/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5133 -> Patchwork_10817 =
== Summary - SUCCESS ==
No regressions found.
External URL:
Quoting Stanislav Lisovskiy (2018-11-13 07:45:02)
> @@ -408,6 +424,9 @@ void sna_video_textured_setup(struct sna *sna, ScreenPtr
> screen)
> } else if (sna->kgem.gen < 040) {
> adaptor->nImages = ARRAY_SIZE(gen3_Images);
> adaptor->pImages = (XvImageRec *)ge
== Series Details ==
Series: Fix the possible watermark miswriting
URL : https://patchwork.freedesktop.org/series/52423/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5132_full -> Patchwork_10813_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_
Bspec 21257 says "DDIA PHY is the comp master, so it must
not be un-initialized if other combo PHYs are in use". Here
we are shutting down all phys, so it's not strictly required.
However let's be consistent on deinitializing things in the
reversed order we initialized them.
v2: simplify protectio
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/icl: replace check for combo phy
(rev2)
URL : https://patchwork.freedesktop.org/series/52400/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
cf571a614561 drm/i915/icl: replace check for combo phy
-:23: CHECK:MA
On Tue, Nov 13, 2018 at 06:49:38PM +, Chris Wilson wrote:
> Quoting Stanislav Lisovskiy (2018-11-13 07:45:02)
> > @@ -408,6 +424,9 @@ void sna_video_textured_setup(struct sna *sna,
> > ScreenPtr screen)
> > } else if (sna->kgem.gen < 040) {
> > adaptor->nImages = ARRAY_
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/icl: replace check for combo phy
(rev2)
URL : https://patchwork.freedesktop.org/series/52400/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5133 -> Patchwork_10818 =
== Summary - SUCCESS ==
No regressio
== Series Details ==
Series: Fix the possible watermark miswriting for skl+
URL : https://patchwork.freedesktop.org/series/52425/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5132_full -> Patchwork_10814_full =
== Summary - WARNING ==
Minor unknown changes coming with P
On Thu, 08 Nov 2018, Daniel Vetter wrote:
> On Thu, Nov 08, 2018 at 08:42:52PM +, Souza, Jose wrote:
>> On Thu, 2018-11-08 at 09:31 +0100, Daniel Vetter wrote:
>> > On Wed, Nov 07, 2018 at 04:23:52PM -0800, José Roberto de Souza
>> > wrote:
>> > > This function will be helpful to drivers that
On Tue, 13 Nov 2018, Lucas De Marchi wrote:
> Bspec 21257 says "DDIA PHY is the comp master, so it must
> not be un-initialized if other combo PHYs are in use". Here
> we are shutting down all phys, so it's not strictly required.
> However let's be consistent on deinitializing things in the
> reve
Quoting Ville Syrjälä (2018-11-13 19:13:40)
> On Tue, Nov 13, 2018 at 06:49:38PM +, Chris Wilson wrote:
> > Quoting Stanislav Lisovskiy (2018-11-13 07:45:02)
> > > @@ -408,6 +424,9 @@ void sna_video_textured_setup(struct sna *sna,
> > > ScreenPtr screen)
> > > } else if (sna->kgem.gen
On Tue, Nov 13, 2018 at 10:31:25PM +0200, Jani Nikula wrote:
> On Tue, 13 Nov 2018, Lucas De Marchi wrote:
> > Bspec 21257 says "DDIA PHY is the comp master, so it must
> > not be un-initialized if other combo PHYs are in use". Here
> > we are shutting down all phys, so it's not strictly required.
On Tue, 13 Nov 2018, Lucas De Marchi wrote:
> On Tue, Nov 13, 2018 at 10:31:25PM +0200, Jani Nikula wrote:
>> On Tue, 13 Nov 2018, Lucas De Marchi wrote:
>> > Bspec 21257 says "DDIA PHY is the comp master, so it must
>> > not be un-initialized if other combo PHYs are in use". Here
>> > we are shu
On Tue, 13 Nov 2018, Tvrtko Ursulin wrote:
> On 13/11/2018 11:40, Jani Nikula wrote:
>> On Mon, 12 Nov 2018, Tvrtko Ursulin wrote:
>>> From: Tvrtko Ursulin
>>>
>>> Introduce subplatform mask to eliminate throughout the code devid checking
>>> sprinkle, mostly courtesy of IS_*_UL[TX] macros.
>>>
We don't yet allow userspace to control the CRTC background color, but
we should manually program the color to black to ensure the BIOS didn't
leave us with some other color. We should also set the pipe gamma and
pipe CSC bits so that the background color goes through the same color
management tra
This is a second revision of the series previously posted here:
https://lists.freedesktop.org/archives/intel-gfx/2018-October/178202.html
As noted before, this functionality adds new ABI so we need a userspace
consumer ready before we merge the kernel work. My understanding is
that some of the
Some display controllers can be programmed to present non-black colors
for pixels not covered by any plane (or pixels covered by the
transparent regions of higher planes). Compositors that want a UI with
a solid color background can potentially save memory bandwidth by
setting the CRTC background
Gen9+ platforms allow CRTC's to be programmed with a background/canvas
color below the programmable planes. Let's expose this for use by
compositors.
v2:
- Split out bgcolor sanitization and programming of csc/gamma bits to a
separate patch that we can land before the ABI changes are ready to
CRTC background color kernel patches were written about 2.5 years ago
and floated on the upstream mailing list, but since no opensource
userspace materialized, we never actually merged them. However the
corresponding IGT test did get merged and has basically been dead code
ever since.
A couple ye
== Series Details ==
Series: CRTC background color (rev2)
URL : https://patchwork.freedesktop.org/series/50834/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
99a0ae2cbae8 drm/i915: Force background color to black for gen9+
a25e43dadb92 drm: Add CRTC background color property (v
On 13/11/2018 23:22, Matt Roper wrote:
It's worth noting that we don't seem to be able to test this feature
with CRC's. Originally we wanted to draw a color into a plane's FB
(with Cairo) and then compare the CRC to turning off all planes and just
setting the CRTC background to the same color.
On Tue, Nov 13, 2018 at 11:43:12PM +, Lionel Landwerlin wrote:
> On 13/11/2018 23:22, Matt Roper wrote:
> > It's worth noting that we don't seem to be able to test this feature
> > with CRC's. Originally we wanted to draw a color into a plane's FB
> > (with Cairo) and then compare the CRC to t
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