So basically we want all logs related to HW failure and I915 programing should
be errors whereas all sink specific errors in debug level.
I will prepare the change.
danvet, seanpaul has discussed few points about convenience of debugging on
customer platforms. What is the take on it?
--Ram
On
On Sun, Oct 28, 2018 at 09:46:43PM +0100, Noralf Trønnes wrote:
>
> Den 28.10.2018 21.21, skrev David Lechner:
> > On 10/26/2018 05:38 PM, Noralf Trønnes wrote:
> > > Den 17.10.2018 15.04, skrev Noralf Trønnes:
> > > > This move makes tinydrm useful for more drivers. tinydrm doesn't need
> > > > c
To avoid the execution of link integrity check when the HDCP is
already disabled, cancel the delayed work for link integrity check
before disabling the HDCP.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_hdcp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/driv
As a policy, this change considers all I915 programming failures and
HW failures as ERRORS. Where as all HDCP failures due to the sink is
considered as DEBUG logs.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_hdcp.c | 18 +-
1 file changed, 9 insertions(+), 9 deleti
This patch adds HDCP register definitions for HDMI and DP HDCP
adaptations.
HDMI specific HDCP2.2 register definitions are added into drm_hdcp.h,
where as HDCP2.2 register offsets in DPCD offsets are defined at
drm_dp_helper.h.
v2:
bit_field definitions are replaced by macros. [Tomas and Jani]
This patch defines the hdcp2.2 protocol messages for authentication.
v2:
bit_fields are removed. Instead bitmasking used. [Tomas and Jani]
prefix HDCP_2_2_ is added to the macros. [Tomas]
v3:
No Changes.
v4:
Style and spellings are fixed [Uma]
v5:
Fix for macros.
v6:
comment for Type i
Intel HDCP2.2 registers are defined with addr offsets and bit details.
v2:
Replaced the arith calc with _PICK [Sean Paul]
v3:
No changes.
v4:
%s/HDCP2_CTR_DDI/HDCP2_CTL_DDI [Uma]
v5:
Added parentheses for the parameters of macro.
v6:
No changes
v7:
No changes
Signed-off-by: Ramalingam
This series defines the HDCP2.2 authentication messages at drm header
along with intel specific HDCP2.2 registers. And introduces a
structure intel_hdcp to wrap all hdcp related variables into it.
Out of these patches 4 were previously reviewed at
https://patchwork.freedesktop.org/series/38254/
S
Considering significant number of HDCP specific variables, it will
be clean to have separate struct for HDCP.
New structure called intel_hdcp is added within intel_connector.
v2:
struct hdcp statically allocated. [Sean Paul]
enable and disable function parameters are retained.[Sean Paul]
v3:
On Fri, 26 Oct 2018, Rodrigo Vivi wrote:
> The specially case for SKL for not controlled sagv
> is already taken care inside intel_enable_sagv, so there's
> no need to duplicate the check here.
>
> v2: Go one step further and remove skl special case. (Jani)
> v3: Separate runtime status handle fro
On Tue, 23 Oct 2018, Rodrigo Vivi wrote:
> RANGE makes it longer, but clear.
IS_GEN_RANGE() was the first proposal, but in review this was changed to
IS_GEN() following IS_REVID() and IS__REVID().
IMO unnecessary change.
BR,
Jani.
>
> Diff generated with:
>
> sed 's/IS_GEN(/IS_GEN_RANGE(/g' dr
On Wed, 24 Oct 2018, Ville Syrjälä wrote:
> On Wed, Oct 24, 2018 at 05:35:51PM +0100, Chris Wilson wrote:
>> Quoting Ville Syrjälä (2018-10-24 17:33:17)
>> > On Wed, Oct 24, 2018 at 05:02:18PM +0100, Chris Wilson wrote:
>> > > Quoting Ville Syrjala (2018-10-24 16:52:08)
>> > > > From: Ville Syrjäl
== Series Details ==
Series: Implement HDCP2.2: PART-I (rev2)
URL : https://patchwork.freedesktop.org/series/51495/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5044 -> Patchwork_10620 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.f
Quoting Daniel Vetter (2018-10-26 14:48:07)
> On Fri, Oct 26, 2018 at 11:02 AM Daniel Vetter wrote:
> >
> > On Thu, Oct 25, 2018 at 9:39 PM Chris Wilson
> > wrote:
> > >
> > > Quoting Daniel Vetter (2018-10-25 20:16:50)
> > > > On Thu, Oct 25, 2018 at 01:45:42PM +0100, Chris Wilson wrote:
> > >
The vm of two contexts are supposed to be independent, such that a stray
write by one cannot be detected by another. Normally the GTT is filled
explicitly by userspace, but the space in between objects is filled with
a scratch page -- and that scratch page should be able to form an
inter-context ba
If we can prevent stray writes from landing in the scratch page, we can
reuse the same page and same scratch PT for all contexts without fear of
information leaks and side-channels.
Signed-off-by: Chris Wilson
Cc: Matthew Auld
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 30 +++
Since commit 93065ac753e4 ("mm, oom: distinguish blockable mode for mmu
notifiers") we have been able to report failure from
mmu_invalidate_range_start which allows us to use a trylock on the
struct_mutex to avoid potential recursion and report -EBUSY instead.
Furthermore, this allows us to pull th
Record the scratch PTE encoding upon creation rather than recomputing
the bits everytime. This is important for the next patch where we forgo
having a valid scratch page with which we may compute the bits and so
require keeping the PTE value instead.
Signed-off-by: Chris Wilson
Cc: Matthew Auld
Quoting Chris Wilson (2018-10-29 10:59:23)
> The vm of two contexts are supposed to be independent, such that a stray
> write by one cannot be detected by another. Normally the GTT is filled
> explicitly by userspace, but the space in between objects is filled with
> a scratch page -- and that scra
== Series Details ==
Series: series starting with [1/4] drm/i915/selftests: Test vm isolation
URL : https://patchwork.freedesktop.org/series/51663/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7c8c266ad618 drm/i915/selftests: Test vm isolation
-:241: WARNING:LINE_SPACING: Miss
On Fri, Oct 26, 2018 at 07:34:42PM +, Souza, Jose wrote:
> On Fri, 2018-10-26 at 21:01 +0300, Ville Syrjälä wrote:
> > On Fri, Oct 26, 2018 at 05:53:47PM +, Souza, Jose wrote:
> > > On Thu, 2018-10-25 at 18:17 -0700, José Roberto de Souza wrote:
> > > > If a PSR error happened and the drive
== Series Details ==
Series: series starting with [1/4] drm/i915/selftests: Test vm isolation
URL : https://patchwork.freedesktop.org/series/51663/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5044 -> Patchwork_10621 =
== Summary - SUCCESS ==
No regressions found.
Ex
== Series Details ==
Series: Implement HDCP2.2: PART-I (rev2)
URL : https://patchwork.freedesktop.org/series/51495/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_5044_full -> Patchwork_10620_full =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_106
== Series Details ==
Series: series starting with [1/4] drm/i915/selftests: Test vm isolation
URL : https://patchwork.freedesktop.org/series/51663/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5044_full -> Patchwork_10621_full =
== Summary - WARNING ==
Minor unknown cha
On Mon, 29 Oct 2018 at 10:59, Chris Wilson wrote:
>
> Record the scratch PTE encoding upon creation rather than recomputing
> the bits everytime. This is important for the next patch where we forgo
> having a valid scratch page with which we may compute the bits and so
> require keeping the PTE va
On Mon, 29 Oct 2018 at 11:00, Chris Wilson wrote:
>
> If we can prevent stray writes from landing in the scratch page, we can
> reuse the same page and same scratch PT for all contexts without fear of
> information leaks and side-channels.
>
> Signed-off-by: Chris Wilson
> Cc: Matthew Auld
Revie
Quoting Matthew Auld (2018-10-29 12:50:12)
> On Mon, 29 Oct 2018 at 10:59, Chris Wilson wrote:
> >
> > Record the scratch PTE encoding upon creation rather than recomputing
> > the bits everytime. This is important for the next patch where we forgo
> > having a valid scratch page with which we may
Record the scratch PTE encoding upon creation rather than recomputing
the bits everytime. This is important for the next patch where we forgo
having a valid scratch page with which we may compute the bits and so
require keeping the PTE value instead.
v2: Fix up scrub_64K to use scratch_pte as well
On Mon, 2018-10-15 at 10:38 +0300, Stanislav Lisovskiy wrote:
Ping. All previous comments were fixed(hopefully).
> v2: Renamed DRM_FORMAT_XYUV to DRM_FORMAT_XYUV.
> Added comment about AYUV byte ordering in Gstreamer.
>
> v3: Removed sna_composite_op flags related change to the separate
Quoting Joel Fernandes (2018-10-27 09:14:07)
> On Sat, Oct 27, 2018 at 12:38:56AM -0700, Joel Fernandes wrote:
> > Hi!
> > My Linux laptop running kernel v4.17 freezes intermittently when the laptop
> > lid is closed but external monitors are connected to 2 HDMI ports. I
> > provided
> > details o
== Series Details ==
Series: series starting with [1/4] drm/i915/selftests: Test vm isolation (rev2)
URL : https://patchwork.freedesktop.org/series/51663/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
1b3dc084cdde drm/i915/selftests: Test vm isolation
-:241: WARNING:LINE_SPACIN
== Series Details ==
Series: series starting with [1/4] drm/i915/selftests: Test vm isolation (rev2)
URL : https://patchwork.freedesktop.org/series/51663/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_5044 -> Patchwork_10622 =
== Summary - FAILURE ==
Serious unknown chan
---
drivers/gpu/drm/i915/intel_lrc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 22b57b8926fc..f01bd3ffb137 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -910,6 +910,8 @@ s
== Series Details ==
Series: HAX: poison the CSB after use
URL : https://patchwork.freedesktop.org/series/51677/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
DESCEND objtool
CHK include/generated/compile.h
CC [M] drivers/gpu/drm/i915/intel_lrc.o
drivers/gpu/drm/i9
---
drivers/gpu/drm/i915/intel_lrc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 22b57b8926fc..4d25e25b11cc 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -910,6 +910,9 @@
From: Ville Syrjälä
Let's not leak obj->framebuffer_references when we decide that
the framebuffer domensions are not suitable for NV12.
Cc: sta...@vger.kernel.org
Cc: Maarten Lankhorst
Cc: Vidya Srinivas
Fixes: e44134f2673c ("drm/i915: Add NV12 support to intel_framebuffer_init")
Signed-off-b
On Fri, Oct 26, 2018 at 04:35:46PM -0400, Lyude Paul wrote:
> Signed-off-by: Lyude Paul
> Cc: Daniel Vetter
> ---
> include/drm/drm_dp_mst_helper.h | 77 +
> 1 file changed, 77 insertions(+)
>
> diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_ms
On Fri, Oct 26, 2018 at 04:35:49PM -0400, Lyude Paul wrote:
> Currently, nouveau uses the yolo method of setting up MST displays: it
> uses the old VCPI helpers (drm_dp_find_vcpi_slots()) for computing the
> display configuration. These helpers don't take care to make sure they
> take a reference t
On Fri, Oct 26, 2018 at 12:53:42PM -0700, Dhinakaran Pandiyan wrote:
> intel_fb_pitch_limit() has the parameters pixel_format and fb_modifier
> switched in their positions. The parameters are however used correctly,
> but change the order for consistency.
>
> Also use kernel data types for both pa
On Fri, Oct 26, 2018 at 04:35:47PM -0400, Lyude Paul wrote:
> There has been a TODO waiting for quite a long time in
> drm_dp_mst_topology.c:
>
> /* We cannot rely on port->vcpi.num_slots to update
>* topology_state->avail_slots as the port may not exist if the parent
>* bran
On Fri, Oct 26, 2018 at 04:35:48PM -0400, Lyude Paul wrote:
> It occurred to me that we never actually check this! So let's start
> doing that.
>
> Signed-off-by: Lyude Paul
> Cc: Daniel Vetter
Reviewed-by: Daniel Vetter
One thought on testing all this: I think long term some unti tests, wher
== Series Details ==
Series: HAX: poison the CSB after use (rev2)
URL : https://patchwork.freedesktop.org/series/51677/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
DESCEND objtool
CHK include/generated/compile.h
CC [M] drivers/gpu/drm/i915/intel_lrc.o
In file inc
---
drivers/gpu/drm/i915/intel_lrc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 22b57b8926fc..126efe20d2d6 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -910,6 +910,9 @@
On 29/10/2018 13:55, Patchwork wrote:
> == Series Details ==
>
> Series: Implement HDCP2.2: PART-I (rev2)
> URL : https://patchwork.freedesktop.org/series/51495/
> State : failure
>
> == Summary ==
>
> = CI Bug Log - changes from CI_DRM_5044_full -> Patchwork_10620_full =
>
> == Summary - F
== Series Details ==
Series: HAX: poison the CSB after use (rev3)
URL : https://patchwork.freedesktop.org/series/51677/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7c3d3866369d HAX: poison the CSB after use
-:8: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appr
== Series Details ==
Series: drm/i915: Fix error handling for the NV12 fb dimensions check
URL : https://patchwork.freedesktop.org/series/51680/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5045 -> Patchwork_10625 =
== Summary - WARNING ==
Minor unknown changes coming w
On 10/29/2018 8:16 PM, Martin Peres wrote:
On 29/10/2018 13:55, Patchwork wrote:
== Series Details ==
Series: Implement HDCP2.2: PART-I (rev2)
URL : https://patchwork.freedesktop.org/series/51495/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_5044_full -> Patchwork_1062
On Mon, Oct 29, 2018 at 03:15:48PM +0530, Ramalingam C wrote:
> To avoid the execution of link integrity check when the HDCP is
> already disabled, cancel the delayed work for link integrity check
> before disabling the HDCP.
>
> Signed-off-by: Ramalingam C
This is racy. As an exercise, please l
== Series Details ==
Series: HAX: poison the CSB after use (rev3)
URL : https://patchwork.freedesktop.org/series/51677/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5045 -> Patchwork_10626 =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_10626 need
On Mon, Oct 29, 2018 at 03:15:51PM +0530, Ramalingam C wrote:
> Intel HDCP2.2 registers are defined with addr offsets and bit details.
>
> v2:
> Replaced the arith calc with _PICK [Sean Paul]
> v3:
> No changes.
> v4:
> %s/HDCP2_CTR_DDI/HDCP2_CTL_DDI [Uma]
> v5:
> Added parentheses for the
On Mon, 2018-10-29 at 15:25 +0100, Daniel Vetter wrote:
> On Fri, Oct 26, 2018 at 04:35:48PM -0400, Lyude Paul wrote:
> > It occurred to me that we never actually check this! So let's start
> > doing that.
> >
> > Signed-off-by: Lyude Paul
> > Cc: Daniel Vetter
>
> Reviewed-by: Daniel Vetter
>
== Series Details ==
Series: drm/i915: Simplify has_sagv (rev3)
URL : https://patchwork.freedesktop.org/series/51266/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5045 -> Patchwork_10627 =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_10627 need to
On Mon, 29 Oct 2018 at 10:59, Chris Wilson wrote:
>
> The vm of two contexts are supposed to be independent, such that a stray
> write by one cannot be detected by another. Normally the GTT is filled
> explicitly by userspace, but the space in between objects is filled with
> a scratch page -- and
The vm of two contexts are supposed to be independent, such that a stray
write by one cannot be detected by another. Normally the GTT is filled
explicitly by userspace, but the space in between objects is filled with
a scratch page -- and that scratch page should be able to form an
inter-context ba
== Series Details ==
Series: drm/i915: Fix error handling for the NV12 fb dimensions check
URL : https://patchwork.freedesktop.org/series/51680/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5045_full -> Patchwork_10625_full =
== Summary - SUCCESS ==
No regressions found
The vm of two contexts are supposed to be independent, such that a stray
write by one cannot be detected by another. Normally the GTT is filled
explicitly by userspace, but the space in between objects is filled with
a scratch page -- and that scratch page should not be able to form an
inter-contex
On Mon, 2018-10-29 at 15:24 +0100, Daniel Vetter wrote:
> On Fri, Oct 26, 2018 at 04:35:47PM -0400, Lyude Paul wrote:
> > There has been a TODO waiting for quite a long time in
> > drm_dp_mst_topology.c:
> >
> > /* We cannot rely on port->vcpi.num_slots to update
> > * topology_state->ava
== Series Details ==
Series: drm/i915/selftests: Test vm isolation (rev2)
URL : https://patchwork.freedesktop.org/series/51689/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
bb703a5b47b6 drm/i915/selftests: Test vm isolation
-:242: WARNING:LINE_SPACING: Missing a blank line aft
== Series Details ==
Series: HAX: poison the CSB after use (rev3)
URL : https://patchwork.freedesktop.org/series/51677/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5045_full -> Patchwork_10626_full =
== Summary - SUCCESS ==
No regressions found.
== Known issues ==
== Series Details ==
Series: drm/i915/selftests: Test vm isolation (rev2)
URL : https://patchwork.freedesktop.org/series/51689/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_5047 -> Patchwork_10628 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_1
On Tue, 23 Oct 2018 17:14:34 +0800
Chris Chiu wrote:
> On Thu, Oct 11, 2018 at 2:04 AM Guang Bai wrote:
>
> > On Mon, 8 Oct 2018 08:56:20 -0700
> > Guang Bai wrote:
> >
> > > On Mon, 8 Oct 2018 22:35:34 +0800
> > > Chris Chiu wrote:
> > >
> > > > Thanks! I have no problem with this patch.
The vm of two contexts are supposed to be independent, such that a stray
write by one cannot be detected by another. Normally the GTT is filled
explicitly by userspace, but the space in between objects is filled with
a scratch page -- and that scratch page should not be able to form an
inter-contex
From: Ville Syrjälä
To get the initial phase correct we need to account for the scale
factor as well. I forgot this initially and was mostly looking at
heavily upscaled content where the minor difference between -0.5
and the proper initial phase was not readily apparent.
And let's toss in a comm
On Sat, Oct 27, 2018 at 05:24:41AM +, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [1/2] drm/i915: Prefer IS_GEN check with
> bitmask.
> URL : https://patchwork.freedesktop.org/series/51622/
> State : success
>
> == Summary ==
>
> = CI Bug Log - changes from CI
== Series Details ==
Series: drm/i915/selftests: Test vm isolation (rev3)
URL : https://patchwork.freedesktop.org/series/51689/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e9dcbb986f11 drm/i915/selftests: Test vm isolation
-:242: WARNING:LINE_SPACING: Missing a blank line aft
On Fri, Oct 26, 2018 at 07:53:34PM +0300, Ville Syrjälä wrote:
> On Thu, Oct 25, 2018 at 05:56:36PM -0700, Rodrigo Vivi wrote:
> > While checking the opportunity to add a display_gen
> > check to allow glk and cnl to be on same bucket I noticed
> > these FIXME cases here.
> >
> > So I got the conf
On Mon, Oct 29, 2018 at 12:19:37PM +0200, Jani Nikula wrote:
> On Tue, 23 Oct 2018, Rodrigo Vivi wrote:
> > RANGE makes it longer, but clear.
>
> IS_GEN_RANGE() was the first proposal, but in review this was changed to
> IS_GEN() following IS_REVID() and IS__REVID().
>
> IMO unnecessary change.
== Series Details ==
Series: drm/i915: Simplify has_sagv (rev3)
URL : https://patchwork.freedesktop.org/series/51266/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5045_full -> Patchwork_10627_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_106
== Series Details ==
Series: drm/i915/selftests: Test vm isolation (rev3)
URL : https://patchwork.freedesktop.org/series/51689/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5047 -> Patchwork_10629 =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_106
From: Ville Syrjälä
To get the initial phase correct we need to account for the scale
factor as well. I forgot this initially and was mostly looking at
heavily upscaled content where the minor difference between -0.5
and the proper initial phase was not readily apparent.
And let's toss in a comm
Record the scratch PTE encoding upon creation rather than recomputing
the bits everytime. This is important for the next patch where we forgo
having a valid scratch page with which we may compute the bits and so
require keeping the PTE value instead.
v2: Fix up scrub_64K to use scratch_pte as well
If we can prevent stray writes from landing in the scratch page, we can
reuse the same page and same scratch PT for all contexts without fear of
information leaks and side-channels.
Signed-off-by: Chris Wilson
Cc: Matthew Auld
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i915/i915_gem_gtt.c |
From: Ville Syrjälä
Replace the messy framebuffer format/modifier validation code
with a single call to drm_any_plane_has_format(). The code was
extremely annoying to maintain as you had to have a lot of platform
checks for different formats. The new code requires zero maintenance.
v2: Nuke the
From: Ville Syrjälä
Add a function to check whether there is at least one plane that
supports a specific format and modifier combination. Drivers can
use this to reject unsupported formats/modifiers in .fb_create().
v2: Accept anyformat if the driver doesn't do planes (Eric)
s/planes_have_fo
On Mon, Oct 29, 2018 at 12:08:38PM +0200, Jani Nikula wrote:
> On Fri, 26 Oct 2018, Rodrigo Vivi wrote:
> > The specially case for SKL for not controlled sagv
> > is already taken care inside intel_enable_sagv, so there's
> > no need to duplicate the check here.
> >
> > v2: Go one step further and
On Thu, Oct 25, 2018 at 05:08:39PM +0300, Ville Syrjälä wrote:
> On Wed, Oct 24, 2018 at 03:28:33PM -0700, Manasi Navare wrote:
> > Infoframes are used to send secondary data packets. This patch
> > adds support for DSC Picture parameter set secondary data packets
> > in the existing write_infofram
On Mon, 2018-10-29 at 20:34 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Replace the messy framebuffer format/modifier validation code
> with a single call to drm_any_plane_has_format(). The code was
> extremely annoying to maintain as you had to have a lot of platform
> checks for diffe
After reading the event status from the CSB, write back 0 (an invalid
value) so we can detect if the HW should signal a new event without
writing the event in the future.
References: https://bugs.freedesktop.org/show_bug.cgi?id=108315
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gp
== Series Details ==
Series: drm/i915: Account for scale factor when calculating initial phase (rev2)
URL : https://patchwork.freedesktop.org/series/51696/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5049 -> Patchwork_10630 =
== Summary - WARNING ==
Minor unknown chang
When using softpin it's not enough to just pad the vma size, we also
need to ensure the vma offset is at the start of the pt boundary, if we
plan to utilize 64K pages.
Signed-off-by: Matthew Auld
Cc: Chris Wilson
---
drivers/gpu/drm/i915/selftests/huge_pages.c | 28 +
1 file
Quoting Matthew Auld (2018-10-29 19:36:37)
> When using softpin it's not enough to just pad the vma size, we also
> need to ensure the vma offset is at the start of the pt boundary, if we
> plan to utilize 64K pages.
For testing purposes, we have to assume the worst as well as best cases.
Looks li
On Mon, 2018-10-29 at 16:18 +0200, Ville Syrjälä wrote:
> On Fri, Oct 26, 2018 at 12:53:42PM -0700, Dhinakaran Pandiyan wrote:
> > intel_fb_pitch_limit() has the parameters pixel_format and
> > fb_modifier
> > switched in their positions. The parameters are however used
> > correctly,
> > but chang
On Mon, 29 Oct 2018 at 19:40, Chris Wilson wrote:
>
> Quoting Matthew Auld (2018-10-29 19:36:37)
> > When using softpin it's not enough to just pad the vma size, we also
> > need to ensure the vma offset is at the start of the pt boundary, if we
> > plan to utilize 64K pages.
>
> For testing purpo
On Fri, 2018-10-26 at 12:38 -0700, Dhinakaran Pandiyan wrote:
> A framebuffer can comprise surfaces with distinct tiling formats,
> making checks against modifier alone insufficient. Make use of a
> function to identify a linear surface based on both modifier and
> color
> plane.
>
> v2: Typo fix
== Series Details ==
Series: series starting with [CI,1/7] drm/i915/dsc: Add slice_row_per_frame in
DSC PPS programming
URL : https://patchwork.freedesktop.org/series/51558/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5050 -> Patchwork_10631 =
== Summary - SUCCESS ==
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/gtt: Record the scratch pte
URL : https://patchwork.freedesktop.org/series/51698/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5050 -> Patchwork_10632 =
== Summary - SUCCESS ==
No regressions found.
On Wed, Oct 24, 2018 at 03:28:25PM -0700, Manasi Navare wrote:
> DSC params like the enable, compressed bpp, slice count and
> dsc_split are added to the intel_crtc_state. These parameters
> are set based on the requested mode and available link parameters
> during the pipe configuration in atomic
On Mon, Oct 29, 2018 at 10:30:39PM +0200, Ville Syrjälä wrote:
> On Wed, Oct 24, 2018 at 03:28:25PM -0700, Manasi Navare wrote:
> > DSC params like the enable, compressed bpp, slice count and
> > dsc_split are added to the intel_crtc_state. These parameters
> > are set based on the requested mode a
When using softpin it's not enough to just pad the vma size, we also
need to ensure the vma offset is at the start of the pt boundary, if we
plan to utilize 64K pages. Therefore to improve test coverage we should
use both aligned and unaligned gtt offsets in igt_write_huge.
Suggested-by: Chris Wil
On Wed, Oct 24, 2018 at 03:28:39PM -0700, Manasi Navare wrote:
> DSC can be supported per DP connector. This patch adds a per connector
> debugfs node to expose DSC support capability by the kernel.
> The same node can be used from userspace to force DSC enable.
Why is the force_dsc thing split be
On Fri, 2018-10-05 at 12:03 -0700, Manasi Navare wrote:
> On Fri, Oct 05, 2018 at 11:56:43AM -0700, Dhinakaran Pandiyan wrote:
> > The bits weren't defined in descending order.
> > v2: Move definitions in a separate patch (Manasi)
> >
> > Cc: Manasi Navare
> > Signed-off-by: Dhinakaran Pandiyan
== Series Details ==
Series: series starting with [v4,1/2] drm: Add drm_any_plane_has_format()
URL : https://patchwork.freedesktop.org/series/51700/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5050 -> Patchwork_10633 =
== Summary - SUCCESS ==
No regressions found.
E
Older platforms require fence registers to perform blits, and so
userspace is expected to mark up the objects to request fences be
assigned.
Fixes: ff2db94acb53 ("igt/gem_tiled_fence_blits: Remove libdrm_intel
dependence")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108591
Signed-off-b
Quoting Matthew Auld (2018-10-29 20:37:34)
> When using softpin it's not enough to just pad the vma size, we also
> need to ensure the vma offset is at the start of the pt boundary, if we
> plan to utilize 64K pages. Therefore to improve test coverage we should
> use both aligned and unaligned gtt
== Series Details ==
Series: drm/i915/selftests: Test vm isolation (rev3)
URL : https://patchwork.freedesktop.org/series/51689/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5047_full -> Patchwork_10629_full =
== Summary - SUCCESS ==
No regressions found.
== Known i
On Mon, Oct 29, 2018 at 10:39:21PM +0200, Ville Syrjälä wrote:
> On Wed, Oct 24, 2018 at 03:28:39PM -0700, Manasi Navare wrote:
> > DSC can be supported per DP connector. This patch adds a per connector
> > debugfs node to expose DSC support capability by the kernel.
> > The same node can be used f
== Series Details ==
Series: drm/i915/execlists: Poison the CSB after use
URL : https://patchwork.freedesktop.org/series/51703/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5051 -> Patchwork_10634 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https:/
On Mon, Oct 29, 2018 at 10:30:39PM +0200, Ville Syrjälä wrote:
> On Wed, Oct 24, 2018 at 03:28:25PM -0700, Manasi Navare wrote:
> > DSC params like the enable, compressed bpp, slice count and
> > dsc_split are added to the intel_crtc_state. These parameters
> > are set based on the requested mode a
48 bit ppgtt device configuration is really just extended address
range full ppgtt and may actually be something other than 48 bits.
Change HAS_FULL_48BIT_PPGTT() to HAS_4LVL_PPGTT() to better
describe that a 4 level walk table extended range PPGTT is being
used. Add a new device info field that s
We no longer need to differentiate between 4LVL and FULL ppgtt as
the number of bits in the address range provides that information now.
Signed-off-by: Bob Paauwe
---
drivers/gpu/drm/i915/i915_drv.h | 2 --
drivers/gpu/drm/i915/i915_pci.c | 4 ++--
drivers/gpu/drm/i915/in
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