On Fri, 2018-09-07 at 18:21 +0300, Martin Peres wrote:
>
>
>
> This is known issue: https://bugs.freedesktop.org/show_bug.cgi?id=106
> 701
>
> That means your patch is a SUCCESS from a CI perspective. Sorry for
> the
> noise!
>
Sounds just great! :)
> >
> > Warnings
> >
>
On 9/6/2018 7:31 PM, Kulkarni, Vandita wrote:
On 7/10/2018 3:10 PM, Madhav Chauhan wrote:
This patch setup voltage swing before enabling
combo PHY DDI (shared with DSI).
Note that DSI voltage swing programming is for
high speed data buffers. HW automatically handles
the voltage swing for the
Only specific N value (0x8000) would be acceptable for LG
LP140WF6-SPM1 eDP panel which is running at asynchronous
clock mode. With the other N value, it will enter BITS mode
and display black screen. This patch series set constant N
value for specific sink/branch device that would cover
similar is
The N value was computed by kernel driver that based on synchronous clock
mode. But only specific N value (0x8000) would be acceptable for
LG LP140WF6-SPM1 eDP panel which is running at asynchronous clock mode.
With the other N value, Tcon will enter BITS mode and display black screen.
Add this pan
Some DP dongles in particular seem to be fussy about too large
link M/N values. Set specific value for N divider can resolve
this issue per dongle vendor's comment. So configure N as
constant value (0x8000) to instead of reduce M/N formula when
specific DP dongle connected.
Cc: Jani Nikula
Cc: Co
DP quirk list just compare sink or branch device's OUI so far.
That means particular vendor's products will be applied specific
change. This change would confirm device_id the same or not.
Then driver can implement some changes for branch/sink device
that really need additional WA.
Cc: Jani Nikula
== Series Details ==
Series: drm: Make i915 check for panel orient quirks on eDP and add one such
quirk
URL : https://patchwork.freedesktop.org/series/49389/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c514c6c8ea38 drm/i915: Check for panel orientation quirks on eDP panels
-
== Series Details ==
Series: drm: Make i915 check for panel orient quirks on eDP and add one such
quirk
URL : https://patchwork.freedesktop.org/series/49389/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4788 -> Patchwork_10131 =
== Summary - SUCCESS ==
No regressions f
On Fri, 07 Sep 2018, Ville Syrjälä wrote:
> On Fri, Sep 07, 2018 at 04:04:03PM +0300, Jani Nikula wrote:
>> On Fri, 07 Sep 2018, Mahesh Kumar wrote:
>> > This cleanup patch makes changes to use for_each_pipe loop
>> > during bit-mask assignment of allowed crtc with encoder.
>> >
>> > changes:
>>
== Series Details ==
Series: Getting rid of GUP and use HMM for user ptr features.
URL : https://patchwork.freedesktop.org/series/49395/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
DESCEND objtool
CHK include/generated/compile.h
CC [M] drivers/gpu/drm/i915/i915_g
== Series Details ==
Series: add LG panel to dpcd quirk database
URL : https://patchwork.freedesktop.org/series/49413/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
DESCEND objtool
CHK include/generated/compile.h
CC [M] drivers/gpu/drm/i915/intel_dp.o
drivers/gpu/d
Hi,
Here's more gvt-fixes for 4.19. Most critical one is to fix
KVM's mm reference when we access guest memory, issue was raised
by Linus in
https://lists.freedesktop.org/archives/intel-gvt-dev/2018-August/004130.html.
Another one with virtual opregion fix.
Thanks
--
The following changes since
Quoting Chris Wilson (2018-09-09 13:43:08)
> A missing no-op causing us to emit the wrong address when relocation was
> required for BB_START.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106078
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106028
> Signed-off-by: Chris Wilson
== Series Details ==
Series: drm: Make i915 check for panel orient quirks on eDP and add one such
quirk
URL : https://patchwork.freedesktop.org/series/49389/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4788_full -> Patchwork_10131_full =
== Summary - WARNING ==
Minor
We should update GuC power domain states also when GuC submission
is disabled, otherwise GuC might complain or ignore our requests.
This seems to be required for all currently released GuC firmwares.
v2: it is only needed by pre-Gen11 firmwares
Signed-off-by: Michal Wajdeczko
Cc: John Spotswood
Signed-off-by: Michal Wajdeczko
---
drivers/gpu/drm/i915/intel_uc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index b1b3e81..ad659c1 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@
On Mon, 10 Sep 2018, "Lee, Shawn C" wrote:
> DP quirk list just compare sink or branch device's OUI so far.
> That means particular vendor's products will be applied specific
> change. This change would confirm device_id the same or not.
> Then driver can implement some changes for branch/sink dev
On Mon, 10 Sep 2018, "Lee, Shawn C" wrote:
> Some DP dongles in particular seem to be fussy about too large
> link M/N values. Set specific value for N divider can resolve
> this issue per dongle vendor's comment. So configure N as
> constant value (0x8000) to instead of reduce M/N formula when
>
On Mon, 10 Sep 2018, "Lee, Shawn C" wrote:
> The N value was computed by kernel driver that based on synchronous clock
> mode. But only specific N value (0x8000) would be acceptable for
> LG LP140WF6-SPM1 eDP panel which is running at asynchronous clock mode.
> With the other N value, Tcon will en
Quoting Chris Wilson (2018-09-09 15:43:08)
> A missing no-op causing us to emit the wrong address when relocation was
> required for BB_START.
>
> Signed-off-by: Chris Wilson
> ---
> tests/gem_exec_capture.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/tests/ge
On Tue, 2018-07-10 at 15:10 +0530, Madhav Chauhan wrote:
> This patch set the loadgen select and latency optimization for
> aux and transmit lanes of combo phy transmitters. It will be
> used for MIPI DSI HS operations.
>
> v2: Rebase
>
> Signed-off-by: Madhav Chauhan
> ---
> drivers/gpu/drm/i9
On Sun, Sep 09, 2018 at 01:43:08PM +0100, Chris Wilson wrote:
> A missing no-op causing us to emit the wrong address when relocation was
> required for BB_START.
>
> Signed-off-by: Chris Wilson
> ---
> tests/gem_exec_capture.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> di
On 08/22/2018 10:54 AM, Daniel Vetter wrote:
> This was only added for the drm's fbdev emulation support, so that it
> would try harder to show the Oops.
>
> Unfortunately this never really worked reliably, and in practice ended
> up pushing the real Oops off the screen due to plentyfull locking,
On 08/22/2018 10:54 AM, Daniel Vetter wrote:
> DRM drivers really, really, really don't want random userspace to
> share buffer behind it's back, bypassing the dma-buf buffer sharing
> machanism. For that reason we've ruthlessly rejected any IOCTL
> exposing the physical address of any graphics bu
Baytrail takes a little more convincing that it needs to actually reload
its Page Directoy (ppGTT) before the context switch, so repeat it until
it gets the message. Once again the arbitrary values here are
empirically derived.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107861
Testcase
From: P Raviraj Sitaram
During modeset, previously configured csc coefficient matrix,if any, will
not persist. This can result in blank screen as csc mode will be programmed
while loading LUT but csc coefficient matrix remains unprogrammed.
Signed-off-by: P Raviraj Sitaram
---
drivers/gpu/drm/
Chris Wilson writes:
> If we fail to allocate an array for a large number of user requested
> capture objects, reduce the array size and try to grab at least some of
> the objects!
>
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/i915_gpu_error.c | 20 +---
> 1 file
Quoting Mika Kuoppala (2018-09-10 14:14:56)
> Chris Wilson writes:
>
> > If we fail to allocate an array for a large number of user requested
> > capture objects, reduce the array size and try to grab at least some of
> > the objects!
> >
> > Signed-off-by: Chris Wilson
> > ---
> > drivers/gpu/
On Mon, Sep 10, 2018 at 06:31:22PM +0530, raviraj.p.sita...@intel.com wrote:
> From: P Raviraj Sitaram
>
> During modeset, previously configured csc coefficient matrix,if any, will
> not persist. This can result in blank screen as csc mode will be programmed
> while loading LUT but csc coefficien
On 07/09/2018 10:55, Lionel Landwerlin wrote:
On 07/09/2018 10:39, Tvrtko Ursulin wrote:
On 07/09/2018 10:23, Lionel Landwerlin wrote:
On 07/09/2018 09:26, Tvrtko Ursulin wrote:
On 06/09/2018 11:36, Lionel Landwerlin wrote:
On 06/09/2018 11:22, Chris Wilson wrote:
Quoting Lionel Landwerli
tested-by: Vania Toperich
mailto:va...@bergehenegouwen.com>>
This patch series does the following:
- Adds concept of CRTC output format, which indicates if a CRTC is
driving RGB/YCBCR4:4:4/YCBCR4:2:0 or other outputs.
- Sets RGB as default output for all displays.
- Enables YCBCR4:4:4/4:2:0 ou
From: P Raviraj Sitaram
During modeset, previously configured csc coefficient matrix,if any, will
not persist. This can result in blank screen as csc mode will be programmed
while loading LUT but csc coefficient matrix remains unprogrammed.
Changes since V1:
- Removed platform check
Signed-off-
== Series Details ==
Series: series starting with [CI,v2,1/2] drm/i915/guc: Update GuC power domain
states
URL : https://patchwork.freedesktop.org/series/49423/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d0f85704c2c0 drm/i915/guc: Update GuC power domain states
1ad52148da5f
On 9/10/2018 5:50 PM, Lisovskiy, Stanislav wrote:
On Tue, 2018-07-10 at 15:10 +0530, Madhav Chauhan wrote:
This patch set the loadgen select and latency optimization for
aux and transmit lanes of combo phy transmitters. It will be
used for MIPI DSI HS operations.
v2: Rebase
Signed-off-by: Madh
== Series Details ==
Series: series starting with [CI,v2,1/2] drm/i915/guc: Update GuC power domain
states
URL : https://patchwork.freedesktop.org/series/49423/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4792 -> Patchwork_10134 =
== Summary - FAILURE ==
Serious unkno
Quoting Michal Wajdeczko (2018-09-10 11:41:49)
> We should update GuC power domain states also when GuC submission
> is disabled, otherwise GuC might complain or ignore our requests.
> This seems to be required for all currently released GuC firmwares.
Was it expected to fix the live_guc selftest?
== Series Details ==
Series: drm/i915/ringbuffer: Reload PDs harder on byt/bcs
URL : https://patchwork.freedesktop.org/series/49429/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4792 -> Patchwork_10135 =
== Summary - SUCCESS ==
No regressions found.
External URL:
ht
== Series Details ==
Series: drm/i915/chv: Update csc coefficient matrix during modeset (rev2)
URL : https://patchwork.freedesktop.org/series/49430/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4792 -> Patchwork_10136 =
== Summary - SUCCESS ==
No regressions found.
E
>-Original Message-
>From: Wajdeczko, Michal
>Sent: Monday, September 10, 2018 3:42 AM
>To: intel-gfx@lists.freedesktop.org
>Cc: Wajdeczko, Michal ; Spotswood, John A
>; Srivatsa, Anusha ;
>Lis, Tomasz ; Ceraolo Spurio, Daniele
>
>Subject: [CI v2 1/2] drm/i915/guc: Update GuC power domain
== Series Details ==
Series: drm/i915/ringbuffer: Reload PDs harder on byt/bcs
URL : https://patchwork.freedesktop.org/series/49429/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4792_full -> Patchwork_10135_full =
== Summary - SUCCESS ==
No regressions found.
== Kn
== Series Details ==
Series: series starting with [CI,v2,1/2] drm/i915/guc: Update GuC power domain
states
URL : https://patchwork.freedesktop.org/series/49423/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4792 -> Patchwork_10137 =
== Summary - SUCCESS ==
No regression
48 bit ppgtt device configuration is really just extended address
range full ppgtt and may actually be something other than 48 bits.
Change USES_FULL_48BIT_PPGTT() to USES_FULL_4LVL_PPGTT() to better
describe that a 4 level walk table extended range PPGTT is being
used. Add a new device info field
On Mon, Sep 10, 2018 at 10:12:25AM -0700, Bob Paauwe wrote:
1;5202;0c> 48 bit ppgtt device configuration is really just extended address
> range full ppgtt and may actually be something other than 48 bits.
>
> Change USES_FULL_48BIT_PPGTT() to USES_FULL_4LVL_PPGTT() to better
> describe that a 4 l
== Series Details ==
Series: drm/i915/chv: Update csc coefficient matrix during modeset (rev2)
URL : https://patchwork.freedesktop.org/series/49430/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4792_full -> Patchwork_10136_full =
== Summary - SUCCESS ==
No regressions f
== Series Details ==
Series: drm/i915: Rename full ppgtt configuration to be more generic (rev3)
URL : https://patchwork.freedesktop.org/series/49021/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4c677e951cdc drm/i915: Make 48bit full ppgtt configuration generic (v3)
-:16: WAR
== Series Details ==
Series: drm/i915: Rename full ppgtt configuration to be more generic (rev3)
URL : https://patchwork.freedesktop.org/series/49021/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: Make 48bit full ppgtt configuration generic (v3)
+drivers/gpu/drm/i
== Series Details ==
Series: drm/i915: Rename full ppgtt configuration to be more generic (rev3)
URL : https://patchwork.freedesktop.org/series/49021/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4793 -> Patchwork_10138 =
== Summary - FAILURE ==
Serious unknown changes
On Mon, 10 Sep 2018 10:32:42 -0700
Rodrigo Vivi wrote:
> On Mon, Sep 10, 2018 at 10:12:25AM -0700, Bob Paauwe wrote:
> 1;5202;0c> 48 bit ppgtt device configuration is really just extended address
> > range full ppgtt and may actually be something other than 48 bits.
> >
> > Change USES_FULL_48BI
== Series Details ==
Series: series starting with [CI,v2,1/2] drm/i915/guc: Update GuC power domain
states
URL : https://patchwork.freedesktop.org/series/49423/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4792_full -> Patchwork_10137_full =
== Summary - SUCCESS ==
No
From: Animesh Manna
ICL supports DC5, DC6, and DC9. Enable DC9 during screen-off, and enable
DC5/6 when appropriate.
v2: (James Ausmus)
- Also handle ICL as GEN9_LP in i915_drm_suspend_late and
i915_drm_suspend_early
- Add DC9 to gen9_dc_mask for ICL
- Re-order GEN checks for newest platfo
== Series Details ==
Series: drm/i915/icl: Enable DC9 as lowest possible state during screen-off
URL : https://patchwork.freedesktop.org/series/49447/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
aeb4804d1d5b drm/i915/icl: Enable DC9 as lowest possible state during screen-off
Quoting Srivatsa, Anusha (2018-09-10 17:39:30)
>
>
> >-Original Message-
> >From: Wajdeczko, Michal
> >Sent: Monday, September 10, 2018 3:42 AM
> >To: intel-gfx@lists.freedesktop.org
> >Cc: Wajdeczko, Michal ; Spotswood, John A
> >; Srivatsa, Anusha ;
> >Lis, Tomasz ; Ceraolo Spurio, Dani
On Tue, Jul 31, 2018 at 02:07:05PM -0700, Manasi Navare wrote:
> From: "Srivatsa, Anusha"
>
> DSC has some Rate Control values that remain constant
> across all configurations. These are as per the DSC
> standard.
>
> v3:
> * Define them in drm_dsc.h as they are
> DSC constants (Manasi)
> v2:
>
Pulled, thanks!
On Mon, Sep 10, 2018 at 05:22:12PM +0800, Zhenyu Wang wrote:
>
> Hi,
>
> Here's more gvt-fixes for 4.19. Most critical one is to fix
> KVM's mm reference when we access guest memory, issue was raised
> by Linus in
> https://lists.freedesktop.org/archives/intel-gvt-dev/2018-Augu
== Series Details ==
Series: drm/i915/icl: Enable DC9 as lowest possible state during screen-off
URL : https://patchwork.freedesktop.org/series/49447/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4793 -> Patchwork_10139 =
== Summary - FAILURE ==
Serious unknown changes
Quoting Bob Paauwe (2018-09-10 18:12:25)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index d6f7b9fe1d26..e0619952ff52 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -299,6 +299,7 @@ static const struct intel_device_
On Fri, 2018-09-07 at 22:18 +0300, Ville Syrjälä wrote:
> On Fri, Sep 07, 2018 at 11:31:15AM -0700, Dhinakaran Pandiyan wrote:
> > On Fri, 2018-09-07 at 09:25 -0700, Manasi Navare wrote:
> > > On Fri, Sep 07, 2018 at 05:34:23PM +0300, Ville Syrjälä wrote:
> > > > On Thu, Sep 06, 2018 at 11:21:34PM
On Mon, 10 Sep 2018 20:56:51 +0100
Chris Wilson wrote:
> Quoting Bob Paauwe (2018-09-10 18:12:25)
> > diff --git a/drivers/gpu/drm/i915/i915_pci.c
> > b/drivers/gpu/drm/i915/i915_pci.c
> > index d6f7b9fe1d26..e0619952ff52 100644
> > --- a/drivers/gpu/drm/i915/i915_pci.c
> > +++ b/drivers/gpu/drm
Quoting Bob Paauwe (2018-09-10 21:34:00)
> On Mon, 10 Sep 2018 20:56:51 +0100
> Chris Wilson wrote:
>
> > Quoting Bob Paauwe (2018-09-10 18:12:25)
> > > diff --git a/drivers/gpu/drm/i915/i915_pci.c
> > > b/drivers/gpu/drm/i915/i915_pci.c
> > > index d6f7b9fe1d26..e0619952ff52 100644
> > > --- a/
59 matches
Mail list logo
