Re: [Intel-gfx] [PATCH 3/9] drm/i915/selftests: Basic stress test for rapid context switching

2018-09-05 Thread Dan Carpenter
Hi Chris, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on v4.19-rc2 next-20180904] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.

Re: [Intel-gfx] [PATCH 06/14] drm: extract drm_atomic_uapi.c

2018-09-05 Thread Daniel Vetter
On Tue, Sep 04, 2018 at 01:41:33PM -0700, Rodrigo Vivi wrote: > Maybe start a new file with SPDX identifier? > > I like the idea of this split... I just checked, none of the other drm files have them. I'm not sure I want to start this specific bikeshed, so I think I'll leave it as-is. > Acked-by

[Intel-gfx] [PATCH] drm: extract drm_atomic_uapi.c

2018-09-05 Thread Daniel Vetter
This leaves all the commit/check and state handling in drm_atomic.c, while pulling all the uapi glue and the huge ioctl itself into a seprate file. This seems to almost perfectly split the rather big drm_atomic.c file into 2 equal sizes. Also adjust the kerneldoc and type a very terse overview te

[Intel-gfx] [PATCH] drm: Update todo.rst

2018-09-05 Thread Daniel Vetter
- drmP.h is now fully split up. - vkms is happening (and will gain its own todo and docs under a new vkms.rst file real soon) - legacy cruft is completely hidden now, drm_vblank.c is split out from drm_irq.c now. I've decided to drop the task to split out drm_legacy.ko, partially because Dave

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/14] drm: Add drm/kernel.h header file (rev3)

2018-09-05 Thread Patchwork
== Series Details == Series: series starting with [01/14] drm: Add drm/kernel.h header file (rev3) URL : https://patchwork.freedesktop.org/series/49089/ State : warning == Summary == $ dim checkpatch origin/drm-tip e970ce2437df drm: Add drm/kernel.h header file -:139: WARNING:FILE_PATH_CHANGES

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/14] drm: Add drm/kernel.h header file (rev3)

2018-09-05 Thread Patchwork
== Series Details == Series: series starting with [01/14] drm: Add drm/kernel.h header file (rev3) URL : https://patchwork.freedesktop.org/series/49089/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm: Add drm/kernel.h header file -drivers/gpu/drm/i915/selftests/../i915_d

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [01/14] drm: Add drm/kernel.h header file (rev3)

2018-09-05 Thread Patchwork
== Series Details == Series: series starting with [01/14] drm: Add drm/kernel.h header file (rev3) URL : https://patchwork.freedesktop.org/series/49089/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4770 -> Patchwork_10087 = == Summary - FAILURE == Serious unknown change

[Intel-gfx] [PATCH] drm/i915/selftests: Basic stress test for rapid context switching

2018-09-05 Thread Chris Wilson
We need to exercise the HW and submission paths for switching contexts rapidly to check that features such as execlists' wa_tail are adequate. Plus it's an interesting baseline latency metric. v2: Check the initial request for allocation errors Signed-off-by: Chris Wilson --- .../gpu/drm/i915/s

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/9] drm/i915/execlists: Avoid kicking priority on the current context (rev2)

2018-09-05 Thread Patchwork
== Series Details == Series: series starting with [1/9] drm/i915/execlists: Avoid kicking priority on the current context (rev2) URL : https://patchwork.freedesktop.org/series/48936/ State : failure == Summary == Applying: drm/i915/execlists: Avoid kicking priority on the current context Appl

Re: [Intel-gfx] [PATCH 1/1] firmware/dmc/icl: load v1.07 on icelake.

2018-09-05 Thread Joonas Lahtinen
Quoting Rodrigo Vivi (2018-09-04 08:27:14) > On Mon, Sep 03, 2018 at 01:00:39PM +0300, Imre Deak wrote: > > On Mon, Aug 27, 2018 at 05:38:44PM -0700, Anusha Srivatsa wrote: > > > Add Support to load DMC on Icelake. > > > > > > While at it, also add support to load the firmware > > > during system

[Intel-gfx] [PATCH v2 2/2] drm/i915/icl: Update result lines in correspondence with result blocks

2018-09-05 Thread Karthik B S
As the result blocks for WM1-WM7 are always kept higher than the level below the present level, make sure result lines are also higher than the level below for WM1-WM7. Signed-off-by: Karthik B S --- drivers/gpu/drm/i915/intel_pm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gp

[Intel-gfx] [PATCH v2 1/2] drm/i915/icl: Avoid Gen10 watermark workarounds in Gen11

2018-09-05 Thread Karthik B S
Display Workarounds #1125 and #1126 are intended for Gen10 and below platforms. These workarounds can be avoided in Gen11. The result blocks for WM1-WM7 should be atleast as high as the level below the current level(Part of Display WA #1125). This part is applicable even for Gen11, so it is taken

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915/icl: Avoid Gen10 watermark workarounds in Gen11

2018-09-05 Thread Patchwork
== Series Details == Series: series starting with [v2,1/2] drm/i915/icl: Avoid Gen10 watermark workarounds in Gen11 URL : https://patchwork.freedesktop.org/series/49170/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4770 -> Patchwork_10089 = == Summary - WARNING == Mino

Re: [Intel-gfx] [PATCH v2] drm/i915: Reduce context HW ID lifetime

2018-09-05 Thread Tvrtko Ursulin
On 04/09/2018 16:31, Chris Wilson wrote: Future gen reduce the number of bits we will have available to differentiate between contexts, so reduce the lifetime of the ID assignment from that of the context to its current active cycle (i.e. only while it is pinned for use by the HW, will it have a

[Intel-gfx] [PATCH] drm/i915/dp: optimize eDP 1.4+ link config fast and narrow

2018-09-05 Thread Jani Nikula
We've opted to use the maximum link rate and lane count for eDP panels, because typically the maximum supported configuration reported by the panel has matched the native resolution requirements of the panel, and optimizing the link has lead to problems. With eDP 1.4 rate select method and DSC fea

Re: [Intel-gfx] [PATCH] drm/i915: optimzie eDP 1.4 config

2018-09-05 Thread Jani Nikula
On Tue, 04 Sep 2018, Chris Wilson wrote: > Quoting Lee, Shawn C (2018-09-04 15:55:41) >> eDP 1.4 introduce a new link rates flexibility and selection. >> It provided system specific link rate optimization and power >> efficiency. We should keep eDP 1.3 and older version to use >> max link rate app

Re: [Intel-gfx] [PATCH] drm/i915: optimzie eDP 1.4 config

2018-09-05 Thread Jani Nikula
On Tue, 04 Sep 2018, Chris Wilson wrote: > Quoting Lee, Shawn C (2018-09-04 15:55:41) >> eDP 1.4 introduce a new link rates flexibility and selection. >> It provided system specific link rate optimization and power >> efficiency. We should keep eDP 1.3 and older version to use >> max link rate app

[Intel-gfx] [PATCH] drm/i915/bdw: Increase IPS disable timeout to 100ms

2018-09-05 Thread Imre Deak
During IPS disabling the current 42ms timeout value leads to occasional timeouts, increase it to 100ms which seems to get rid of the problem. References: https://bugs.freedesktop.org/show_bug.cgi?id=107494 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107562 Reported-by: Diego Viola Test

Re: [Intel-gfx] [PATCH] drm/i915/dp_mst: Fix enabling pipe clock for all streams

2018-09-05 Thread Jani Nikula
On Tue, 04 Sep 2018, Dhinakaran Pandiyan wrote: > On Tue, 2018-09-04 at 16:19 -0700, Rodrigo Vivi wrote: >> On Tue, Sep 04, 2018 at 03:53:51PM -0700, Dhinakaran Pandiyan wrote: >> > Is it possible to have another external display connected to one of >> > these? >> >> or to both of them?! >> > :)

Re: [Intel-gfx] [PATCH] drm: Reject unknown legacy bpp and dpeth for drm_mode_addfb ioctl

2018-09-05 Thread Chris Wilson
Quoting Daniel Vetter (2018-09-04 22:46:33) > On Tue, Sep 04, 2018 at 09:53:19PM +0100, Chris Wilson wrote: > > Since this is handling user provided bpp and depth, we need to sanity > > check and propagate the EINVAL back rather than assume what the insane > > client intended and fill the logs with

Re: [Intel-gfx] [PATCH 1/1] firmware/dmc/icl: load v1.07 on icelake.

2018-09-05 Thread Imre Deak
On Wed, Sep 05, 2018 at 12:07:43PM +0300, Joonas Lahtinen wrote: > Quoting Rodrigo Vivi (2018-09-04 08:27:14) > > On Mon, Sep 03, 2018 at 01:00:39PM +0300, Imre Deak wrote: > > > On Mon, Aug 27, 2018 at 05:38:44PM -0700, Anusha Srivatsa wrote: > > > > Add Support to load DMC on Icelake. > > > > >

[Intel-gfx] [PATCH] drm: Reject unknown legacy bpp and depth for drm_mode_addfb ioctl

2018-09-05 Thread Chris Wilson
Since this is handling user provided bpp and depth, we need to sanity check and propagate the EINVAL back rather than assume what the insane client intended and fill the logs with DRM_ERROR. v2: Check both bpp and depth match the builtin pixel format, and introduce a canonical DRM_FORMAT_INVALID t

Re: [Intel-gfx] [PATCH] drm/i915: Be defensive and don't assume PSR has any commit to sync against

2018-09-05 Thread Ville Syrjälä
On Tue, Sep 04, 2018 at 08:54:03PM +, Pandiyan, Dhinakaran wrote: > On Tue, 2018-09-04 at 19:12 +0100, Chris Wilson wrote: > > Quoting Ville Syrjälä (2018-09-04 19:06:29) > > > On Tue, Sep 04, 2018 at 08:59:32PM +0300, Ville Syrjälä wrote: > > > > On Tue, Sep 04, 2018 at 06:44:14PM +0100, Chris

Re: [Intel-gfx] [PATCH] drm/i915/bdw: Increase IPS disable timeout to 100ms

2018-09-05 Thread Ville Syrjälä
On Wed, Sep 05, 2018 at 01:00:05PM +0300, Imre Deak wrote: > During IPS disabling the current 42ms timeout value leads to occasional > timeouts, increase it to 100ms which seems to get rid of the problem. > > References: https://bugs.freedesktop.org/show_bug.cgi?id=107494 > Bugzilla: https://bugs.

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: optimize eDP 1.4+ link config fast and narrow (rev2)

2018-09-05 Thread Patchwork
== Series Details == Series: drm/i915/dp: optimize eDP 1.4+ link config fast and narrow (rev2) URL : https://patchwork.freedesktop.org/series/42923/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4770 -> Patchwork_10090 = == Summary - WARNING == Minor unknown changes comi

Re: [Intel-gfx] [PATCH] drm: Reject unknown legacy bpp and depth for drm_mode_addfb ioctl

2018-09-05 Thread Chris Wilson
Quoting Chris Wilson (2018-09-05 11:22:05) > Since this is handling user provided bpp and depth, we need to sanity > check and propagate the EINVAL back rather than assume what the insane > client intended and fill the logs with DRM_ERROR. > > v2: Check both bpp and depth match the builtin pixel f

Re: [Intel-gfx] [PATCH v2] drm/i915: Reduce context HW ID lifetime

2018-09-05 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-09-05 10:49:02) > > On 04/09/2018 16:31, Chris Wilson wrote: > > Future gen reduce the number of bits we will have available to > > differentiate between contexts, so reduce the lifetime of the ID > > assignment from that of the context to its current active cycle (i.e

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/2] drm/i915/icl: Avoid Gen10 watermark workarounds in Gen11

2018-09-05 Thread Patchwork
== Series Details == Series: series starting with [v2,1/2] drm/i915/icl: Avoid Gen10 watermark workarounds in Gen11 URL : https://patchwork.freedesktop.org/series/49170/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4770_full -> Patchwork_10089_full = == Summary - SUCCESS

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/bdw: Increase IPS disable timeout to 100ms

2018-09-05 Thread Patchwork
== Series Details == Series: drm/i915/bdw: Increase IPS disable timeout to 100ms URL : https://patchwork.freedesktop.org/series/49175/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4770 -> Patchwork_10091 = == Summary - WARNING == Minor unknown changes coming with Patchw

Re: [Intel-gfx] [PATCH] drm/i915: Be defensive and don't assume PSR has any commit to sync against

2018-09-05 Thread Maarten Lankhorst
Op 05-09-18 om 12:22 schreef Ville Syrjälä: > On Tue, Sep 04, 2018 at 08:54:03PM +, Pandiyan, Dhinakaran wrote: >> On Tue, 2018-09-04 at 19:12 +0100, Chris Wilson wrote: >>> Quoting Ville Syrjälä (2018-09-04 19:06:29) On Tue, Sep 04, 2018 at 08:59:32PM +0300, Ville Syrjälä wrote: > On

Re: [Intel-gfx] [PATCH v2] drm/i915: Reduce context HW ID lifetime

2018-09-05 Thread Tvrtko Ursulin
On 05/09/2018 11:33, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-09-05 10:49:02) On 04/09/2018 16:31, Chris Wilson wrote: Future gen reduce the number of bits we will have available to differentiate between contexts, so reduce the lifetime of the ID assignment from that of the context to

Re: [Intel-gfx] [PATCH v2] drm/i915: Reduce context HW ID lifetime

2018-09-05 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-09-05 10:49:02) > > On 04/09/2018 16:31, Chris Wilson wrote: > > Future gen reduce the number of bits we will have available to > > differentiate between contexts, so reduce the lifetime of the ID > > assignment from that of the context to its current active cycle (i.e

[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Reject unknown legacy bpp and dpeth for drm_mode_addfb ioctl (rev2)

2018-09-05 Thread Patchwork
== Series Details == Series: drm: Reject unknown legacy bpp and dpeth for drm_mode_addfb ioctl (rev2) URL : https://patchwork.freedesktop.org/series/49150/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4772 -> Patchwork_10092 = == Summary - SUCCESS == No regressions foun

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dp: optimize eDP 1.4+ link config fast and narrow (rev2)

2018-09-05 Thread Patchwork
== Series Details == Series: drm/i915/dp: optimize eDP 1.4+ link config fast and narrow (rev2) URL : https://patchwork.freedesktop.org/series/42923/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4770_full -> Patchwork_10090_full = == Summary - SUCCESS == No regressions f

Re: [Intel-gfx] [PATCH] [intel-gfx] drm/i915/intel_csr.c Added ICL Stepping info.

2018-09-05 Thread Imre Deak
On Mon, Sep 03, 2018 at 03:45:13AM -0400, Jyoti Yadav wrote: > As DMC Package contain DMC FW for multiple steppings including default > stepping. This patch will help to load FW for that particular stepping, > if FW for that stepping is available, instead of loading default FW. > > Signed-off-by:

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/bdw: Increase IPS disable timeout to 100ms

2018-09-05 Thread Patchwork
== Series Details == Series: drm/i915/bdw: Increase IPS disable timeout to 100ms URL : https://patchwork.freedesktop.org/series/49175/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4770_full -> Patchwork_10091_full = == Summary - SUCCESS == No regressions found. ==

Re: [Intel-gfx] [PATCH 14/23] drm/i915: Attach the pci match data to the device upon creation

2018-09-05 Thread Michal Wajdeczko
On Tue, 04 Sep 2018 23:57:33 +0200, Chris Wilson wrote: Attach our device_info to the our i915 private on creation so that it is always available for inspection. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.c | 66 +++-- 1 file changed, 38 inser

Re: [Intel-gfx] [PATCH 08/14] drm/amdgpu: Remove default best_encoder hook from DC

2018-09-05 Thread Leo Li
On 2018-09-03 12:54 PM, Daniel Vetter wrote: For atomic driver this is the default, no need to reimplement it. We still need to keep the copypasta for not-atomic drivers though, since no one polished the legacy crtc helpers as much as the atomic ones. Thanks for the patch! It seems I made an

Re: [Intel-gfx] [PATCH 08/14] drm/amdgpu: Remove default best_encoder hook from DC

2018-09-05 Thread Daniel Vetter
On Wed, Sep 5, 2018 at 3:45 PM, Leo Li wrote: > > > On 2018-09-03 12:54 PM, Daniel Vetter wrote: >> >> For atomic driver this is the default, no need to reimplement it. We >> still need to keep the copypasta for not-atomic drivers though, since >> no one polished the legacy crtc helpers as much as

[Intel-gfx] [PATH i-g-t 00/13] Tracing & workload simulation misc patches

2018-09-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin These are the small fixes and new features not depending on any unmerged patches. Virtual engine and Dynamic SSEU support is built on top of these. Each sub-series (trace.pl, gem_wsim, media-bench) starts with trivial patches and fixed, which are then followed by new featur

[Intel-gfx] [PATH i-g-t 03/13] gem_wsim: Fix BCS usage under VCS2 remap warning

2018-09-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Need to check we actually are in VCS2 remapping mode! Signed-off-by: Tvrtko Ursulin --- benchmarks/gem_wsim.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c index 80f180829241..25af4d678ba4 100644 --- a/ben

[Intel-gfx] [PATH i-g-t 02/13] trace.pl: Use undocumented -o to perf record to allow tee

2018-09-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Signed-off-by: Tvrtko Ursulin --- scripts/trace.pl | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/scripts/trace.pl b/scripts/trace.pl index 2976cfdf585a..18f9f3b18396 100755 --- a/scripts/trace.pl +++ b/scripts/trace.pl @@ -170,8 +170,9 @@ sub arg_tra

[Intel-gfx] [PATH i-g-t 08/13] gem_wsim: Per context preemption point control

2018-09-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Allow workloads to specify frequency of preemption points per context. New workload command ('X') is added to allow this. Signed-off-by: Tvrtko Ursulin --- benchmarks/gem_wsim.c | 84 -- benchmarks/wsim/README | 18 - 2 fil

[Intel-gfx] [PATH i-g-t 10/13] media-bench: Protect against incorrect -b syntax

2018-09-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin -b is to pass the command argument directly to gem_wsim so must include another -b. Signed-off-by: Tvrtko Ursulin --- scripts/media-bench.pl | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/scripts/media-bench.pl b/scripts/media-bench.pl index a3619c

[Intel-gfx] [PATH i-g-t 01/13] trace.pl: Fix frequency timeline

2018-09-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Frequency timeline needs to be finished with an entry spanning to the end of known time so that the last known frequency is displayed. Signed-off-by: Tvrtko Ursulin --- scripts/trace.pl | 2 ++ 1 file changed, 2 insertions(+) diff --git a/scripts/trace.pl b/scripts/trace.

[Intel-gfx] [PATH i-g-t 09/13] media-bench: Update for engine=class:instance tracepoints

2018-09-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Signed-off-by: Tvrtko Ursulin --- scripts/media-bench.pl | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/scripts/media-bench.pl b/scripts/media-bench.pl index 375844d9cdf6..a3619ceb34cc 100755 --- a/scripts/media-bench.pl +++ b/scripts/media-benc

[Intel-gfx] [PATH i-g-t 04/13] gem_wsim: Check sleep times

2018-09-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Notice in more places if we are running behind. Signed-off-by: Tvrtko Ursulin --- benchmarks/gem_wsim.c | 52 ++- 1 file changed, 46 insertions(+), 6 deletions(-) diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c index 25af

[Intel-gfx] [PATH i-g-t 05/13] gem_wsim: Make workload commands case sensitive

2018-09-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Need namespace for new commands and I never documented they are case insensitive so it is fine. Signed-off-by: Tvrtko Ursulin --- benchmarks/gem_wsim.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem

[Intel-gfx] [PATH i-g-t 06/13] gem_wsim: Context priority support

2018-09-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin A new workload command ('P') is added which enables per context dynamic priority control. Signed-off-by: Tvrtko Ursulin --- benchmarks/gem_wsim.c | 48 +- benchmarks/wsim/README | 18 2 files changed, 65 insertions(

[Intel-gfx] [PATH i-g-t 11/13] media-bench: Fix tracing of direct workloads

2018-09-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Build argument list properly and check exit codes when executing sub-commands. Signed-off-by: Tvrtko Ursulin --- scripts/media-bench.pl | 54 +++--- 1 file changed, 35 insertions(+), 19 deletions(-) diff --git a/scripts/media-bench.pl b

[Intel-gfx] [PATH i-g-t 12/13] media-bench: Write out trace files directly.

2018-09-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Instead of relying on shell redirection. Signed-off-by: Tvrtko Ursulin --- scripts/media-bench.pl | 24 ++-- 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/scripts/media-bench.pl b/scripts/media-bench.pl index 9bf8c8789fe2..77e75c78b113

[Intel-gfx] [PATH i-g-t 07/13] gem_wsim: Make batches preemptable by default

2018-09-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin MI_NOOP cannot be preempted which means up to now gem_wsim workloads were preemptable on batch buffer granularity only. Add MI_ARB_CHK every 100us so the new default is mid-batch preemption. Signed-off-by: Tvrtko Ursulin --- benchmarks/gem_wsim.c | 20

[Intel-gfx] [PATH i-g-t 13/13] media-bench: Add mixed mode evaluation

2018-09-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Mixed mode (-m) enables evaluation of different workload sets against one or more load balancing strategies. Contrary to the default mode which runs all selected workloads serialy, mixed mode runs a second stage where they are all run in parallel. The performance difference

[Intel-gfx] [PATCH 2/7] drm: Drop drmP.h from drm_connector.c

2018-09-05 Thread Daniel Vetter
Only needed minimal changes in drm_internal.h (for the drm_ioctl_t type and a few forward declarations), plus a few missing includes in drm_connector.c. Yay, the last stage of the drm header cleanup can finally commence! v2: Compiles now, with drm/kernel.h extracted. Reviewed-by: Sean Paul Sign

[Intel-gfx] [PATCH 1/7] drm: Add drm/drm_util.h header file

2018-09-05 Thread Daniel Vetter
We have a bunch of neat little macros all over the place which should move to kernel.h. But some of them died in bikesheds on lkml, and we need a decent home for them. Start out by moving the for_each_if macro there. v2: Rename to drm_util.h instead (Dave&Sean) Cc: Sean Paul Acked-by: Sean Paul

[Intel-gfx] [PATCH 3/7] drm: drop drmP.h include from drm_plane.c

2018-09-05 Thread Daniel Vetter
Just a bit of missing includes and pre declarations. v2: Compiles now, with drm/kernel.h extracted. v3: Rebase Reviewed-by: Sean Paul Signed-off-by: Daniel Vetter --- drivers/gpu/drm/drm_crtc_internal.h | 8 drivers/gpu/drm/drm_plane.c | 11 ++- include/drm/drm_color

[Intel-gfx] [PATCH 4/7] drm: drop drmP.h include from drm_crtc.c

2018-09-05 Thread Daniel Vetter
This is starting to become easy! v2: Compiles now, with drm/kernel.h extracted. Reviewed-by: Sean Paul Signed-off-by: Daniel Vetter --- drivers/gpu/drm/drm_crtc.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c ind

[Intel-gfx] [PATCH 6/7] drm: Update todo.rst

2018-09-05 Thread Daniel Vetter
- drmP.h is now fully split up. - vkms is happening (and will gain its own todo and docs under a new vkms.rst file real soon) - legacy cruft is completely hidden now, drm_vblank.c is split out from drm_irq.c now. I've decided to drop the task to split out drm_legacy.ko, partially because Dave

[Intel-gfx] [PATCH 5/7] drm/atomic: trim driver interface/docs

2018-09-05 Thread Daniel Vetter
Remove the kerneldoc and EXPORT_SYMBOL which aren't used and really shouldn't ever be used by drivers directly. Unfortunately this means we need to move the set_writeback_fb function around to avoid a forward decl. Signed-off-by: Daniel Vetter Cc: David Airlie Cc: Gustavo Padovan Cc: Maarten L

[Intel-gfx] [PATCH 7/7] drm: extract drm_atomic_uapi.c

2018-09-05 Thread Daniel Vetter
This leaves all the commit/check and state handling in drm_atomic.c, while pulling all the uapi glue and the huge ioctl itself into a seprate file. This seems to almost perfectly split the rather big drm_atomic.c file into 2 equal sizes. Also adjust the kerneldoc and type a very terse overview te

Re: [Intel-gfx] [PATCH 14/23] drm/i915: Attach the pci match data to the device upon creation

2018-09-05 Thread Chris Wilson
Quoting Michal Wajdeczko (2018-09-05 14:36:13) > On Tue, 04 Sep 2018 23:57:33 +0200, Chris Wilson > wrote: > > > Attach our device_info to the our i915 private on creation so that it is > > always available for inspection. > > > > Signed-off-by: Chris Wilson > > --- > > @@ -1426,7 +1437,6 @@ i

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm: Add drm/drm_util.h header file

2018-09-05 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm: Add drm/drm_util.h header file URL : https://patchwork.freedesktop.org/series/49184/ State : warning == Summary == $ dim checkpatch origin/drm-tip d5a605f276d9 drm: Add drm/drm_util.h header file -:144: WARNING:FILE_PATH_CHANGES: add

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/7] drm: Add drm/drm_util.h header file

2018-09-05 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm: Add drm/drm_util.h header file URL : https://patchwork.freedesktop.org/series/49184/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm: Add drm/drm_util.h header file -drivers/gpu/drm/i915/selftests/../i915_drv.h:

[Intel-gfx] [PATCH 1/2] drm/i915: Attach the pci match data to the device upon creation

2018-09-05 Thread Chris Wilson
Attach our device_info to the our i915 private on creation so that it is always available for inspection. Signed-off-by: Chris Wilson Reviewed-by: Michal Wajdeczko --- drivers/gpu/drm/i915/i915_drv.c | 66 +++-- 1 file changed, 38 insertions(+), 28 deletions(-) diff

[Intel-gfx] [PATCH 2/2] drm/i915: Move final cleanup of drm_i915_private to i915_driver_destroy

2018-09-05 Thread Chris Wilson
Introduce a complementary function to i915_driver_create() to undo all that is created. Suggested-by: Michal Wajdeczko Signed-off-by: Chris Wilson Cc: Michal Wajdeczko --- drivers/gpu/drm/i915/i915_drv.c | 19 +-- 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/d

Re: [Intel-gfx] [igt-dev] [PATH i-g-t 04/13] gem_wsim: Check sleep times

2018-09-05 Thread Ville Syrjälä
On Wed, Sep 05, 2018 at 02:49:30PM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > Notice in more places if we are running behind. > > Signed-off-by: Tvrtko Ursulin > --- > benchmarks/gem_wsim.c | 52 ++- > 1 file changed, 46 insertions(+), 6 del

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/7] drm: Add drm/drm_util.h header file

2018-09-05 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm: Add drm/drm_util.h header file URL : https://patchwork.freedesktop.org/series/49184/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4772 -> Patchwork_10093 = == Summary - SUCCESS == No regressions found. Exte

[Intel-gfx] [PATCH 2/7] drm/i915: Program RPCS for Broadwell

2018-09-05 Thread Tvrtko Ursulin
From: Chris Wilson Currently we only configure the power gating for Skylake and above, but the configuration should equally apply to Broadwell and Braswell. Even though, there is not as much variation as for later generations, we want to expose control over the configuration to userspace and may

[Intel-gfx] [PATCH v11 0/7] Per context dynamic (sub)slice power-gating

2018-09-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Updated series after continuing Lionel's work. Userspace for the feature is the media-driver project on GitHub. Please see https://github.com/intel/media-driver/pull/271/commits. No headline changes this time. Some review feedback, some refactoring, some patches got merged

[Intel-gfx] [PATCH 1/7] drm/i915/execlists: Move RPCS setup to context pin

2018-09-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Configuring RPCS in context image just before pin is sufficient and will come extra handy in one of the following patches. v2: * Split image setup a bit differently. (Chris Wilson) Signed-off-by: Tvrtko Ursulin Suggested-by: Chris Wilson Cc: Chris Wilson --- drivers/gp

[Intel-gfx] [PATCH 4/7] drm/i915/perf: lock powergating configuration to default when active

2018-09-05 Thread Tvrtko Ursulin
From: Lionel Landwerlin If some of the contexts submitting workloads to the GPU have been configured to shutdown slices/subslices, we might loose the NOA configurations written in the NOA muxes. One possible solution to this problem is to reprogram the NOA muxes when we switch to a new context.

[Intel-gfx] [PATCH 6/7] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-09-05 Thread Tvrtko Ursulin
From: Chris Wilson We want to allow userspace to reconfigure the subslice configuration for its own use case. To do so, we expose a context parameter to allow adjustment of the RPCS register stored within the context image (and currently not accessible via LRI). If the context is adjusted before

[Intel-gfx] [PATCH 3/7] drm/i915: Record the sseu configuration per-context & engine

2018-09-05 Thread Tvrtko Ursulin
From: Chris Wilson We want to expose the ability to reconfigure the slices, subslice and eu per context and per engine. To facilitate that, store the current configuration on the context for each engine, which is initially set to the device default upon creation. v2: record sseu configuration pe

[Intel-gfx] [PATCH 5/7] drm/i915: Add timeline barrier support

2018-09-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Timeline barrier allows serialization between different timelines. After calling i915_timeline_set_barrier with a request, all following submissions on this timeline will be set up as depending on this request, or barrier. Once the barrier has been completed it automatically

[Intel-gfx] [PATCH 7/7] drm/i915/icl: Support co-existance between per-context SSEU and OA

2018-09-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin When OA is active we want to lock the powergating configuration, but on Icelake users like media stack will have issues if we lock to the full device configuration. Instead lock to a subset of (sub)slices which are currently a known working configuration for all users. Sign

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Attach the pci match data to the device upon creation

2018-09-05 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Attach the pci match data to the device upon creation URL : https://patchwork.freedesktop.org/series/49187/ State : warning == Summary == $ dim checkpatch origin/drm-tip 418a878462ee drm/i915: Attach the pci match data to the d

[Intel-gfx] [PATH i-g-t 0/2] Per context dynamic (sub)slice power-gating

2018-09-05 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Some tests for the corresponding i915 series. I dropped the benchmark for now but plan to bring it back later. Lionel Landwerlin (2): headers: bump tests: add slice power programming test include/drm-uapi/amdgpu_drm.h | 23 + include/drm-uapi/drm.h |7 +

[Intel-gfx] [PATH i-g-t 1/2] headers: bump

2018-09-05 Thread Tvrtko Ursulin
From: Lionel Landwerlin --- include/drm-uapi/amdgpu_drm.h | 23 ++ include/drm-uapi/drm.h | 7 + include/drm-uapi/drm_mode.h| 22 +- include/drm-uapi/etnaviv_drm.h | 6 + include/drm-uapi/exynos_drm.h | 240 include/drm-uapi/i915_drm.h| 43 +++ include/d

[Intel-gfx] [PATH i-g-t 2/2] tests: add slice power programming test

2018-09-05 Thread Tvrtko Ursulin
From: Lionel Landwerlin Verifies that the kernel programs slices correctly based by reading the value of PWR_CLK_STATE register or MI_SET_PREDICATE on platforms before Cannonlake. v2: Add subslice tests (Lionel) Use MI_SET_PREDICATE for further verification when available (Lionel) v3: Renam

Re: [Intel-gfx] [PATCH] drm: Reject unknown legacy bpp and depth for drm_mode_addfb ioctl

2018-09-05 Thread Daniel Vetter
On Wed, Sep 05, 2018 at 11:22:05AM +0100, Chris Wilson wrote: > Since this is handling user provided bpp and depth, we need to sanity > check and propagate the EINVAL back rather than assume what the insane > client intended and fill the logs with DRM_ERROR. > > v2: Check both bpp and depth match

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Attach the pci match data to the device upon creation

2018-09-05 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Attach the pci match data to the device upon creation URL : https://patchwork.freedesktop.org/series/49187/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4772 -> Patchwork_10094 = == Summary - SUCCESS ==

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Per context dynamic (sub)slice power-gating (rev2)

2018-09-05 Thread Patchwork
== Series Details == Series: Per context dynamic (sub)slice power-gating (rev2) URL : https://patchwork.freedesktop.org/series/48194/ State : warning == Summary == $ dim checkpatch origin/drm-tip ed66235dc3a5 drm/i915/execlists: Move RPCS setup to context pin ecdf22ac2704 drm/i915: Program RPC

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Per context dynamic (sub)slice power-gating (rev2)

2018-09-05 Thread Patchwork
== Series Details == Series: Per context dynamic (sub)slice power-gating (rev2) URL : https://patchwork.freedesktop.org/series/48194/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915/execlists: Move RPCS setup to context pin Okay! Commit: drm/i915: Program RPCS for B

[Intel-gfx] ✓ Fi.CI.IGT: success for drm: Reject unknown legacy bpp and dpeth for drm_mode_addfb ioctl (rev2)

2018-09-05 Thread Patchwork
== Series Details == Series: drm: Reject unknown legacy bpp and dpeth for drm_mode_addfb ioctl (rev2) URL : https://patchwork.freedesktop.org/series/49150/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4772_full -> Patchwork_10092_full = == Summary - SUCCESS == No regres

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Enable RGB565 90/270 plane rotation for gen11 onwards.

2018-09-05 Thread Ville Syrjälä
On Mon, Aug 27, 2018 at 03:37:53PM +0300, Juha-Pekka Heikkila wrote: > From gen11 onwards RGB565 90/270 plane rotation is supported on hardware. > > IGT: https://patchwork.freedesktop.org/series/48756/ > Signed-off-by: Juha-Pekka Heikkila > --- > drivers/gpu/drm/i915/intel_atomic_plane.c | 9 +++

[Intel-gfx] ✓ Fi.CI.BAT: success for Per context dynamic (sub)slice power-gating (rev2)

2018-09-05 Thread Patchwork
== Series Details == Series: Per context dynamic (sub)slice power-gating (rev2) URL : https://patchwork.freedesktop.org/series/48194/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4772 -> Patchwork_10095 = == Summary - SUCCESS == No regressions found. External URL: h

Re: [Intel-gfx] [PATCH 1/7] drm/i915/execlists: Move RPCS setup to context pin

2018-09-05 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-09-05 15:22:16) > From: Tvrtko Ursulin > > Configuring RPCS in context image just before pin is sufficient and will > come extra handy in one of the following patches. > > v2: > * Split image setup a bit differently. (Chris Wilson) > > Signed-off-by: Tvrtko Ursulin

Re: [Intel-gfx] [PATCH 3/7] drm/i915: Record the sseu configuration per-context & engine

2018-09-05 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-09-05 15:22:18) > From: Chris Wilson > > We want to expose the ability to reconfigure the slices, subslice and > eu per context and per engine. To facilitate that, store the current > configuration on the context for each engine, which is initially set > to the device

Re: [Intel-gfx] [PATCH 4/7] drm/i915/perf: lock powergating configuration to default when active

2018-09-05 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-09-05 15:22:19) > -static u32 make_rpcs(struct drm_i915_private *dev_priv, > -struct intel_sseu *ctx_sseu) > +u32 gen8_make_rpcs(struct drm_i915_private *dev_priv, > + struct intel_sseu *req_sseu) Should we retrospectively make this

Re: [Intel-gfx] [PATCH 5/7] drm/i915: Add timeline barrier support

2018-09-05 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-09-05 15:22:20) > From: Tvrtko Ursulin > > Timeline barrier allows serialization between different timelines. > > After calling i915_timeline_set_barrier with a request, all following > submissions on this timeline will be set up as depending on this request, > or ba

[Intel-gfx] [PATCH] drm/amdgpu: Remove default best_encoder hook from DC

2018-09-05 Thread Daniel Vetter
For atomic driver this is the default, no need to reimplement it. We still need to keep the copypasta for not-atomic drivers though, since no one polished the legacy crtc helpers as much as the atomic ones. Signed-off-by: Daniel Vetter Cc: Alex Deucher Cc: Harry Wentland Cc: Andrey Grodzovsky

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/amdgpu: Remove default best_encoder hook from DC

2018-09-05 Thread Patchwork
== Series Details == Series: drm/amdgpu: Remove default best_encoder hook from DC URL : https://patchwork.freedesktop.org/series/49194/ State : warning == Summary == $ dim checkpatch origin/drm-tip 0e61c0665c52 drm/amdgpu: Remove default best_encoder hook from DC -:58: WARNING:NO_AUTHOR_SIGN_O

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/amdgpu: Remove default best_encoder hook from DC

2018-09-05 Thread Patchwork
== Series Details == Series: drm/amdgpu: Remove default best_encoder hook from DC URL : https://patchwork.freedesktop.org/series/49194/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/amdgpu: Remove default best_encoder hook from DC -drivers/gpu/drm/amd/amdgpu/../display/

Re: [Intel-gfx] [PATCH 6/7] drm/i915: Expose RPCS (SSEU) configuration to userspace

2018-09-05 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-09-05 15:22:21) > From: Chris Wilson Now this looks nothing like my first suggestion! I think Tvrtko should stand ad the author of the final mechanism, I think it is substantially different from the submission method first done by Lionel. > We want to allow userspa

[Intel-gfx] [PATCH v3] drm: Reject unknown legacy bpp and depth for drm_mode_addfb ioctl

2018-09-05 Thread Chris Wilson
Since this is handling user provided bpp and depth, we need to sanity check and propagate the EINVAL back rather than assume what the insane client intended and fill the logs with DRM_ERROR. v2: Check both bpp and depth match the builtin pixel format, and introduce a canonical DRM_FORMAT_INVALID t

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/amdgpu: Remove default best_encoder hook from DC

2018-09-05 Thread Patchwork
== Series Details == Series: drm/amdgpu: Remove default best_encoder hook from DC URL : https://patchwork.freedesktop.org/series/49194/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4772 -> Patchwork_10096 = == Summary - FAILURE == Serious unknown changes coming with Pat

Re: [Intel-gfx] [PATCH] drm/i915/dp: optimize eDP 1.4+ link config fast and narrow

2018-09-05 Thread Manasi Navare
On Wed, Sep 05, 2018 at 12:53:21PM +0300, Jani Nikula wrote: > We've opted to use the maximum link rate and lane count for eDP panels, > because typically the maximum supported configuration reported by the > panel has matched the native resolution requirements of the panel, and > optimizing the li

[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Reject unknown legacy bpp and dpeth for drm_mode_addfb ioctl (rev3)

2018-09-05 Thread Patchwork
== Series Details == Series: drm: Reject unknown legacy bpp and dpeth for drm_mode_addfb ioctl (rev3) URL : https://patchwork.freedesktop.org/series/49150/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4772 -> Patchwork_10097 = == Summary - SUCCESS == No regressions foun

Re: [Intel-gfx] [PATCH 1/1] firmware/dmc/icl: load v1.07 on icelake.

2018-09-05 Thread Rodrigo Vivi
On Wed, Sep 05, 2018 at 12:07:43PM +0300, Joonas Lahtinen wrote: > Quoting Rodrigo Vivi (2018-09-04 08:27:14) > > On Mon, Sep 03, 2018 at 01:00:39PM +0300, Imre Deak wrote: > > > On Mon, Aug 27, 2018 at 05:38:44PM -0700, Anusha Srivatsa wrote: > > > > Add Support to load DMC on Icelake. > > > > >

Re: [Intel-gfx] [PATCH] drm/i915/dp_mst: Fix enabling pipe clock for all streams

2018-09-05 Thread Rodrigo Vivi
On Wed, Sep 05, 2018 at 01:01:58PM +0300, Jani Nikula wrote: 1;5202;0c> On Tue, 04 Sep 2018, Dhinakaran Pandiyan wrote: > > On Tue, 2018-09-04 at 16:19 -0700, Rodrigo Vivi wrote: > >> On Tue, Sep 04, 2018 at 03:53:51PM -0700, Dhinakaran Pandiyan wrote: > >> > Is it possible to have another extern

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