Re: [Intel-gfx] [DIM DOCS PATCH 2/2] doc: clarify what type of changes are acceptable at commit time

2018-07-06 Thread Jani Nikula
On Thu, 05 Jul 2018, Daniel Vetter wrote: > On Thu, Jul 5, 2018 at 3:53 PM, Jani Nikula wrote: >> On Wed, 27 Jun 2018, Daniel Vetter wrote: >>> On Wed, Jun 27, 2018 at 5:13 PM, Jani Nikula wrote: As a rule of thumb, don't change patches while committing. Cc: Imre Deak Signe

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/27] drm/i915: Squelch very verbose error logging

2018-07-06 Thread Patchwork
== Series Details == Series: series starting with [01/27] drm/i915: Squelch very verbose error logging URL : https://patchwork.freedesktop.org/series/46051/ State : warning == Summary == $ dim checkpatch origin/drm-tip 47eefccc61dd drm/i915: Squelch very verbose error logging -:10: WARNING:CO

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/27] drm/i915: Squelch very verbose error logging

2018-07-06 Thread Patchwork
== Series Details == Series: series starting with [01/27] drm/i915: Squelch very verbose error logging URL : https://patchwork.freedesktop.org/series/46051/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Squelch very verbose error logging + +Error in reading or en

Re: [Intel-gfx] [PATCH v3 1/3] drm/i915/dsi: rename the current DSI files based on first platform

2018-07-06 Thread Chauhan, Madhav
> -Original Message- > From: Nikula, Jani > Sent: Thursday, July 5, 2018 6:55 PM > To: intel-gfx@lists.freedesktop.org > Cc: Nikula, Jani ; Chauhan, Madhav > ; Daniel Vetter ; Chris > Wilson ; Ville Syrjälä > > Subject: [PATCH v3 1/3] drm/i915/dsi: rename the current DSI files based on > f

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/27] drm/i915: Squelch very verbose error logging

2018-07-06 Thread Patchwork
== Series Details == Series: series starting with [01/27] drm/i915: Squelch very verbose error logging URL : https://patchwork.freedesktop.org/series/46051/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4441 -> Patchwork_9560 = == Summary - SUCCESS == No regressions fou

Re: [Intel-gfx] [PATCH v3 1/3] drm/i915/dsi: rename the current DSI files based on first platform

2018-07-06 Thread Jani Nikula
On Fri, 06 Jul 2018, "Chauhan, Madhav" wrote: >> -Original Message- >> From: Nikula, Jani >> Sent: Thursday, July 5, 2018 6:55 PM >> To: intel-gfx@lists.freedesktop.org >> Cc: Nikula, Jani ; Chauhan, Madhav >> ; Daniel Vetter ; Chris >> Wilson ; Ville Syrjälä >> >> Subject: [PATCH v3 1/3]

[Intel-gfx] ✓ Fi.CI.BAT: success for ICELAKE DSI DRIVER (rev4)

2018-07-06 Thread Patchwork
== Series Details == Series: ICELAKE DSI DRIVER (rev4) URL : https://patchwork.freedesktop.org/series/44823/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4441 -> Patchwork_9561 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedeskt

Re: [Intel-gfx] Shared atomic state causing Weston repaint failure

2018-07-06 Thread Daniel Stone
Hey Jakob, On Thu, 5 Jul 2018 at 14:32, Jakob Bornecrantz wrote: > So from a VR compositor getting blocked like this is a no-go as the > user would quickly throw EPUKE. The situation is compounded by the > fact that the VR compositor has no idea what the display compositor is > doing with regards

[Intel-gfx] ✗ Fi.CI.IGT: failure for ICELAKE DSI DRIVER (rev4)

2018-07-06 Thread Patchwork
== Series Details == Series: ICELAKE DSI DRIVER (rev4) URL : https://patchwork.freedesktop.org/series/44823/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4438_full -> Patchwork_9549_full = == Summary - FAILURE == Serious unknown changes coming with Patchwork_9549_full a

Re: [Intel-gfx] [PATCH] drm/i915: remove confusing GPIO vs PCH_GPIO

2018-07-06 Thread Jani Nikula
On Thu, 05 Jul 2018, Lucas De Marchi wrote: > Instead of defining all registers twice, define just a PCH_GPIO_BASE > that has the same address as PCH_GPIO_A and use that to calculate all > the others. This also brings VLV and !HAS_GMCH_DISPLAY in line, doing > the same thing. > > Signed-off-by: Lu

Re: [Intel-gfx] [PATCH 08/27] drm/i915/selftests: Skip huge pages live tests if wedged

2018-07-06 Thread Matthew Auld
On 6 July 2018 at 07:53, Chris Wilson wrote: > We test the GPU handling of huge pages by submitting requests that write > into a huge page, but if the GPU is irrecoverably wedged we cannot > submit any requests. As the test expectedly fails, skip over it. > > Signed-off-by: Chris Wilson Reviewed-

[Intel-gfx] [PATCH] drm/i915: Introduce BITS_PER_TYPE

2018-07-06 Thread Chris Wilson
Borrow the idea from net_dim.h to simplify the common determination of how many bits in a particular type (sizeof(type) * BITS_PER_BYTE). Suggested-by: Ville Syrjälä Signed-off-by: Chris Wilson Cc: Ville Syrjälä Cc: Jani Nikula Cc: Joonas Lahtinen Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915

Re: [Intel-gfx] [PATCH 02/27] drm/i915/selftests: Destroy partial tiling vma after use

2018-07-06 Thread Matthew Auld
On 6 July 2018 at 07:53, Chris Wilson wrote: > As we keep VMA around until the object is destroyed, when testing > partial tiling we instantiate many, many VMA (as the object is huge > allowing for many different partial regions). We test elsewhere our > handling of populating large objects with a

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Introduce BITS_PER_TYPE

2018-07-06 Thread Patchwork
== Series Details == Series: drm/i915: Introduce BITS_PER_TYPE URL : https://patchwork.freedesktop.org/series/46055/ State : warning == Summary == $ dim checkpatch origin/drm-tip c827b8e3ce5f drm/i915: Introduce BITS_PER_TYPE -:30: WARNING:AVOID_BUG: Avoid crashing the kernel - try using WARN_

Re: [Intel-gfx] [PATCH] drm/i915: Introduce BITS_PER_TYPE

2018-07-06 Thread Tvrtko Ursulin
On 06/07/2018 09:44, Chris Wilson wrote: Borrow the idea from net_dim.h to simplify the common determination of how many bits in a particular type (sizeof(type) * BITS_PER_BYTE). Suggested-by: Ville Syrjälä Signed-off-by: Chris Wilson Cc: Ville Syrjälä Cc: Jani Nikula Cc: Joonas Lahtinen C

Re: [Intel-gfx] [PATCH 01/27] drm/i915: Squelch very verbose error logging

2018-07-06 Thread Matthew Auld
On 6 July 2018 at 07:53, Chris Wilson wrote: > Having found the error causing the IGT test to fail, downgrade the > verbose logging so that we stop flooding the syslogs as we deliberately > provoke it many thousands of time during selftests. > > References: 10195b1e4411 ("drm/i915: Show vma alloca

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] igt/gem_tiled_partial_pwrite_pread: Check for known swizzling

2018-07-06 Thread Tvrtko Ursulin
On 05/07/2018 20:26, Chris Wilson wrote: As we want to compare a templated tiling pattern against the target_bo, we need to know that the swizzling is compatible. Or else the two tiling pattern may differ due to underlying page address that we cannot know, and so the test may sporadically fail.

Re: [Intel-gfx] [PATCH 03/27] drm/i915/selftests: Skip using the GPU if wedged

2018-07-06 Thread Matthew Auld
On 6 July 2018 at 07:53, Chris Wilson wrote: > If the GPU is irrecoverably broken, we can not use it to dirty memory > and check for cache coherency with the CPU. All we can do is simply skip > over the GPU subtests and focus on the CPU domains (WC, WB) cache > management. > > Bugzilla: https://bu

Re: [Intel-gfx] [PATCH] drm/i915: Introduce BITS_PER_TYPE

2018-07-06 Thread Jani Nikula
On Fri, 06 Jul 2018, Chris Wilson wrote: > Borrow the idea from net_dim.h to simplify the common determination of > how many bits in a particular type (sizeof(type) * BITS_PER_BYTE). Nice. Follow-up, have that included in bitops.h? BR, Jani. > > Suggested-by: Ville Syrjälä > Signed-off-by: Chr

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Skip live context execution test without logical contexts

2018-07-06 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Skip live context execution test without logical contexts URL : https://patchwork.freedesktop.org/series/46015/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4438_full -> Patchwork_9550_full = == Summary - WARNING == Mino

Re: [Intel-gfx] [PATCH 04/27] drm/i915/selftests: Skip making an object busy if the GPU is wedged

2018-07-06 Thread Matthew Auld
On 6 July 2018 at 07:53, Chris Wilson wrote: > If the GPU is wedged, we cannot make the object busy as trying to > submit a request will generate -EIO. Skip to the end of the test. > > Signed-off-by: Chris Wilson Reviewed-by: Matthew Auld ___ Intel-gfx

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Introduce BITS_PER_TYPE

2018-07-06 Thread Patchwork
== Series Details == Series: drm/i915: Introduce BITS_PER_TYPE URL : https://patchwork.freedesktop.org/series/46055/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4443 -> Patchwork_9562 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.f

Re: [Intel-gfx] [PATCH 05/27] drm/i915/selftests: Skip all request selftests when wedged

2018-07-06 Thread Matthew Auld
On 6 July 2018 at 07:53, Chris Wilson wrote: > If the GPU is irrecoverably wedge, we cannot submit any request and so > all of the request selftests will expectedly fail. Skip over them. > > Signed-off-by: Chris Wilson Reviewed-by: Matthew Auld ___ Int

Re: [Intel-gfx] [PATCH 06/27] drm/i915/selftests: Skip workaround tests when wedged

2018-07-06 Thread Matthew Auld
On 6 July 2018 at 07:53, Chris Wilson wrote: > If the GPU is irrecoverably wedged, we cannot submit any request and > therefore cannot query the register state of the context (which is done > using the GPU command stream). So skip over the test as it expectedly > fails. > > Signed-off-by: Chris Wi

Re: [Intel-gfx] [PATCH 07/27] drm/i915/selftests: Skip live eviction tests when wedged

2018-07-06 Thread Matthew Auld
On 6 July 2018 at 07:53, Chris Wilson wrote: > If the GPU is irrecoverably wedged, we cannot submit any requests and so > cannot make the GTT busy in order to test evicting active objects. As > this expectedly fails, skip over the test. > > Signed-off-by: Chris Wilson Reviewed-by: Matthew Auld _

Re: [Intel-gfx] [PATCH v4 07/20] drm/i915/icl: Define AUX lane registers for Port A/B

2018-07-06 Thread Jani Nikula
On Thu, 05 Jul 2018, Madhav Chauhan wrote: > This patch defines AUX lane registers for PORT_PCS_DW1, > PORT_TX_DW2, PORT_TX_DW4, PORT_TX_DW5 used during > dsi enabling. > > v2: Review comments from Jani N: > - Define _ICL_PORT_PCS_DW1_AUX_A for consistency > - Three spaces for bitfield def

Re: [Intel-gfx] [PATCH 09/27] drm/i915/selftests: Skip over live context testing when wedged

2018-07-06 Thread Matthew Auld
On 6 July 2018 at 07:53, Chris Wilson wrote: > If the GPU is terminally wedged we cannot submit any requests into a > context, completely unfulfilling our purpose of doing so. As this > expectedly fails, skip over the test. > > Signed-off-by: Chris Wilson Reviewed-by: Matthew Auld __

Re: [Intel-gfx] [BUG] i915 HDMI connector status is connected after disconnection

2018-07-06 Thread Chris Chiu
On Thu, Jul 5, 2018 at 10:40 PM, Ville Syrjälä wrote: > On Thu, Jul 05, 2018 at 03:58:36PM +0800, Chris Chiu wrote: >> Hi, >> We have few ASUS laptops X705FD (The new WiskyLake), X560UD (intel >> i5-8250U), X530UN (intel i7-8550U) share the same problem, which is >> the HDMI connector status s

Re: [Intel-gfx] [PULL] gvt-fixes for 4.18

2018-07-06 Thread Jani Nikula
On Tue, 03 Jul 2018, Zhenyu Wang wrote: > Hi, > > Here's two gvt fixes for 4.18. One is for guest warning to change > virtual transcoder mode for DVI to align with our virtual display, > and one to fix possible partial GGTT entry update from guest. Pulled, and already included in a pull request t

[Intel-gfx] [PATCH 1/2] drm/i915: Record logical context support in driver caps

2018-07-06 Thread Chris Wilson
Avoid looking at the magical engines[RCS] to decide if the HW and driver supports logical contexts, and instead record that knowledge during initialisation. Signed-off-by: Chris Wilson Cc: Matthew Auld --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_context.c

[Intel-gfx] [PATCH 2/2] drm/i915/selftests: Skip live context execution test without logical contexts

2018-07-06 Thread Chris Wilson
If the HW (or driver) doesn't support logical contexts, don't pretend we gain anything from trying to execute GPU commands with them. At best it reports -ENODEV, which is an unhelpful failure that we should just skip. v2: Be more specific and check the driver/engine caps for logical (HW) context s

[Intel-gfx] [PATCH v2] drm/i915/selftests: Skip live context execution test without logical contexts

2018-07-06 Thread Chris Wilson
If the HW (or driver) doesn't support logical contexts, don't pretend we gain anything from trying to execute GPU commands with them. At best it reports -ENODEV, which is an unhelpful failure that we should just skip. v2: Be more specific and check the driver/engine caps for logical (HW) context s

Re: [Intel-gfx] [PATCH 2/2] drm/i915/selftests: Skip live context execution test without logical contexts

2018-07-06 Thread Chris Wilson
Quoting Chris Wilson (2018-07-06 11:14:42) > If the HW (or driver) doesn't support logical contexts, don't pretend we > gain anything from trying to execute GPU commands with them. At best it > reports -ENODEV, which is an unhelpful failure that we should just skip. > > v2: Be more specific and ch

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Record logical context support in driver caps

2018-07-06 Thread Matthew Auld
On 6 July 2018 at 11:14, Chris Wilson wrote: > Avoid looking at the magical engines[RCS] to decide if the HW and driver > supports logical contexts, and instead record that knowledge during > initialisation. > > Signed-off-by: Chris Wilson > Cc: Matthew Auld Reviewed-by: Matthew Auld __

[Intel-gfx] [PATCH 6/6] drm/i915: Track the last-active inside the i915_vma

2018-07-06 Thread Chris Wilson
Using a VMA on more than one timeline concurrently is the exception rather than the rule (using it concurrently on multiple engines). As we expect to only use one active tracker, store the most recently used tracker inside the i915_vma itself and only fallback to the rbtree if we need a second or m

[Intel-gfx] [PATCH 1/6] drm/i915: Refactor export_fence() after i915_vma_move_to_active()

2018-07-06 Thread Chris Wilson
Currently all callers are responsible for adding the vma to the active timeline and then exporting its fence. Combine the two operations into i915_vma_move_to_active() to move all the extra handling from the callers to the single site. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin ---

[Intel-gfx] [PATCH 3/6] drm/i915: Start returning an error from i915_vma_move_to_active()

2018-07-06 Thread Chris Wilson
Handling such a late error in request construction is tricky, but to accommodate future patches which may allocate here, we potentially could err. To handle the error after already adjusting global state to track the new request, we must finish and submit the request. But we don't want to use the r

[Intel-gfx] [PATCH 4/6] drm/i915: Move i915_vma_move_to_active() to i915_vma.c

2018-07-06 Thread Chris Wilson
i915_vma_move_to_active() has grown beyond its execbuf origins, and should take its rightful place in i915_vma.c as a method for i915_vma! Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_drv.h| 3 -- drivers/gpu/drm/i915/i915_gem_execbuffer.c |

[Intel-gfx] [PATCH 5/6] drm/i915: Track vma activity per fence.context, not per engine

2018-07-06 Thread Chris Wilson
In the next patch, we will want to be able to use more flexible request timelines that can hop between engines. From the vma pov, we can then not rely on the binding of this request to an engine and so can not ensure that different requests are ordered through a per-engine timeline, and so we must

[Intel-gfx] [PATCH 2/6] drm/i915: Export i915_request_skip()

2018-07-06 Thread Chris Wilson
In the next patch, we will want to start skipping requests on failing to complete their payloads. So export the utility function current used to make requests inoperable following a failed gpu reset. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gem.c

Re: [Intel-gfx] [PATCH v2] drm/i915/selftests: Skip live context execution test without logical contexts

2018-07-06 Thread Matthew Auld
On 6 July 2018 at 11:19, Chris Wilson wrote: > If the HW (or driver) doesn't support logical contexts, don't pretend we > gain anything from trying to execute GPU commands with them. At best it > reports -ENODEV, which is an unhelpful failure that we should just skip. > > v2: Be more specific and

Re: [Intel-gfx] [PATCH 3/8] drm/i915: Rewrite mst suspend/resume in terms of encoders

2018-07-06 Thread Ville Syrjälä
On Thu, Jul 05, 2018 at 02:29:59PM -0700, Rodrigo Vivi wrote: > On Thu, Jul 05, 2018 at 07:43:52PM +0300, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Rather than looping over all the ports and picking the encoder based on > > the port, let's just loop over all the encoders instead. Gets

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Hotplug cleanups and whanot

2018-07-06 Thread Patchwork
== Series Details == Series: drm/i915: Hotplug cleanups and whanot URL : https://patchwork.freedesktop.org/series/46022/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4438_full -> Patchwork_9552_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_9

Re: [Intel-gfx] [PATCH 6/6] drm/i915: Track the last-active inside the i915_vma

2018-07-06 Thread Tvrtko Ursulin
On 06/07/2018 11:39, Chris Wilson wrote: Using a VMA on more than one timeline concurrently is the exception rather than the rule (using it concurrently on multiple engines). As we expect to only use one active tracker, store the most recently used tracker inside the i915_vma itself and only fal

Re: [Intel-gfx] [PATCH v4 09/12] drm/i915: Extract skl_universal_plane_init()

2018-07-06 Thread Lisovskiy, Stanislav
On Fri, 2018-06-01 at 21:39 +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > There's not much point in following the primary vs. sprite split > for the SKL+ universal plane init code. The only difference is > of our own doing in the form of the .check_plane(). Let's make > a small exception

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Record logical context support in driver caps (rev2)

2018-07-06 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Record logical context support in driver caps (rev2) URL : https://patchwork.freedesktop.org/series/46065/ State : warning == Summary == $ dim checkpatch origin/drm-tip 3d66e5f3e2e2 drm/i915: Record logical context support in d

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Record logical context support in driver caps (rev2)

2018-07-06 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Record logical context support in driver caps (rev2) URL : https://patchwork.freedesktop.org/series/46065/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Record logical context support in driver cap

[Intel-gfx] [PATCH] drm/i915/selftests: Skip live_execlists if the GPU is terminally wedged

2018-07-06 Thread Chris Wilson
If the GPU is irrecoverably wedged, we can not execute any requests making testing execlists (request execution) pointless. Skip! Signed-off-by: Chris Wilson Cc: Matthew Auld --- drivers/gpu/drm/i915/selftests/intel_lrc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i9

[Intel-gfx] [PATCH] drm/i915: Flush the WCB following a WC write

2018-07-06 Thread Chris Wilson
If we have just completed a WC write, we must ensure that the WCB (Write Combining Buffer) is flushed out to main memory before we can expect to see the results. This is especially important when mixing WC with GTT as the physical paths are different and cachelines are not naturally flushed. Testc

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Detect unknown swizzling correctly

2018-07-06 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Detect unknown swizzling correctly URL : https://patchwork.freedesktop.org/series/46026/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4438_full -> Patchwork_9553_full = == Summary - WARNING == Minor unknown changes coming

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Record logical context support in driver caps (rev2)

2018-07-06 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Record logical context support in driver caps (rev2) URL : https://patchwork.freedesktop.org/series/46065/ State : success == Summary == = CI Bug Log - changes from CI_DRM_ -> Patchwork_9563 = == Summary - SUCCESS == No

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] drm/i915: Refactor export_fence() after i915_vma_move_to_active()

2018-07-06 Thread Patchwork
== Series Details == Series: series starting with [1/6] drm/i915: Refactor export_fence() after i915_vma_move_to_active() URL : https://patchwork.freedesktop.org/series/46067/ State : warning == Summary == $ dim checkpatch origin/drm-tip 478556e2da64 drm/i915: Refactor export_fence() after i9

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/6] drm/i915: Refactor export_fence() after i915_vma_move_to_active()

2018-07-06 Thread Patchwork
== Series Details == Series: series starting with [1/6] drm/i915: Refactor export_fence() after i915_vma_move_to_active() URL : https://patchwork.freedesktop.org/series/46067/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Refactor export_fence() after i915_vma_mo

Re: [Intel-gfx] [PATCH] drm/i915: Flush the WCB following a WC write

2018-07-06 Thread Matthew Auld
On 6 July 2018 at 12:54, Chris Wilson wrote: > If we have just completed a WC write, we must ensure that the WCB (Write > Combining Buffer) is flushed out to main memory before we can expect to > see the results. This is especially important when mixing WC with GTT as > the physical paths are diff

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Skip live_execlists if the GPU is terminally wedged

2018-07-06 Thread Matthew Auld
On 6 July 2018 at 12:45, Chris Wilson wrote: > If the GPU is irrecoverably wedged, we can not execute any requests > making testing execlists (request execution) pointless. Skip! > > Signed-off-by: Chris Wilson > Cc: Matthew Auld Reviewed-by: Matthew Auld ___

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/6] drm/i915: Refactor export_fence() after i915_vma_move_to_active()

2018-07-06 Thread Patchwork
== Series Details == Series: series starting with [1/6] drm/i915: Refactor export_fence() after i915_vma_move_to_active() URL : https://patchwork.freedesktop.org/series/46067/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_ -> Patchwork_9564 = == Summary - FAILURE ==

Re: [Intel-gfx] [PATCH v3 00/12] drm/i915: Some plane init cleanups

2018-07-06 Thread Lisovskiy, Stanislav
On Fri, 2018-06-01 at 20:00 +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > Another version of these cleansup. Last time there was some kind of > smtp > fail when sending and patchwork got confused at the wonky threading. > So > best to repost fully I thought. Additionally I had to resolve

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/6] drm/i915: Refactor export_fence() after i915_vma_move_to_active()

2018-07-06 Thread Chris Wilson
Quoting Patchwork (2018-07-06 13:20:19) > == Series Details == > > Series: series starting with [1/6] drm/i915: Refactor export_fence() after > i915_vma_move_to_active() > URL : https://patchwork.freedesktop.org/series/46067/ > State : failure > > == Summary == > > = CI Bug Log - changes from

[Intel-gfx] [PATCH 1/2] drm/i915/gtt: Suppress warnings for dma_map_page

2018-07-06 Thread Chris Wilson
As we propagate back the error to the caller for them to handle, we do not need the lowest level spitting out a redundant warning upon an allocation failure inside dma_map_page(). Signed-off-by: Chris Wilson Cc: Matthew Auld --- drivers/gpu/drm/i915/i915_gem_gtt.c | 12 1 file chan

[Intel-gfx] [PATCH 2/2] drm/i915/gtt: Control cache domain of dma_map_page() directly

2018-07-06 Thread Chris Wilson
We already maually control the CPU cache for our page table directories, so we can tell the dma mapper to skip doing it as well. Signed-off-by: Chris Wilson Cc: Matthew Auld --- drivers/gpu/drm/i915/i915_gem_gtt.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_g

[Intel-gfx] [PATCH v5] drm/i915: Track the last-active inside the i915_vma

2018-07-06 Thread Chris Wilson
Using a VMA on more than one timeline concurrently is the exception rather than the rule (using it concurrently on multiple engines). As we expect to only use one active tracker, store the most recently used tracker inside the i915_vma itself and only fallback to the rbtree if we need a second or m

Re: [Intel-gfx] [PATCH] drm/i915: Flush the WCB following a WC write

2018-07-06 Thread Tvrtko Ursulin
On 06/07/2018 12:54, Chris Wilson wrote: If we have just completed a WC write, we must ensure that the WCB (Write Combining Buffer) is flushed out to main memory before we can expect to see the results. This is especially important when mixing WC with GTT as the physical paths are different and

Re: [Intel-gfx] [PATCH 1/2] drm/i915/gtt: Suppress warnings for dma_map_page

2018-07-06 Thread Matthew Auld
On 6 July 2018 at 13:26, Chris Wilson wrote: > As we propagate back the error to the caller for them to handle, we do > not need the lowest level spitting out a redundant warning upon an > allocation failure inside dma_map_page(). > > Signed-off-by: Chris Wilson > Cc: Matthew Auld Reviewed-by: M

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Skip live_execlists if the GPU is terminally wedged

2018-07-06 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Skip live_execlists if the GPU is terminally wedged URL : https://patchwork.freedesktop.org/series/46069/ State : success == Summary == = CI Bug Log - changes from CI_DRM_ -> Patchwork_9565 = == Summary - SUCCESS == No regressions found.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Flush the WCB following a WC write

2018-07-06 Thread Patchwork
== Series Details == Series: drm/i915: Flush the WCB following a WC write URL : https://patchwork.freedesktop.org/series/46070/ State : warning == Summary == $ dim checkpatch origin/drm-tip 1442df0746fe drm/i915: Flush the WCB following a WC write -:25: WARNING:MEMORY_BARRIER: memory barrier w

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/selftests: Destroy partial tiling vma after use

2018-07-06 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Destroy partial tiling vma after use URL : https://patchwork.freedesktop.org/series/46031/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4438_full -> Patchwork_9554_full = == Summary - FAILURE == Serious unknown changes co

[Intel-gfx] [PATCH] drm/i915/selftests: Limit live_gtt allocation test to fit within RAM

2018-07-06 Thread Chris Wilson
Limit the GTT size we try and allocate to ensure that it fits within RAM and does not trigger the oomkiller indiscriminately. Signed-off-by: Chris Wilson Cc: Matthew Auld --- drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 20 --- 1 file changed, 13 insertions(+), 7 deletions(-)

Re: [Intel-gfx] [PATCH 2/2] drm/i915/gtt: Control cache domain of dma_map_page() directly

2018-07-06 Thread Matthew Auld
On 6 July 2018 at 13:26, Chris Wilson wrote: > We already maually control the CPU cache for our page table directories, > so we can tell the dma mapper to skip doing it as well. > > Signed-off-by: Chris Wilson > Cc: Matthew Auld Reviewed-by: Matthew Auld

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Flush the WCB following a WC write

2018-07-06 Thread Patchwork
== Series Details == Series: drm/i915: Flush the WCB following a WC write URL : https://patchwork.freedesktop.org/series/46070/ State : success == Summary == = CI Bug Log - changes from CI_DRM_ -> Patchwork_9566 = == Summary - SUCCESS == No regressions found. External URL: https://

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/ddi: Simplify get_encoder_power_domains()

2018-07-06 Thread Imre Deak
On Thu, Jul 05, 2018 at 04:33:50PM +, Patchwork wrote: > == Series Details == > > Series: drm/i915/ddi: Simplify get_encoder_power_domains() > URL : https://patchwork.freedesktop.org/series/45980/ > State : success Pushed to -dinq, thanks for the review. > > == Summary == > > = CI Bug Lo

Re: [Intel-gfx] [PATCH] drm/crc: Only report a single overflow when a CRC fd is opened

2018-07-06 Thread Maarten Lankhorst
Op 18-04-18 om 17:37 schreef Ville Syrjälä: > On Wed, Apr 18, 2018 at 02:51:21PM +0200, Maarten Lankhorst wrote: >> This reduces the amount of spam when you debug a CRC reading >> program. >> >> Signed-off-by: Maarten Lankhorst >> --- >> drivers/gpu/drm/drm_debugfs_crc.c | 9 - >> include

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Limit live_gtt allocation test to fit within RAM

2018-07-06 Thread Matthew Auld
On 6 July 2018 at 13:53, Chris Wilson wrote: > Limit the GTT size we try and allocate to ensure that it fits within RAM > and does not trigger the oomkiller indiscriminately. > > Signed-off-by: Chris Wilson > Cc: Matthew Auld Reviewed-by: Matthew Auld ___

Re: [Intel-gfx] [PATCH 0/4] drm/i915/intel_dsi: Read back and use pclk set by the GOP

2018-07-06 Thread Jani Nikula
On Fri, 29 Jun 2018, Hans de Goede wrote: > Hi, > > On 19-06-18 22:18, Hans de Goede wrote: >> Hi All, >> >> This patch-set is the result of the work I've been doing recently to >> give people a smooth "flickerfree" boot experience where the display >> keeps displaying the logo put there by the f

Re: [Intel-gfx] [PATCH 17/27] drm/i915: Replace nested subclassing with explicit subclasses

2018-07-06 Thread Tvrtko Ursulin
On 06/07/2018 07:53, Chris Wilson wrote: In the next patch, we will want a third distinct class of timeline that may overlap with the current pair of client and engine timeline classes. Rather than use the ad hoc markup of SINGLE_DEPTH_NESTING, initialise the different timeline classes with an e

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] igt/gem_pwrite_pread: Requires GEM

2018-07-06 Thread Tvrtko Ursulin
On 04/07/2018 15:38, Chris Wilson wrote: Mark up gem_pwrite_pread's dependence on a functioning GPU, by calling igt_require_gem in its setup fixture. Signed-off-by: Chris Wilson --- tests/gem_pwrite_pread.c | 1 + tests/gem_tiled_partial_pwrite_pread.c | 1 + 2 files changed,

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/psr: Split sink status into a separate debugfs node

2018-07-06 Thread Patchwork
== Series Details == Series: drm/i915/psr: Split sink status into a separate debugfs node URL : https://patchwork.freedesktop.org/series/45952/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4438_full -> Patchwork_9555_full = == Summary - WARNING == Minor unknown changes

Re: [Intel-gfx] [PATCH 4/4] drm/i915/intel_dsi: Read back pclk set by GOP and use that as pclk

2018-07-06 Thread Ville Syrjälä
On Tue, Jun 19, 2018 at 10:18:27PM +0200, Hans de Goede wrote: > On BYT and CHT the GOP sometimes initializes the pclk at a (slightly) > different frequency then the pclk which we've calculated. > > This commit makes the DSI code read-back the pclk set by the GOP and > if that is within a reasonab

[Intel-gfx] [PATCH 1/2] drm/i915/selftests: Replace magic 1<<22 with MI_USE_GGTT/MI_MEM_VIRTUAL

2018-07-06 Thread Chris Wilson
Replace the magic bit with the proper symbolic name for instructing MI_STORE_DWORD_IMM to use a virtual address (on gen3) or the global GTT address (still virtual!) on gen4+. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/selftests/huge_pages.c | 4 ++-- drivers/gpu/drm/i915/selfte

[Intel-gfx] [PATCH 2/2] drm/i915/selftests: Fixup missing MI_MEM_VIRTUAL for live_hangcheck

2018-07-06 Thread Chris Wilson
We always want to use a virtual address (i.e. use the GTT) for MI_STORE_DWORD_IMM, but forgot the ever so important flag in live_hangcheck for gen3. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm: Extract __setplane_check() (rev3)

2018-07-06 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm: Extract __setplane_check() (rev3) URL : https://patchwork.freedesktop.org/series/45589/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4438_full -> Patchwork_9557_full = == Summary - WARNING == Minor unknown cha

[Intel-gfx] [PATCH 5/6] drm/amdgpu: add independent DMA-buf export v3

2018-07-06 Thread Christian König
The caching of SGT's is actually quite harmful and should probably removed altogether when all drivers are audited. Start by providing a separate DMA-buf export implementation in amdgpu. This is also a prerequisite of unpinned DMA-buf handling. v2: fix unintended recursion, remove debugging lefto

[Intel-gfx] [PATCH 1/6] dma-buf: add caching of sg_table

2018-07-06 Thread Christian König
To allow a smooth transition from pinning buffer objects to dynamic invalidation we first start to cache the sg_table for an attachment unless the driver explicitly says to not do so. Signed-off-by: Christian König --- drivers/dma-buf/dma-buf.c | 24 include/linux/dma-bu

[Intel-gfx] [PATCH 6/6] drm/amdgpu: add independent DMA-buf import v4

2018-07-06 Thread Christian König
Instead of relying on the DRM functions just implement our own import functions. This prepares support for taking care of unpinned DMA-buf. v2: enable for all exporters, not just amdgpu, fix invalidation handling, lock reservation object while setting callback v3: change to new dma_buf attach

[Intel-gfx] [PATCH 2/6] drm: remove prime sg_table caching

2018-07-06 Thread Christian König
That is now done by the DMA-buf helpers instead. Signed-off-by: Christian König --- drivers/gpu/drm/drm_prime.c | 78 +++-- 1 file changed, 18 insertions(+), 60 deletions(-) diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c index 186d

[Intel-gfx] (no subject)

2018-07-06 Thread Christian König
Next try of prework for unpinned DMA-buf operation. Only send to intel-gfx to trigger unit tests on the following patches. Christian. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 3/6] dma-buf: add dma_buf_(un)map_attachment_locked variants v3

2018-07-06 Thread Christian König
Add function variants which can be called with the reservation lock already held. v2: reordered, add lockdep asserts, fix kerneldoc v3: rebased on sgt caching Signed-off-by: Christian König --- drivers/dma-buf/dma-buf.c | 63 +++ include/linux/dma-buf

[Intel-gfx] [PATCH 4/6] dma-buf: lock the reservation object during (un)map_dma_buf v3

2018-07-06 Thread Christian König
First step towards unpinned DMA buf operation. I've checked the DRM drivers to potential locking of the reservation object, but essentially we need to audit all implementations of the dma_buf _ops for this to work. v2: reordered v3: rebased on sgt caching Signed-off-by: Christian König --- dri

Re: [Intel-gfx] [PATCH 1/2] drm/i915/selftests: Replace magic 1<<22 with MI_USE_GGTT/MI_MEM_VIRTUAL

2018-07-06 Thread Ville Syrjälä
On Fri, Jul 06, 2018 at 03:23:22PM +0100, Chris Wilson wrote: > Replace the magic bit with the proper symbolic name for instructing > MI_STORE_DWORD_IMM to use a virtual address (on gen3) or the global GTT > address (still virtual!) on gen4+. > > Signed-off-by: Chris Wilson > --- > drivers/gpu/d

Re: [Intel-gfx] [PATCH 2/2] drm/i915/selftests: Fixup missing MI_MEM_VIRTUAL for live_hangcheck

2018-07-06 Thread Ville Syrjälä
On Fri, Jul 06, 2018 at 03:23:23PM +0100, Chris Wilson wrote: > We always want to use a virtual address (i.e. use the GTT) for > MI_STORE_DWORD_IMM, but forgot the ever so important flag in > live_hangcheck for gen3. Reviewed-by: Ville Syrjälä > > Signed-off-by: Chris Wilson > --- > drivers/g

Re: [Intel-gfx] [PATCH 1/2] drm/i915/selftests: Replace magic 1<<22 with MI_USE_GGTT/MI_MEM_VIRTUAL

2018-07-06 Thread Chris Wilson
Quoting Ville Syrjälä (2018-07-06 15:47:25) > On Fri, Jul 06, 2018 at 03:23:22PM +0100, Chris Wilson wrote: > > diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_coherency.c > > b/drivers/gpu/drm/i915/selftests/i915_gem_coherency.c > > index cb9eef1635e1..294c58aba2c1 100644 > > --- a/drivers/g

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gtt: Suppress warnings for dma_map_page

2018-07-06 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/gtt: Suppress warnings for dma_map_page URL : https://patchwork.freedesktop.org/series/46072/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4446 -> Patchwork_9567 = == Summary - SUCCESS == No regressions f

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] drm/i915: Refactor export_fence() after i915_vma_move_to_active() (rev2)

2018-07-06 Thread Patchwork
== Series Details == Series: series starting with [1/6] drm/i915: Refactor export_fence() after i915_vma_move_to_active() (rev2) URL : https://patchwork.freedesktop.org/series/46067/ State : warning == Summary == $ dim checkpatch origin/drm-tip c404016bcc1d drm/i915: Refactor export_fence() a

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/6] drm/i915: Refactor export_fence() after i915_vma_move_to_active() (rev2)

2018-07-06 Thread Patchwork
== Series Details == Series: series starting with [1/6] drm/i915: Refactor export_fence() after i915_vma_move_to_active() (rev2) URL : https://patchwork.freedesktop.org/series/46067/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Refactor export_fence() after i915

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915: Refactor export_fence() after i915_vma_move_to_active() (rev2)

2018-07-06 Thread Patchwork
== Series Details == Series: series starting with [1/6] drm/i915: Refactor export_fence() after i915_vma_move_to_active() (rev2) URL : https://patchwork.freedesktop.org/series/46067/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4446 -> Patchwork_9568 = == Summary - SUCCES

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/selftests: Limit live_gtt allocation test to fit within RAM

2018-07-06 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Limit live_gtt allocation test to fit within RAM URL : https://patchwork.freedesktop.org/series/46075/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915/selftests: Limit live_gtt allocation test to fit within RAM +driver

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Limit live_gtt allocation test to fit within RAM

2018-07-06 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Limit live_gtt allocation test to fit within RAM URL : https://patchwork.freedesktop.org/series/46075/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4446 -> Patchwork_9569 = == Summary - SUCCESS == No regressions found.

[Intel-gfx] [PATCH v5] drm/i915/gen11: Preempt-to-idle support in execlists.

2018-07-06 Thread Tomasz Lis
The patch adds support of preempt-to-idle requesting by setting a proper bit within Execlist Control Register, and receiving preemption result from Context Status Buffer. Preemption in previous gens required a special batch buffer to be executed, so the Command Streamer never preempted to idle dir

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/6] dma-buf: add caching of sg_table

2018-07-06 Thread Patchwork
== Series Details == Series: series starting with [1/6] dma-buf: add caching of sg_table URL : https://patchwork.freedesktop.org/series/46080/ State : failure == Summary == Applying: dma-buf: add caching of sg_table Applying: drm: remove prime sg_table caching Applying: dma-buf: add dma_buf_(u

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/selftests: Replace magic 1<<22 with MI_USE_GGTT/MI_MEM_VIRTUAL

2018-07-06 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/selftests: Replace magic 1<<22 with MI_USE_GGTT/MI_MEM_VIRTUAL URL : https://patchwork.freedesktop.org/series/46078/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4446 -> Patchwork_9570 = == Summary - SUCCESS

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gen11: Preempt-to-idle support in execlists. (rev5)

2018-07-06 Thread Patchwork
== Series Details == Series: drm/i915/gen11: Preempt-to-idle support in execlists. (rev5) URL : https://patchwork.freedesktop.org/series/40747/ State : warning == Summary == $ dim checkpatch origin/drm-tip 90f487fed124 drm/i915/gen11: Preempt-to-idle support in execlists. -:141: CHECK:COMPARIS

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