[Intel-gfx] [PATCH v3] drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled

2018-06-12 Thread Abhay Kumar
From: Ville Syrjälä CDCLK has to be at least twice the BLCK regardless of audio. Audio driver has to probe using this hook and increase the clock even in absence of any display. v2: Use atomic refcount for get_power, put_power so that we can call each once(Abhay). v3: Reset power well 2 to a

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled (rev3)

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled (rev3) URL : https://patchwork.freedesktop.org/series/42459/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7e66d7400ee9 drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled (rev3)

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled (rev3) URL : https://patchwork.freedesktop.org/series/42459/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabl

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled (rev3)

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled (rev3) URL : https://patchwork.freedesktop.org/series/42459/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4304 -> Patchwork_9268 = == Summary - WARNING == Minor unknown c

Re: [Intel-gfx] [PULL] drm-intel-next

2018-06-12 Thread Jani Nikula
On Tue, 12 Jun 2018, Dave Airlie wrote: > On 12 June 2018 at 02:27, Rodrigo Vivi wrote: >> Hi Dave, >> >> This is the first round targeting 4.19. >> > Does this tree feed into linux-next already? > > Since we shouldn't have new stuff for linux-next feeding into it until > after rc1. I think we'l

[Intel-gfx] [CI 2/2] drm/i915/gtt: Onionify error handling for gen6_ppgtt_create

2018-06-12 Thread Chris Wilson
Pull the empty stubs together into the top level gen6_ppgtt_create, and tear each one down on error in proper onion order (rather than use Joonas' pet hate of calling the cleanup function in indeterminable state). Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Cc: Mika Kuoppala Cc: Matthew Aul

[Intel-gfx] [CI 1/2] drm/i915/gtt: Subclass gen6_hw_ppgtt

2018-06-12 Thread Chris Wilson
The legacy gen6 ppgtt needs a little more hand holding than gen8+, and so requires a larger structure. As I intend to make this slightly more complicated in the future, separate the gen6 from the core gen8 hw struct by subclassing. This patch moves the gen6 only features out to gen6_hw_ppgtt and pi

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled (rev3)

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled (rev3) URL : https://patchwork.freedesktop.org/series/42459/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4304_full -> Patchwork_9268_full = == Summary - WARNING == Minor

Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915/icl: Add allowed DP rates for Icelake

2018-06-12 Thread Jani Nikula
On Mon, 11 Jun 2018, Paulo Zanoni wrote: > Em Seg, 2018-06-11 às 22:35 +, Patchwork escreveu: >> == Series Details == >> >> Series: series starting with [CI,1/2] drm/i915/icl: Add allowed DP >> rates for Icelake >> URL : https://patchwork.freedesktop.org/series/44595/ >> State : warning >>

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915/gtt: Subclass gen6_hw_ppgtt

2018-06-12 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915/gtt: Subclass gen6_hw_ppgtt URL : https://patchwork.freedesktop.org/series/44608/ State : warning == Summary == $ dim checkpatch origin/drm-tip 07d34d2c2ba7 drm/i915/gtt: Subclass gen6_hw_ppgtt -:290: CHECK:MACRO_ARG_REUSE: Ma

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/2] drm/i915/gtt: Subclass gen6_hw_ppgtt

2018-06-12 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915/gtt: Subclass gen6_hw_ppgtt URL : https://patchwork.freedesktop.org/series/44608/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915/gtt: Subclass gen6_hw_ppgtt -O:drivers/gpu/drm/i915/i915_gem_gtt.c:16

Re: [Intel-gfx] [PATCH] drm/i915/psr: Adds psrwake options for all platforms

2018-06-12 Thread Jani Nikula
On Tue, 12 Jun 2018, vathsala nagaraju wrote: > From: Vathsala Nagaraju > > Adds new psrwake options defined in the below table. > Platform PSR wake options vbt version > KBL/CFL/WHL All > SKL All PV releases (Check for 203+ might help but cannot be > foolproof) > BXT

[Intel-gfx] [PULL] drm-misc-fixes

2018-06-12 Thread Maarten Lankhorst
Hey, Only the qxl fix by Jeremy Cline is new. The rest has landed in v4.17 already. drm-misc-fixes-2018-06-12: Only a small qxl fix that was queued for v4.17. The following changes since commit 9a0e9802217291e54c4dd1fc5462f189a4be14ec: drm/vc4: Fix scaling of uni-planar formats (2018-05-09 09

Re: [Intel-gfx] [PATCH][V2] drm/i915/guc: fix GEM_BUG_ON check

2018-06-12 Thread Dan Carpenter
On Mon, Jun 11, 2018 at 05:46:53PM +0100, Colin King wrote: > From: Colin Ian King > > The check for level being less than zero always false because flags > is currently unsigned and can never be negative. Fix this by making > flags a s32. > > Detected by CoverityScan, CID#1468363 ("Macro compar

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915/gtt: Subclass gen6_hw_ppgtt

2018-06-12 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915/gtt: Subclass gen6_hw_ppgtt URL : https://patchwork.freedesktop.org/series/44608/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4305 -> Patchwork_9269 = == Summary - WARNING == Minor unknown changes comi

[Intel-gfx] [PATCH 5/7] drm/i915/backlight: switch to kernel unsigned int types

2018-06-12 Thread Jani Nikula
We have fairly mixed uintN_t vs. uN usage throughout the driver, but try to stick to kernel types at least where it's more prevalent. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 12 ++-- drivers/gpu/drm/i915/intel_panel.c| 8 2 fil

[Intel-gfx] [PATCH 2/7] drm/i915/hdmi: switch to kernel unsigned int types

2018-06-12 Thread Jani Nikula
We have fairly mixed uintN_t vs. uN usage throughout the driver, but try to stick to kernel types at least where it's more prevalent. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_hdmi.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/dr

[Intel-gfx] [PATCH 3/7] drm/i915/uncore: switch to kernel unsigned int types

2018-06-12 Thread Jani Nikula
We have fairly mixed uintN_t vs. uN usage throughout the driver, but try to stick to kernel types at least where it's more prevalent. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_uncore.h | 22 +++--- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/dr

[Intel-gfx] [PATCH 0/7] drm/i915: move towards kernel types

2018-06-12 Thread Jani Nikula
Semi-RFC. Do we want to do this? Here's a batch of conversions that shouldn't conflict much with in-flight patches. The trouble with mixed use is that it's inconsistent, and any remaining C99 types will encourage their use. We could at least do the low hanging fruit? $ git grep "uint\(8\|16\|32\|

[Intel-gfx] [PATCH 7/7] drm/i915/lspcon: switch to kernel unsigned int types

2018-06-12 Thread Jani Nikula
We have fairly mixed uintN_t vs. uN usage throughout the driver, but try to stick to kernel types at least where it's more prevalent. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_lspcon.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_

[Intel-gfx] [PATCH 4/7] drm/i915/dvo: switch to kernel unsigned int types

2018-06-12 Thread Jani Nikula
We have fairly mixed uintN_t vs. uN usage throughout the driver, but try to stick to kernel types at least where it's more prevalent. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/dvo_ch7017.c | 20 +- drivers/gpu/drm/i915/dvo_ch7xxx.c | 22 ++-- drivers/gpu

[Intel-gfx] [PATCH 1/7] drm/i915/vbt: switch to kernel unsigned int types

2018-06-12 Thread Jani Nikula
We have fairly mixed uintN_t vs. uN usage throughout the driver, but try to stick to kernel types at least where it's more prevalent. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_bios.c | 4 ++-- drivers/gpu/drm/i915/intel_vbt_defs.h | 2 +- 2 files changed, 3 insertions(+), 3 d

[Intel-gfx] [PATCH 6/7] drm/i915/audio: switch to kernel unsigned int types

2018-06-12 Thread Jani Nikula
We have fairly mixed uintN_t vs. uN usage throughout the driver, but try to stick to kernel types at least where it's more prevalent. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_audio.c | 36 ++-- 1 file changed, 18 insertions(+), 18 deletions(-) di

Re: [Intel-gfx] [PATCH v9 7/7] drm/i915: add a sysfs entry to let users set sseu configs

2018-06-12 Thread Joonas Lahtinen
Quoting Chris Wilson (2018-06-11 18:02:37) > Quoting Lionel Landwerlin (2018-06-11 14:46:07) > > On 11/06/18 13:10, Tvrtko Ursulin wrote: > > > > > > On 30/05/2018 15:33, Lionel Landwerlin wrote: > > >> There are concerns about denial of service around the per context sseu > > >> configuration capa

Re: [Intel-gfx] [PATCH][V2] drm/i915/guc: fix GEM_BUG_ON check

2018-06-12 Thread Jani Nikula
On Tue, 12 Jun 2018, Dan Carpenter wrote: > On Mon, Jun 11, 2018 at 05:46:53PM +0100, Colin King wrote: >> From: Colin Ian King >> >> The check for level being less than zero always false because flags >> is currently unsigned and can never be negative. Fix this by making >> flags a s32. >> >>

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: move towards kernel types

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915: move towards kernel types URL : https://patchwork.freedesktop.org/series/44610/ State : warning == Summary == $ dim checkpatch origin/drm-tip 5e5d04a1d33d drm/i915/vbt: switch to kernel unsigned int types ba755792a04b drm/i915/hdmi: switch to kernel unsig

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: move towards kernel types

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915: move towards kernel types URL : https://patchwork.freedesktop.org/series/44610/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915/vbt: switch to kernel unsigned int types Okay! Commit: drm/i915/hdmi: switch to kernel unsigned int

[Intel-gfx] [PATCH][V3] drm/i915/guc: fix GEM_BUG_ON check

2018-06-12 Thread Colin King
From: Colin Ian King The check for level being less than zero always false because flags is currently unsigned and can never be negative. Fix this by making level a s32. Detected by CoverityScan, CID#1468363 ("Macro compares unsigned to 0") Fixes: cb5d64e9f13e ("drm/i915/guc: Allow user to cont

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: move towards kernel types

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915: move towards kernel types URL : https://patchwork.freedesktop.org/series/44610/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4305 -> Patchwork_9270 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork

[Intel-gfx] [PATCH v2 4/7] drm/i915/dvo: switch to kernel unsigned int types

2018-06-12 Thread Jani Nikula
We have fairly mixed uintN_t vs. uN usage throughout the driver, but try to stick to kernel types at least where it's more prevalent. v2: fix checkpatch warning on indentation Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/dvo_ch7017.c | 20 +- drivers/gpu/drm/i915/dvo_ch7x

Re: [Intel-gfx] [PATCH 0/7] drm/i915: move towards kernel types

2018-06-12 Thread Tvrtko Ursulin
On 12/06/2018 10:19, Jani Nikula wrote: Semi-RFC. Do we want to do this? Here's a batch of conversions that shouldn't conflict much with in-flight patches. The trouble with mixed use is that it's inconsistent, and any remaining C99 types will encourage their use. We could at least do the low ha

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: fix GEM_BUG_ON check (rev2)

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915/guc: fix GEM_BUG_ON check (rev2) URL : https://patchwork.freedesktop.org/series/44578/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4305 -> Patchwork_9271 = == Summary - WARNING == Minor unknown changes coming with Patchwork_9271 ne

Re: [Intel-gfx] [PATCH 0/7] drm/i915: move towards kernel types

2018-06-12 Thread Jani Nikula
On Tue, 12 Jun 2018, Tvrtko Ursulin wrote: > On 12/06/2018 10:19, Jani Nikula wrote: >> Semi-RFC. Do we want to do this? Here's a batch of conversions that shouldn't >> conflict much with in-flight patches. >> >> The trouble with mixed use is that it's inconsistent, and any remaining C99 >> types

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: move towards kernel types (rev2)

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915: move towards kernel types (rev2) URL : https://patchwork.freedesktop.org/series/44610/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915/vbt: switch to kernel unsigned int types Okay! Commit: drm/i915/hdmi: switch to kernel unsig

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: move towards kernel types (rev2)

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915: move towards kernel types (rev2) URL : https://patchwork.freedesktop.org/series/44610/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4305 -> Patchwork_9272 = == Summary - WARNING == Minor unknown changes coming with Patchwork_9272 n

Re: [Intel-gfx] [PATCH v9 7/7] drm/i915: add a sysfs entry to let users set sseu configs

2018-06-12 Thread Lionel Landwerlin
On 12/06/18 10:20, Joonas Lahtinen wrote: Quoting Chris Wilson (2018-06-11 18:02:37) Quoting Lionel Landwerlin (2018-06-11 14:46:07) On 11/06/18 13:10, Tvrtko Ursulin wrote: On 30/05/2018 15:33, Lionel Landwerlin wrote: There are concerns about denial of service around the per context sseu co

Re: [Intel-gfx] [PATCH v9 7/7] drm/i915: add a sysfs entry to let users set sseu configs

2018-06-12 Thread Chris Wilson
Quoting Lionel Landwerlin (2018-06-12 11:33:34) > On 12/06/18 10:20, Joonas Lahtinen wrote: > > Quoting Chris Wilson (2018-06-11 18:02:37) > >> Quoting Lionel Landwerlin (2018-06-11 14:46:07) > >>> On 11/06/18 13:10, Tvrtko Ursulin wrote: > On 30/05/2018 15:33, Lionel Landwerlin wrote: > >

[Intel-gfx] [PATCH] drm/i915: Make closing request flush mandatory

2018-06-12 Thread Chris Wilson
For symmetry, simplicity and ensuring the request is always truly idle upon its completion, always emit the closing flush prior to emitting the request breadcrumb. Previously, we would only emit the flush if we had started a user batch, but this just leaves all the other paths open to speculation (

Re: [Intel-gfx] [PATCH v9 7/7] drm/i915: add a sysfs entry to let users set sseu configs

2018-06-12 Thread Lionel Landwerlin
On 12/06/18 11:37, Chris Wilson wrote: Quoting Lionel Landwerlin (2018-06-12 11:33:34) On 12/06/18 10:20, Joonas Lahtinen wrote: Quoting Chris Wilson (2018-06-11 18:02:37) Quoting Lionel Landwerlin (2018-06-11 14:46:07) On 11/06/18 13:10, Tvrtko Ursulin wrote: On 30/05/2018 15:33, Lionel Lan

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/i915/gtt: Subclass gen6_hw_ppgtt

2018-06-12 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915/gtt: Subclass gen6_hw_ppgtt URL : https://patchwork.freedesktop.org/series/44608/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4305_full -> Patchwork_9269_full = == Summary - WARNING == Minor unknown ch

[Intel-gfx] [PATCH v2 0/4] Enable P010, P012 and P016 formats for GLK/CNL

2018-06-12 Thread Juha-Pekka Heikkila
v2: Rebase and add better comment for Pxxx formats into drm_fourcc.h These patches enable P010, P012 and P016 formats for GLK and CNL. These formats are similar to NV12 extending from 8 bits per channel to 10, 12 and 16 bits per channel. For user space components there is in IGT kms_available_mod

[Intel-gfx] [PATCH v2 1/4] drm: Add P010, P012, P016 format definitions and fourcc

2018-06-12 Thread Juha-Pekka Heikkila
Add P010 definition, semi-planar yuv format where each component is 16 bits 10 msb containing color value. First come Y plane [10:6] followed by 2x2 subsampled Cr:Cb plane [10:6:10:6] Add P012 definition, semi-planar yuv format where each component is 16 bits 12 msb containing color value. First c

[Intel-gfx] [PATCH v2 4/4] drm/i915: enable P010, P012, P016 formats for primary and sprite planes

2018-06-12 Thread Juha-Pekka Heikkila
Enabling of P010, P012 and P016 formats. These formats will extend NV12 for larger bit depths. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/intel_display.c | 24 +- drivers/gpu/drm/i915/intel_sprite.c | 39 +++- 2 files changed,

[Intel-gfx] [PATCH v2 3/4] drm/i915: preparations for enabling P010, P012, P016 formats

2018-06-12 Thread Juha-Pekka Heikkila
Preparations for enabling P010, P012 and P016 formats. These formats will extend NV12 for larger bit depths. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/intel_atomic.c | 3 +- drivers/gpu/drm/i915/intel_atomic_plane.c | 2 +- drivers/gpu/drm/i915/intel_display.c | 46

[Intel-gfx] [PATCH v2 2/4] drm/i915: Add P010, P012, P016 plane control definitions

2018-06-12 Thread Juha-Pekka Heikkila
Add needed plane control flag definitions for P010, P012 and P016 formats. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 987def2..9add270 100644

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Make closing request flush mandatory

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915: Make closing request flush mandatory URL : https://patchwork.freedesktop.org/series/44614/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4305 -> Patchwork_9273 = == Summary - SUCCESS == No regressions found. External URL: https:

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable P010, P012 and P016 formats for GLK/CNL (rev2)

2018-06-12 Thread Patchwork
== Series Details == Series: Enable P010, P012 and P016 formats for GLK/CNL (rev2) URL : https://patchwork.freedesktop.org/series/43891/ State : warning == Summary == $ dim checkpatch origin/drm-tip c556cc92888f drm: Add P010, P012, P016 format definitions and fourcc -:28: WARNING:LONG_LINE: l

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/guc: fix GEM_BUG_ON check (rev2)

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915/guc: fix GEM_BUG_ON check (rev2) URL : https://patchwork.freedesktop.org/series/44578/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4305_full -> Patchwork_9271_full = == Summary - WARNING == Minor unknown changes coming with Patchwo

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable P010, P012 and P016 formats for GLK/CNL (rev2)

2018-06-12 Thread Patchwork
== Series Details == Series: Enable P010, P012 and P016 formats for GLK/CNL (rev2) URL : https://patchwork.freedesktop.org/series/43891/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm: Add P010, P012, P016 format definitions and fourcc Okay! Commit: drm/i915: Add P010,

[Intel-gfx] ✓ Fi.CI.BAT: success for Enable P010, P012 and P016 formats for GLK/CNL (rev2)

2018-06-12 Thread Patchwork
== Series Details == Series: Enable P010, P012 and P016 formats for GLK/CNL (rev2) URL : https://patchwork.freedesktop.org/series/43891/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4305 -> Patchwork_9274 = == Summary - SUCCESS == No regressions found. External URL:

Re: [Intel-gfx] [PATCH v9 7/7] drm/i915: add a sysfs entry to let users set sseu configs

2018-06-12 Thread Tvrtko Ursulin
On 12/06/2018 11:52, Lionel Landwerlin wrote: On 12/06/18 11:37, Chris Wilson wrote: Quoting Lionel Landwerlin (2018-06-12 11:33:34) On 12/06/18 10:20, Joonas Lahtinen wrote: Quoting Chris Wilson (2018-06-11 18:02:37) Quoting Lionel Landwerlin (2018-06-11 14:46:07) On 11/06/18 13:10, Tvrtko

Re: [Intel-gfx] [PATCH v9 7/7] drm/i915: add a sysfs entry to let users set sseu configs

2018-06-12 Thread Chris Wilson
Quoting Lionel Landwerlin (2018-06-12 11:52:10) > I'm looking forward to the definition of the greater good :) > Tvrtko wanted to avoid the heuristic territory, it seems like we're just > stepping into it. If we have to make any choice, we have not just stepped, but dived head first into it. Tbh,

[Intel-gfx] [CI] drm/i915/gtt: Make gen6 page directories evictable

2018-06-12 Thread Chris Wilson
Currently all page directories are bound at creation using an unevictable node in the GGTT. This severely limits us as we cannot remove any inactive ppgtt for new contexts, or under aperture pressure. To fix this we need to make the page directory into a first class and unbindable vma. Hence, the c

Re: [Intel-gfx] [PATCH][V3] drm/i915/guc: fix GEM_BUG_ON check

2018-06-12 Thread Michal Wajdeczko
On Tue, 12 Jun 2018 11:38:04 +0200, Colin King wrote: From: Colin Ian King The check for level being less than zero always false because flags is currently unsigned and can never be negative. Fix this by making level a s32. Detected by CoverityScan, CID#1468363 ("Macro compares unsigned to

Re: [Intel-gfx] [PATCH v3] drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled

2018-06-12 Thread Ville Syrjälä
On Tue, Jun 12, 2018 at 12:17:41AM -0700, Abhay Kumar wrote: > From: Ville Syrjälä > > CDCLK has to be at least twice the BLCK regardless of audio. Audio > driver has to probe using this hook and increase the clock even in > absence of any display. > > v2: Use atomic refcount for get_power, put_

Re: [Intel-gfx] [CI 1/2] drm/i915/icl: Add allowed DP rates for Icelake

2018-06-12 Thread Ville Syrjälä
On Mon, Jun 11, 2018 at 03:26:54PM -0700, Paulo Zanoni wrote: > From: Manasi Navare > > For ICL, on Combo PHY the allowed max rates are: > - HBR3 8.1 eDP (DDIA) > - HBR2 5.4 DisplayPort (DDIB) > and for MG PHY/TC DDI Ports allowed DP rates are: > - HBR3 8.1 DisplayPort (DP alternate mode, DP o

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: move towards kernel types (rev2)

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915: move towards kernel types (rev2) URL : https://patchwork.freedesktop.org/series/44610/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4305_full -> Patchwork_9272_full = == Summary - WARNING == Minor unknown changes coming with Patchw

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gtt: Make gen6 page directories evictable

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915/gtt: Make gen6 page directories evictable URL : https://patchwork.freedesktop.org/series/44623/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915/gtt: Make gen6 page directories evictable -O:drivers/gpu/drm/i915/i915_gem_gtt.c:1709

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gtt: Make gen6 page directories evictable

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915/gtt: Make gen6 page directories evictable URL : https://patchwork.freedesktop.org/series/44623/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4306 -> Patchwork_9275 = == Summary - WARNING == Minor unknown changes coming with Patchwor

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/7] drm/i915/guc: Don't store runtime GuC log level in modparam (rev3)

2018-06-12 Thread Piorkowski, Piotr
On Tue, 2018-06-05 at 21:56 +, Patchwork wrote: > == Series Details == > > Series: series starting with [v2,1/7] drm/i915/guc: Don't store > runtime GuC log level in modparam (rev3) > URL : https://patchwork.freedesktop.org/series/44201/ > State : failure > > == Summary == > > = CI Bug Log

Re: [Intel-gfx] [PATCH 6/7] drm/i915/audio: switch to kernel unsigned int types

2018-06-12 Thread Ville Syrjälä
On Tue, Jun 12, 2018 at 12:19:34PM +0300, Jani Nikula wrote: > We have fairly mixed uintN_t vs. uN usage throughout the driver, but try > to stick to kernel types at least where it's more prevalent. > > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/intel_audio.c | 36 ++

[Intel-gfx] ✗ Fi.CI.BAT: failure for HACK: drm/i915: see what breaks with display disabled

2018-06-12 Thread Patchwork
== Series Details == Series: HACK: drm/i915: see what breaks with display disabled URL : https://patchwork.freedesktop.org/series/44485/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4306 -> Patchwork_9276 = == Summary - FAILURE == Serious unknown changes coming with Pat

Re: [Intel-gfx] [PATCH 0/7] drm/i915: move towards kernel types

2018-06-12 Thread Ville Syrjälä
On Tue, Jun 12, 2018 at 12:19:28PM +0300, Jani Nikula wrote: > Semi-RFC. Do we want to do this? Here's a batch of conversions that shouldn't > conflict much with in-flight patches. > > The trouble with mixed use is that it's inconsistent, and any remaining C99 > types will encourage their use. We

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Make closing request flush mandatory

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915: Make closing request flush mandatory URL : https://patchwork.freedesktop.org/series/44614/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4305_full -> Patchwork_9273_full = == Summary - FAILURE == Serious unknown changes coming with

[Intel-gfx] ✓ Fi.CI.IGT: success for Enable P010, P012 and P016 formats for GLK/CNL (rev2)

2018-06-12 Thread Patchwork
== Series Details == Series: Enable P010, P012 and P016 formats for GLK/CNL (rev2) URL : https://patchwork.freedesktop.org/series/43891/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4305_full -> Patchwork_9274_full = == Summary - WARNING == Minor unknown changes coming

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/7] drm/i915/guc: Don't store runtime GuC log level in modparam (rev3)

2018-06-12 Thread Chris Wilson
Quoting Piorkowski, Piotr (2018-06-12 14:12:34) > On Tue, 2018-06-05 at 21:56 +, Patchwork wrote: > > == Series Details == > > > > Series: series starting with [v2,1/7] drm/i915/guc: Don't store > > runtime GuC log level in modparam (rev3) > > URL : https://patchwork.freedesktop.org/series/4

[Intel-gfx] [BUG] cc5b114dcf bpf, i40e: add meta data support

2018-06-12 Thread Keith Busch
My server's i40e no longer obtains an IP address on linux mainline. Bisected to the following: commit cc5b114dcf986bfd8e4c37bf65d1b7b1e5290ac6 Author: Daniel Borkmann Date: Mon May 28 11:07:20 2018 +0200 bpf, i40e: add meta data support Reverting on mainline resolves the issue. Is there

[Intel-gfx] Depth 30 colormap handling fixes for servers 1.20+ and < 1.20

2018-06-12 Thread Mario Kleiner
Hi, finally here's an updated patch that for depth 30 now works on both Server 1.20 with the full colormap + gamma table handling, and for servers < 1.20 with the RandR gamma tables working fine and the colormap processing skipped. This one successfully tested on sna and uxa with both server 1.20

[Intel-gfx] [PATCH xf86-video-intel] sna/uxa: Fix colormap handling at screen depth 30. (v2)

2018-06-12 Thread Mario Kleiner
The various clut handling functions like a setup consistent with the x-screen color depth. Otherwise we observe improper sampling in the gamma tables at depth 30. Therefore replace hard-coded bitsPerRGB = 8 by actual bits per channel scrn->rgbBits. Also use this for call to xf86HandleColormaps().

Re: [Intel-gfx] [PATCH v3] drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled

2018-06-12 Thread Kumar, Abhay
On 6/12/2018 5:13 AM, Ville Syrjälä wrote: On Tue, Jun 12, 2018 at 12:17:41AM -0700, Abhay Kumar wrote: From: Ville Syrjälä CDCLK has to be at least twice the BLCK regardless of audio. Audio driver has to probe using this hook and increase the clock even in absence of any display. v2: Use a

[Intel-gfx] [PATCH i-g-t v2 0/2] tests/i915-query: new tests for listing perf configurations

2018-06-12 Thread Lionel Landwerlin
Hi, A small update to add query based on configuration uuids. Cheers, Lionel Landwerlin (2): include: bump i915 header tests/i915-query: add new tests for perf configurations queries include/drm-uapi/i915_drm.h | 56 +++- tests/i915_query.c | 608 +

[Intel-gfx] [PATCH i-g-t v2 1/2] include: bump i915 header

2018-06-12 Thread Lionel Landwerlin
--- include/drm-uapi/i915_drm.h | 56 - 1 file changed, 55 insertions(+), 1 deletion(-) diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h index 16e452aa..17f56dcd 100644 --- a/include/drm-uapi/i915_drm.h +++ b/include/drm-uapi/i915_drm.h @@

[Intel-gfx] [PATCH i-g-t v2 2/2] tests/i915-query: add new tests for perf configurations queries

2018-06-12 Thread Lionel Landwerlin
These new tests allow to list the available configurations and also to query the data that makes up a configuration. v2: Verify uuid queries (Lionel) Signed-off-by: Lionel Landwerlin --- tests/i915_query.c | 608 + 1 file changed, 608 insertions(+) d

Re: [Intel-gfx] [PATCH i-g-t v2 0/2] tests/i915-query: new tests for listing perf configurations

2018-06-12 Thread Lionel Landwerlin
On 12/06/18 17:37, Lionel Landwerlin wrote: Hi, A small update to add query based on configuration uuids. Cheers, Lionel Landwerlin (2): include: bump i915 header tests/i915-query: add new tests for perf configurations queries include/drm-uapi/i915_drm.h | 56 +++- tests/i915_query.

[Intel-gfx] [PATCH v2] drm/i915: add support for perf configuration queries

2018-06-12 Thread Lionel Landwerlin
Listing configurations at the moment is supported only through sysfs. This might cause issues for applications wanting to list configurations from a container where sysfs isn't available. This change adds a way to query the number of configurations and their content through the i915 query uAPI. v

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gtt: Make gen6 page directories evictable

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915/gtt: Make gen6 page directories evictable URL : https://patchwork.freedesktop.org/series/44623/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4306_full -> Patchwork_9275_full = == Summary - WARNING == Minor unknown changes coming wit

[Intel-gfx] [CI] drm/i915/gtt: Only keep gen6 page directories pinned while active

2018-06-12 Thread Chris Wilson
In order to be able to evict the gen6 ppgtt, we have to unpin it at some point. We can simply use our context activity tracking to know when the ppgtt is no longer in use by hardware, and so only keep it pinned while being used a request. For the kernel_context (and thus aliasing_ppgtt), it remain

[Intel-gfx] ✓ Fi.CI.BAT: success for tests/i915-query: new tests for listing perf configurations

2018-06-12 Thread Patchwork
== Series Details == Series: tests/i915-query: new tests for listing perf configurations URL : https://patchwork.freedesktop.org/series/44644/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4307 -> IGTPW_1451 = == Summary - SUCCESS == No regressions found. External URL

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: add support for perf configuration queries (rev2)

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915: add support for perf configuration queries (rev2) URL : https://patchwork.freedesktop.org/series/44290/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: add support for perf configuration queries -drivers/gpu/drm/i915/selftests/

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: add support for perf configuration queries (rev2)

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915: add support for perf configuration queries (rev2) URL : https://patchwork.freedesktop.org/series/44290/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4308 -> Patchwork_9277 = == Summary - SUCCESS == No regressions found. External

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gtt: Only keep gen6 page directories pinned while active

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915/gtt: Only keep gen6 page directories pinned while active URL : https://patchwork.freedesktop.org/series/44649/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4308 -> Patchwork_9278 = == Summary - WARNING == Minor unknown changes comin

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled (rev3)

2018-06-12 Thread Saarinen, Jani
HI, > -Original Message- > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf > Of Patchwork > Sent: tiistai 12. kesäkuuta 2018 11.38 > To: Kumar, Abhay > Cc: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Force 2*96 MHz

Re: [Intel-gfx] [CI 1/2] drm/i915/icl: Add allowed DP rates for Icelake

2018-06-12 Thread Manasi Navare
On Tue, Jun 12, 2018 at 03:15:53PM +0300, Ville Syrjälä wrote: > On Mon, Jun 11, 2018 at 03:26:54PM -0700, Paulo Zanoni wrote: > > From: Manasi Navare > > > > For ICL, on Combo PHY the allowed max rates are: > > - HBR3 8.1 eDP (DDIA) > > - HBR2 5.4 DisplayPort (DDIB) > > and for MG PHY/TC DDI P

Re: [Intel-gfx] [PATCH 1/3] drm/atomic: Improve debug messages

2018-06-12 Thread Harry Wentland
On 2018-06-11 03:34 PM, Ville Syrjala wrote: > From: Ville Syrjälä > > Print the id/name of the object we're dealing with. Makes it easier to > figure out what's going on. Also toss in a few extra debug prints that > might be useful. > > Signed-off-by: Ville Syrjälä Reviewed-by: Harry Wentland

Re: [Intel-gfx] [PATCH 2/3] drm: Print bad user modes

2018-06-12 Thread Harry Wentland
On 2018-06-11 03:34 PM, Ville Syrjala wrote: > From: Ville Syrjälä > > Print out the modeline when we reject a bad user mode. Avoids having to > guess why it was rejected. > > Signed-off-by: Ville Syrjälä Reviewed-by: Harry Wentland Harry > --- > drivers/gpu/drm/drm_atomic.c| 20 ++

[Intel-gfx] Problems in intel_panel_fitter.1

2018-06-12 Thread esr
This is automatically generated email about markup problems in a man page for which you appear to be responsible. If you are not the right person or list, please tell me so I can correct my database. See http://catb.org/~esr/doclifter/bugs.html for details on how and why these patches were genera

[Intel-gfx] ✗ Fi.CI.BAT: failure for Problems in intel_panel_fitter.1 (rev2)

2018-06-12 Thread Patchwork
== Series Details == Series: Problems in intel_panel_fitter.1 (rev2) URL : https://patchwork.freedesktop.org/series/3953/ State : failure == Summary == Applying: Problems in intel_panel_fitter.1 error: sha1 information is lacking or useless (intel_panel_fitter.1). error: could not build fake a

Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915/icl: Add allowed DP rates for Icelake

2018-06-12 Thread Rodrigo Vivi
On Tue, Jun 12, 2018 at 11:46:08AM +0300, Jani Nikula wrote: > On Mon, 11 Jun 2018, Paulo Zanoni wrote: > > Em Seg, 2018-06-11 às 22:35 +, Patchwork escreveu: > >> == Series Details == > >> > >> Series: series starting with [CI,1/2] drm/i915/icl: Add allowed DP > >> rates for Icelake > >> URL

[Intel-gfx] [PATCH v4 0/2] Enable Dynamic cdclk and HDA together on GLK

2018-06-12 Thread Abhay Kumar
Patches needed to change cdclk to 2*BCLK before accessing HDA Codec. Ville Syrjälä (2): drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled drm/i915: Shut off PW2 when changing cdclk on glk drivers/gpu/drm/i915/i915_drv.h | 3 ++ drivers/gpu/drm/i915/i915_reg.h

[Intel-gfx] [PATCH v4 1/2] drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled

2018-06-12 Thread Abhay Kumar
From: Ville Syrjälä CDCLK has to be at least twice the BLCK regardless of audio. Audio driver has to probe using this hook and increase the clock even in absence of any display. v2: Use atomic refcount for get_power, put_power so that we can call each once(Abhay). v3: Reset power well 2 to a

[Intel-gfx] [PATCH v4 2/2] drm/i915: Shut off PW2 when changing cdclk on glk

2018-06-12 Thread Abhay Kumar
From: Ville Syrjälä Apparently the audio hardware gets confused if it's powered up when change the cdclk frequency. Force PW2 (which is where audio lives) off when we do the cdclk reprogramming. This is a rather big hack. If something is using PW2 when we do this things wil break. I don't think

[Intel-gfx] ✗ Fi.CI.IGT: failure for tests/i915-query: new tests for listing perf configurations

2018-06-12 Thread Patchwork
== Series Details == Series: tests/i915-query: new tests for listing perf configurations URL : https://patchwork.freedesktop.org/series/44644/ State : failure == Summary == = CI Bug Log - changes from IGT_4516_full -> IGTPW_1451_full = == Summary - FAILURE == Serious unknown changes coming

Re: [Intel-gfx] [PATCH] drm/i915/psr : Add psr1 live status

2018-06-12 Thread Dhinakaran Pandiyan
On Fri, 2018-05-25 at 11:50 +0530, vathsala nagaraju wrote: > From: Vathsala Nagaraju > > Prints live state of psr1.Extending the existing > PSR2 live state function to cover psr1. > > Tested on KBL with psr2 and psr1 panel. > > v2: rebase > v3: DK > Rename psr2_live_status to psr_source_st

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: add support for perf configuration queries (rev2)

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915: add support for perf configuration queries (rev2) URL : https://patchwork.freedesktop.org/series/44290/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4308_full -> Patchwork_9277_full = == Summary - WARNING == Minor unknown changes c

Re: [Intel-gfx] [PATCH 0/7] drm/i915: move towards kernel types

2018-06-12 Thread Lucas De Marchi
On Tue, Jun 12, 2018 at 3:15 AM Jani Nikula wrote: > > On Tue, 12 Jun 2018, Tvrtko Ursulin wrote: > > On 12/06/2018 10:19, Jani Nikula wrote: > >> Semi-RFC. Do we want to do this? Here's a batch of conversions that > >> shouldn't > >> conflict much with in-flight patches. > >> > >> The trouble w

Re: [Intel-gfx] [PATCH 1/4] drm/i915: fix guest virtual PCH detection on non-PCH systems

2018-06-12 Thread Lucas De Marchi
On Fri, Jun 8, 2018 at 5:34 AM Jani Nikula wrote: > > On Thu, 31 May 2018, Lucas De Marchi wrote: > > On Thu, May 31, 2018 at 02:56:21PM +0300, Jani Nikula wrote: > >> Virtualized non-PCH systems such as Broxton or Geminilake should use > >> PCH_NONE to indicate no PCH rather than PCH_NOP. The la

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled (rev3)

2018-06-12 Thread Kumar, Abhay
On 6/12/2018 11:09 AM, Saarinen, Jani wrote: HI, -Original Message- From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of Patchwork Sent: tiistai 12. kesäkuuta 2018 11.38 To: Kumar, Abhay Cc: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] ✓ Fi.CI.IGT: su

[Intel-gfx] [PATCH 0/3] Some checkpatch fixes for i915_reg.h

2018-06-12 Thread Paulo Zanoni
Hi This is a follow-up on the discussion we recently had on "Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915/icl: Add allowed DP rates for Icelake". Let's fix the spacing issues once and for all, so now we can simply block every new patch instead of having

[Intel-gfx] [PATCH 2/3] drm/i915/i915_reg.h: fix the checkpatch SPACE_BEFORE_TAB issues

2018-06-12 Thread Paulo Zanoni
Since I'm touching the file I might as well fix this class of errors since they are just a few. Also drive-by fix the styling of the VLV_TURBO_SOC_OVERRIDE definitions instead of just the spaces before the tabs. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_reg.h | 14 +++---

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gtt: Only keep gen6 page directories pinned while active

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915/gtt: Only keep gen6 page directories pinned while active URL : https://patchwork.freedesktop.org/series/44649/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4308_full -> Patchwork_9278_full = == Summary - SUCCESS == No regressions fo

  1   2   >