We've opted to use the maximum link rate and lane count for eDP panels,
because typically the maximum supported configuration reported by the
panel has matched the native resolution requirements of the panel, and
optimizing the link has lead to problems.
With eDP 1.4 rate select method and DSC fea
Quoting Patchwork (2018-05-09 03:41:59)
> == Series Details ==
>
> Series: drm/i915/selftests: Create mock_engine() under struct_mutex
> URL : https://patchwork.freedesktop.org/series/42898/
> State : success
>
> == Summary ==
>
> = CI Bug Log - changes from CI_DRM_4160_full -> Patchwork_8951_
Quoting Chris Wilson (2018-05-08 17:30:41)
> We assume that the CSB is written using the normal ringbuffer
> coherency protocols, as outlined in kernel/events/ring_buffer.c:
>
> * (HW) (DRIVER)
> *
> * if (LOAD ->data_tail) {LOAD ->data_head
On Wed, 09 May 2018, Feng Tang wrote:
> On Tue, May 08, 2018 at 10:30:19PM +0300, Jani Nikula wrote:
>> On Wed, 09 May 2018, Feng Tang wrote:
>> >> Well if it's edp probing, then atm we do need to block since we have
>> >> no support for panel hotplugging. And userspace generally no
>> >> expecta
On Wed, May 09, 2018 at 10:53:53AM +0300, Jani Nikula wrote:
> On Wed, 09 May 2018, Feng Tang wrote:
> > On Tue, May 08, 2018 at 10:30:19PM +0300, Jani Nikula wrote:
> >> On Wed, 09 May 2018, Feng Tang wrote:
> >> >> Well if it's edp probing, then atm we do need to block since we have
> >> >> no
== Series Details ==
Series: drm/i915/selftests: Only switch to kernel context when locked
URL : https://patchwork.freedesktop.org/series/42922/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4161 -> Patchwork_8956 =
== Summary - FAILURE ==
Serious unknown changes coming
Chris Wilson writes:
> In igt_flush_test() we try to switch back to the kernel context, but we
> are only able to do so when we care called with struct_mutex held.
s/care/are
>
> More CI fallout from lockdep being temporarily suppressed :(
Kind words.../o\
Reviewed-by: Mika Kuoppala
>
> Fix
== Series Details ==
Series: drm/i915/dp: optimize eDP 1.4+ link config fast and narrow
URL : https://patchwork.freedesktop.org/series/42923/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4161 -> Patchwork_8957 =
== Summary - WARNING ==
Minor unknown changes coming with
== Series Details ==
Series: drm/i915/selftests: Only switch to kernel context when locked
URL : https://patchwork.freedesktop.org/series/42922/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4161 -> Patchwork_8958 =
== Summary - WARNING ==
Minor unknown changes coming wi
Hi Dave,
Not quite the explosion you were afraid of, but three fixes to avoid
a some WARNs and *ERROR*s. I'm still trying to get an Ack for merging
the ICL stolen early quirks through our tree and then including them
in the next -fixes (I know we're bit late :( )
I'm travelling for the rest of th
Quoting Lionel Landwerlin (2018-05-08 19:03:45)
> If some of the contexts submitting workloads to the GPU have been
> configured to shutdown slices/subslices, we might loose the NOA
> configurations written in the NOA muxes. We need to reprogram them
> when we detect a powergating configuration cha
Quoting Chris Wilson (2018-05-09 09:59:09)
> Quoting Lionel Landwerlin (2018-05-08 19:03:45)
> > If some of the contexts submitting workloads to the GPU have been
> > configured to shutdown slices/subslices, we might loose the NOA
> > configurations written in the NOA muxes. We need to reprogram th
On 09/05/18 09:59, Chris Wilson wrote:
+
+ *cs++ = MI_BATCH_BUFFER_START_GEN8 | MI_BATCH_SECOND_LEVEL;
You are not a second level batch. You are calling from the ring to a
global address of _0_.
+ *cs++ = 0;
low 32bits = 0
+ *cs++ = i915_ggtt_offset(stream->noa_reprogram_v
From: Colin Ian King
Trivial fix to spelling mistake in WARN warning message text
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/i915/intel_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index dde92e
Quoting Patchwork (2018-05-09 09:57:55)
> == Series Details ==
>
> Series: drm/i915/selftests: Only switch to kernel context when locked
> URL : https://patchwork.freedesktop.org/series/42922/
> State : success
>
> == Summary ==
>
> = CI Bug Log - changes from CI_DRM_4161 -> Patchwork_8958 =
>
On 09/05/18 10:05, Chris Wilson wrote:
Could there be any more pointer chasing?
Thinking about more about how to make this part cleaner, could we not
store the engine->noa_batch and then this all becomes
vma = engine->noa_batch;
if (vma)
return;
Locking! Missed it in the first pass, b
Quoting Chris Wilson (2018-05-08 21:59:20)
> Quoting Tvrtko Ursulin (2018-05-08 18:45:44)
> >
> > On 07/05/2018 14:57, Chris Wilson wrote:
> > > Prepare to allow the execlists submission to be run from underneath a
> > > hardirq timer context (and not just the current softirq context) as is
> > >
On Wed, 09 May 2018, Feng Tang wrote:
> On Wed, May 09, 2018 at 10:53:53AM +0300, Jani Nikula wrote:
>> On Wed, 09 May 2018, Feng Tang wrote:
>> > On Tue, May 08, 2018 at 10:30:19PM +0300, Jani Nikula wrote:
>> >> On Wed, 09 May 2018, Feng Tang wrote:
>> >> >> Well if it's edp probing, then atm
On Wed, 09 May 2018, Colin King wrote:
> From: Colin Ian King
>
> Trivial fix to spelling mistake in WARN warning message text
While at it, would you mind fixing the plethora of "seqeuencer" typos in
the comments in the same file please?
BR,
Jani.
>
> Signed-off-by: Colin Ian King
> ---
> dr
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:27 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
== Series Details ==
Series: drm/i915/dp: fix spelling mistake: "seqeuncer" -> "sequencer"
URL : https://patchwork.freedesktop.org/series/42935/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4162 -> Patchwork_8959 =
== Summary - WARNING ==
Minor unknown changes coming wi
>-Original Message-
>From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:27 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
>-Original Message-
>From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:27 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
>-Original Message-
>From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:27 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
== Series Details ==
Series: drm/i915/dp: optimize eDP 1.4+ link config fast and narrow
URL : https://patchwork.freedesktop.org/series/42923/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4161_full -> Patchwork_8957_full =
== Summary - WARNING ==
Minor unknown changes co
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:27 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
From: Colin Ian King
Trivial fix to spelling mistakes in WARN warning message text and
in comments:
"seqeuncer", "seqeuencer" -> "sequencer"
Signed-off-by: Colin Ian King
---
V2: Also fix seqeuencer in comments
---
drivers/gpu/drm/i915/intel_dp.c | 12 ++--
1 file changed, 6 inserti
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:27 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
== Series Details ==
Series: drm/i915/selftests: Only switch to kernel context when locked
URL : https://patchwork.freedesktop.org/series/42922/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4161_full -> Patchwork_8958_full =
== Summary - WARNING ==
Minor unknown changes
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:27 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
>-Original Message-
>From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:27 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:27 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
On Wed, 09 May 2018, Colin King wrote:
> From: Colin Ian King
>
> Trivial fix to spelling mistakes in WARN warning message text and
> in comments:
>
> "seqeuncer", "seqeuencer" -> "sequencer"
>
> Signed-off-by: Colin Ian King
Reviewed-by: Jani Nikula
(Waiting for the CI runs before merging.)
== Series Details ==
Series: drm/i915/dp: fix spelling mistakes: "seqeuncer" and "seqeuencer"
URL : https://patchwork.freedesktop.org/series/42937/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4162 -> Patchwork_8960 =
== Summary - WARNING ==
Minor unknown changes coming
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:27 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
>-Original Message-
>From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:27 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
Oscar Mateo writes:
> Avoids a hang during soft reset.
>
> v2: Rebased on top of the WA refactoring
> v3: Added References (Mika)
> v4:
> - Rebased
> - C, not lisp (Chris)
> - Which steppings affected by this are not clear.
> For the moment, apply unconditionally as per the
> BSpec
== Series Details ==
Series: drm/i915/dp: fix spelling mistake: "seqeuncer" -> "sequencer"
URL : https://patchwork.freedesktop.org/series/42935/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4162_full -> Patchwork_8959_full =
== Summary - WARNING ==
Minor unknown changes
Ideally, we want to atomically flush and disable the tasklet before
resetting the GPU. At present, we rely on being the only part to touch
our tasklet and serialisation of the reset process to ensure that we can
suspend the tasklet from the mix of reset/wedge pathways. In this patch,
we move the ta
We rely on ksoftirqd to run in a timely fashion in order to drain the
execlists queue. Quite frequently, it does not. In some cases we may see
latencies of over 200ms triggering our idle timeouts and forcing us to
declare the driver wedged!
Thus we can speed up idle detection by bypassing ksoftirq
Bypass using the tasklet to submit the first request to HW, as the
tasklet may be deferred unto ksoftirqd and at a minimum will add in
excess of 10us (and maybe tens of milliseconds) to our execution
latency. This latency reduction is most notable when execution flows
between engines.
v2: Beware h
Continuing the theme of bypassing ksoftirqd latency, also first try to
directly submit from the CS interrupt handler to clear the ELSP and
queue the next.
In the past, we have been hesitant to do this as the context switch
processing has been quite heavy, requiring forcewaked mmio. However, as
we
In the next few patches, we want to abuse tasklet to avoid ksoftirqd
latency along critical paths. To make that abuse easily to swallow,
first coat the tasklet in a little syntactic sugar.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem.c | 8 +--
d
== Series Details ==
Series: drm/i915/dp: fix spelling mistakes: "seqeuncer" and "seqeuencer"
URL : https://patchwork.freedesktop.org/series/42937/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4162_full -> Patchwork_8960_full =
== Summary - WARNING ==
Minor unknown chan
== Series Details ==
Series: series starting with [v3,1/5] drm/i915: Wrap tasklet_struct for abuse
URL : https://patchwork.freedesktop.org/series/42942/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: Wrap tasklet_struct for abuse
Okay!
Commit: drm/i915: Combine ta
== Series Details ==
Series: series starting with [v3,1/5] drm/i915: Wrap tasklet_struct for abuse
URL : https://patchwork.freedesktop.org/series/42942/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
949ea8da2485 drm/i915: Wrap tasklet_struct for abuse
-:53: WARNING:FILE_PATH_CH
On Wed, May 09, 2018 at 10:13:21AM +0300, Jani Nikula wrote:
> We've opted to use the maximum link rate and lane count for eDP panels,
> because typically the maximum supported configuration reported by the
> panel has matched the native resolution requirements of the panel, and
> optimizing the li
== Series Details ==
Series: series starting with [v3,1/5] drm/i915: Wrap tasklet_struct for abuse
URL : https://patchwork.freedesktop.org/series/42942/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4162 -> Patchwork_8961 =
== Summary - SUCCESS ==
No regressions found.
On Tue, May 08, 2018 at 05:35:24PM -0700, Dhinakaran Pandiyan wrote:
> Driver features data block has a boolean flag for PSR, use this to decide
> whether PSR should be enabled on a platform. The module parameter can
> still be used to override this.
>
> Note: The feature currently remains disable
Chris Wilson writes:
> In the next few patches, we want to abuse tasklet to avoid ksoftirqd
> latency along critical paths. To make that abuse easily to swallow,
> first coat the tasklet in a little syntactic sugar.
>
> Signed-off-by: Chris Wilson
> Cc: Tvrtko Ursulin
> ---
> drivers/gpu/drm/i
>-Original Message-
>From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:27 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
Quoting Mika Kuoppala (2018-05-09 14:44:30)
> Chris Wilson writes:
>
> > In the next few patches, we want to abuse tasklet to avoid ksoftirqd
> > latency along critical paths. To make that abuse easily to swallow,
> > first coat the tasklet in a little syntactic sugar.
> >
> > Signed-off-by: Chri
I am not aware if there is a reason for restricting the Bytes per GMBUS
WR/RD to 256 at present. But HW has 9Bits for Total Byte count for a
single read or Write cycle. Means we can extend a cycle of RD/WR to
511Bytes.
At present nothing much as ROI, as most of the usecases are for less
than 256By
Support for Burst read in HW is added for HDCP2.2 compliance
requirement.
This patch enables the burst read for all the gmbus read of more than
511Bytes, on capable platforms.
v2:
Extra line is removed.
v3:
Macro is added for detecting the BURST_READ Support [Jani]
Runtime detection of the
GMBUS HW supports 511Bytes as Max Bytes per single RD/WR op. Instead of
enabling the 511Bytes per RD/WR cycle on legacy platforms for no
absolute ROIs, this change allows the max bytes per op upto 511Bytes
from Gen9 onwards.
v2:
No Change.
v3:
Inline function for max_xfer_size and renaming of
Chris Wilson writes:
> Ideally, we want to atomically flush and disable the tasklet before
> resetting the GPU. At present, we rely on being the only part to touch
> our tasklet and serialisation of the reset process to ensure that we can
> suspend the tasklet from the mix of reset/wedge pathways
>-Original Message-
>From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:28 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
On Wed, May 09, 2018 at 05:29:14AM -0700, Rodrigo Vivi wrote:
> On Tue, May 08, 2018 at 05:35:24PM -0700, Dhinakaran Pandiyan wrote:
> > Driver features data block has a boolean flag for PSR, use this to decide
> > whether PSR should be enabled on a platform. The module parameter can
> > still be u
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:28 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
Quoting Mika Kuoppala (2018-05-09 14:54:04)
> Chris Wilson writes:
>
> > Ideally, we want to atomically flush and disable the tasklet before
> > resetting the GPU. At present, we rely on being the only part to touch
> > our tasklet and serialisation of the reset process to ensure that we can
> >
Quoting Chris Wilson (2018-05-09 15:02:12)
> Quoting Mika Kuoppala (2018-05-09 14:54:04)
> > Chris Wilson writes:
> >
> > > Ideally, we want to atomically flush and disable the tasklet before
> > > resetting the GPU. At present, we rely on being the only part to touch
> > > our tasklet and serial
>-Original Message-
>From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:28 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
>-Original Message-
>From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:28 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
== Series Details ==
Series: series starting with [v3,1/5] drm/i915: Wrap tasklet_struct for abuse
URL : https://patchwork.freedesktop.org/series/42942/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4162_full -> Patchwork_8961_full =
== Summary - WARNING ==
Minor unknown
In the next few patches, we want to abuse tasklet to avoid ksoftirqd
latency along critical paths. To make that abuse easily to swallow,
first coat the tasklet in a little syntactic sugar.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem.c | 4 +-
dr
Continuing the theme of bypassing ksoftirqd latency, also first try to
directly submit from the CS interrupt handler to clear the ELSP and
queue the next.
In the past, we have been hesitant to do this as the context switch
processing has been quite heavy, requiring forcewaked mmio. However, as
we
Bypass using the tasklet to submit the first request to HW, as the
tasklet may be deferred unto ksoftirqd and at a minimum will add in
excess of 10us (and maybe tens of milliseconds) to our execution
latency. This latency reduction is most notable when execution flows
between engines.
v2: Beware h
The idea was to try and let the existing tasklet run to completion
before we began the reset, but it involves a racy check against anything
else that tries to run the tasklet. Rather than acknowledge and ignore
the race, let it be and don't try and be too clever.
The tasklet will resume execution
We rely on ksoftirqd to run in a timely fashion in order to drain the
execlists queue. Quite frequently, it does not. In some cases we may see
latencies of over 200ms triggering our idle timeouts and forcing us to
declare the driver wedged!
Thus we can speed up idle detection by bypassing ksoftirq
== Series Details ==
Series: GMBUS changes (rev4)
URL : https://patchwork.freedesktop.org/series/41632/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7ef555142951 drm/i915/gmbus: Increase the Bytes per Rd/Wr Op
3e623cbfe855 drm/i915/gmbus: Enable burst read
-:34: CHECK:MACRO_AR
== Series Details ==
Series: GMBUS changes (rev4)
URL : https://patchwork.freedesktop.org/series/41632/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915/gmbus: Increase the Bytes per Rd/Wr Op
-O:drivers/gpu/drm/i915/intel_i2c.c:403:23: warning: expression using
sizeo
== Series Details ==
Series: GMBUS changes (rev4)
URL : https://patchwork.freedesktop.org/series/41632/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4163 -> Patchwork_8962 =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_8962 need to be verified
m
== Series Details ==
Series: series starting with [1/5] drm/i915: Remove tasklet flush before disable
URL : https://patchwork.freedesktop.org/series/42950/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
8083271a8a5b drm/i915: Remove tasklet flush before disable
23f6b88c5a19 drm/
Quoting Chris Wilson (2018-05-09 15:27:58)
> In the next few patches, we want to abuse tasklet to avoid ksoftirqd
> latency along critical paths. To make that abuse easily to swallow,
> first coat the tasklet in a little syntactic sugar.
>
> Signed-off-by: Chris Wilson
> Cc: Tvrtko Ursulin
> ---
== Series Details ==
Series: series starting with [1/5] drm/i915: Remove tasklet flush before disable
URL : https://patchwork.freedesktop.org/series/42950/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: Remove tasklet flush before disable
Okay!
Commit: drm/i915: W
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:28 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
On Wed, 2018-05-09 at 05:21 -0700, Rodrigo Vivi wrote:
> On Wed, May 09, 2018 at 10:13:21AM +0300, Jani Nikula wrote:
> > We've opted to use the maximum link rate and lane count for eDP
> > panels,
> > because typically the maximum supported configuration reported by
> > the
> > panel has matched t
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:28 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
== Series Details ==
Series: series starting with [1/5] drm/i915: Remove tasklet flush before disable
URL : https://patchwork.freedesktop.org/series/42950/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4163 -> Patchwork_8963 =
== Summary - WARNING ==
Minor unknown change
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:28 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
On Wed, 2018-05-09 at 08:09 -0700, Matt Atwood wrote:
> On Wed, 2018-05-09 at 05:21 -0700, Rodrigo Vivi wrote:
> > On Wed, May 09, 2018 at 10:13:21AM +0300, Jani Nikula wrote:
> > > We've opted to use the maximum link rate and lane count for eDP
> > > panels,
> > > because typically the maximum sup
On 09/05/18 09:59, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-05-08 19:03:45)
If some of the contexts submitting workloads to the GPU have been
configured to shutdown slices/subslices, we might loose the NOA
configurations written in the NOA muxes. We need to reprogram them
when we dete
From: Tvrtko Ursulin
Request split mode had several bugs, both in the original version and also
after the recent refactorings.
One big one was that it wasn't considering different submit ports as a
reason to split execution, and also that it was too time based instead of
looking at relevant time
On 08/05/18 21:56, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-05-03 18:18:43)
On 25/04/2018 12:45, Lionel Landwerlin wrote:
From: Chris Wilson
We want to allow userspace to reconfigure the subslice configuration for
its own use case. To do so, we expose a context parameter to allow
adju
== Series Details ==
Series: GMBUS changes (rev4)
URL : https://patchwork.freedesktop.org/series/41632/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4163_full -> Patchwork_8962_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_8962_full need to
We'll use those helpers in the following commits. It's a good thing to
have them around as they need to apply a particular workaround on
Skylake.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/intel_lrc.c| 34 +
drivers/gpu/drm/i915/intel_ringbuffer.h |
If some of the contexts submitting workloads to the GPU have been
configured to shutdown slices/subslices, we might loose the NOA
configurations written in the NOA muxes. We need to reprogram them
when we detect a powergating configuration change.
In this change i915/perf is responsible for settin
From: Chris Wilson
We want to expose the ability to reconfigure the slices, subslice and
eu per context and per engine. To facilitate that, store the current
configuration on the context for each engine, which is initially set
to the device default upon creation.
v2: record sseu configuration pe
We would like to set a value on the associated engine in this helper
in a following commit.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/intel_guc_submission.c | 2 +-
drivers/gpu/drm/i915/intel_lrc.c| 10 +-
drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +-
This can be used to monitor the number of powergating transition
changes for a particular workload.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/intel_engine_cs.c | 3 +++
drivers/gpu/drm/i915/intel_lrc.c| 1 +
drivers/gpu/drm/i915/intel_ringbuffer.h | 6 ++
3 files cha
We don't need any special treatment on error so just return as soon as
possible.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf
From: Chris Wilson
Currently we only configure the power gating for Skylake and above, but
the configuration should equally apply to Broadwell and Braswell. Even
though, there is not as much variation as for later generations, we want
to expose control over the configuration to userspace and may
Hi all,
Another update following Chris' review (Thanks!).
A few more IGT tests to come to verify that interaction with perf.
Cheers,
Chris Wilson (3):
drm/i915: Program RPCS for Broadwell
drm/i915: Record the sseu configuration per-context & engine
drm/i915: Expose RPCS (SSEU) configurati
From: Chris Wilson
We want to allow userspace to reconfigure the subslice configuration for
its own use case. To do so, we expose a context parameter to allow
adjustment of the RPCS register stored within the context image (and
currently not accessible via LRI). If the context is adjusted before
== Series Details ==
Series: series starting with [1/5] drm/i915: Remove tasklet flush before disable
URL : https://patchwork.freedesktop.org/series/42950/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4163_full -> Patchwork_8963_full =
== Summary - WARNING ==
Minor unkn
On Wed, May 09, 2018 at 10:13:21AM +0300, Jani Nikula wrote:
> We've opted to use the maximum link rate and lane count for eDP panels,
> because typically the maximum supported configuration reported by the
> panel has matched the native resolution requirements of the panel, and
> optimizing the li
== Series Details ==
Series: drm/i915: per context slice/subslice powergating (rev3)
URL : https://patchwork.freedesktop.org/series/42285/
State : failure
== Summary ==
CHK include/config/kernel.release
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease
On Tue, May 08, 2018 at 04:39:45PM +0530, Nautiyal, Ankit K wrote:
> From: "Sharma, Shashank"
>
> HDMI 2.0/CEA-861-F introduces two new aspect ratios:
> - 64:27
> - 256:135
>
> This patch:
> - Adds new DRM flags for to represent these new aspect ratios.
> - Adds new cases to handle these aspec
Hi Dave,
This weeks fixes is a little busier than normal, due to the omap changes.
However since these aren't regressions, it shouldn't be something to be
concerned about.
drm-misc-fixes-2018-05-09:
atomic: Clear state pointers on clear (Ville)
vc4: Fix oops in dpi disable (Eric)
omap: Various
A single sed can do the job of taking the second line after a match and
it looks simpler.
Signed-off-by: Lucas De Marchi
---
I noticed this while reviewing "[PATCH 2/4] dim: shut up sed broken pipe
noise in apply-pull".
dim | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/di
1 - 100 of 129 matches
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