> -Original Message-
> From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com]
> Sent: Tuesday, April 10, 2018 12:53 PM
> To: Srinivas, Vidya ; intel-
> g...@lists.freedesktop.org
> Cc: Kamath, Sunil
> Subject: Re: [Intel-gfx] [PATCH v1 00/14] Preparation patches for NV12
>
>
On 4/10/2018 1:49 AM, Nikula, Jani wrote:
On Tue, 10 Apr 2018, Jani Nikula wrote:
On Mon, 09 Apr 2018, "Kumar, Abhay" wrote:
Dynamic cdclk is disabled in BIOS/GOP hence gop makes it to highest
clock i.e 316.8. Will attach logs with drm debug enabled in bug.
I am also inclined towards 192 wh
On Tue, 2018-04-10 at 15:28 -0700, Francisco Jerez wrote:
> Francisco Jerez writes:
>
[...]
> For the case anyone is wondering what's going on, Srinivas pointed me
> at
> a larger idle power usage increase off-list, ultimately caused by the
> low-latency heuristic as discussed in the paragraph
>-Original Message-
>From: De Marchi, Lucas
>Sent: Wednesday, April 11, 2018 9:37 AM
>To: Jani Nikula
>Cc: Shi, Yang A ; Chris Wilson
>;
>intel-gfx@lists.freedesktop.org; He, Bo ; Deak, Imre
>
>Subject: Re: [Intel-gfx] [PATCH 1/1] drm/i915: move audio component
>intialization
>before aud
On Tue, Apr 10, 2018 at 08:00:10PM -0700, Kumar, Abhay wrote:
>
>
> On 4/10/2018 1:49 AM, Nikula, Jani wrote:
> > On Tue, 10 Apr 2018, Jani Nikula wrote:
> >> On Mon, 09 Apr 2018, "Kumar, Abhay" wrote:
> >>> Dynamic cdclk is disabled in BIOS/GOP hence gop makes it to highest
> >>> clock i.e 316
On Mon, Apr 09, 2018 at 03:11:38PM -0700, Kumar, Abhay wrote:
>
>
> On 4/9/2018 3:33 AM, Ville Syrjälä wrote:
> > On Fri, Apr 06, 2018 at 04:47:08PM +0300, Jani Nikula wrote:
> >> On Thu, 05 Apr 2018, Abhay Kumar wrote:
> >>> In glk when device boots with 1366x768 panel, HDA codec doesn't comeup
101 - 106 of 106 matches
Mail list logo