DK, please start stable backport commit messages with:
commit b1e314462bba76660eec62760bb2e87f28f58866 upstream.
Referencing the upstream commit.
BR,
Jani.
On Thu, 29 Mar 2018, Dhinakaran Pandiyan wrote:
> If bios sets up an MST output and hardware state readout code sees this is
> an SST co
Hi,
Here's refreshed fixes for 4.17-rc1 with regression one removed,
contains a few fixes for vfio ioctl and dmabuf interface, properly
dma unmap for ggtt, etc.
thanks
--
The following changes since commit d8303075699292008ae5b2c8fc728d455b994c26:
drm/i915/gvt: force to set all context contro
Different LSPCON vendors specify their custom methods to pass
AVI infoframes to the LSPCON chip, so does Parade tech.
This patch adds functions to arrange and write AVI infoframes
into Parade LSPCON chips.
V2: rebase
V3: Added r-b from Maarten
V4: rebase
V5: rebase
V6: rebase
V7: Fixed checkpatch
LSPCON chips can generate YCBCR outputs, if asked nicely :).
In order to generate YCBCR 4:2:0 outputs, a source must:
- send YCBCR 4:4:4 signals to LSPCON
- program color space as 4:2:0 in AVI infoframes
Whereas for YCBCR 4:4:4 outputs, the source must:
- send YCBCR 4:4:4 signals to LSPCON
- prog
In order to pass AVI infoframes to LSPCON devices, a source has to
write them in a vendor recommended method and location.
This patch series:
- adds generic LSPCON infoframe setup functions.
- registers these functions into existing AVI infoframe framework.
- triggers these functions from modeset
This patch series adds YCBCR 4:2:0 output support for LSPCON displays.
In order to indicate the color format of output, to the LSPCON device,
a source has to set and send proper AVI infoframes to LSPCON. So this
patch series:
- introduces concept of CRTC output format.
- adds AVI infoframes support
This patch adds support for YCBCR 4:4:4 CRTC output format.
To do this, this patch extends the existing YCBCR 4:2:0
framework by:
- Adding new parameter in for YCBCR 4:4:4 enum crtc_iutput_format.
- Adding case for YCBCR 4:4:4 in while setting AVI infoframes.
- Adding necessary checks in modeset se
From: "Sharma, Shashank"
Intel LSPCON chip is provided by 2 vendors:
- Megachips America (MCA)
- Parade technologies (Parade tech)
Its important to know the vendor of this chip, as the address to
write AVI infoframes is different for those two.
This patch reads the vendor OUI signature, and mar
Currently, we are using a bool in CRTC state (state->ycbcr420),
to indicate modeset, that the output format is YCBCR 4:2:0. Now in
order to support other YCBCR formats, we will need more such flags.
This patch adds a new enum parameter for YCBCR 4:2:0 outputs, in the
CRTC output formats and then p
This patch adds an enum "intel_output_format" to represent
the output format of a particular CRTC. This enum will be
used to produce a RGB/YCBCR4:4:4/YCBCR4:2:0 output format
during the atomic modeset calculations.
V5:
- Created this separate patch to introduce and init output_format.
- Initialize
From: "Sharma, Shashank"
As LSPCON is a DP branch device, LSPCON vendors define
specific methods to pass AVI infoframes to the the chip.
This patch adds:
- a generic wrapper function for writing AVI infoframes for
all LSPCON devices.
- a vendor specific function to wrire AVI infoframes into
M
From: Tvrtko Ursulin
intel-gpu-top is a dangerous tool which can hang machines due unsafe mmio
register access. This patch rewrites it to use only PMU.
Only overall command streamer busyness and GPU global data such as power
and frequencies are included in this new version.
For access to more G
== Series Details ==
Series: GuC, HuC Loading Support for Cannonlake. (rev2)
URL : https://patchwork.freedesktop.org/series/41031/
State : failure
== Summary ==
Series 41031v2 GuC, HuC Loading Support for Cannonlake.
https://patchwork.freedesktop.org/api/1.0/series/41031/revisions/2/mbox/
---
On 29/03/2018 15:30, Eero Tamminen wrote:
Hi,
I tested this on HSW GT2, BYT, BDW GT3, SKL GT2 and KBL GT3e,
with Ubuntu 16.04 and 17.10, using Ubuntu default kernels (4.4 to 4.13)
and latest drm-tip build (4.16.0-rc7).
General comments
This will be used by our customers and
On 30/03/2018 20:15, Rinat Ibragimov wrote:
Четверг, 29 марта 2018, 21:46 +03:00 от Tvrtko Ursulin :
+#define engine_ptr(engines, n) \
+((struct engine *)((unsigned char *)(&engines->engine) + (n) * sizeof(struct
engine)))
I think (&engines->engine + (n)) is easier to read.
Absolutel
== Series Details ==
Series: YCBCR 4:2:0/4:4:4 output support for LSPCON (rev5)
URL : https://patchwork.freedesktop.org/series/36068/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
093f7ee765f1 drm/i915: Introduce CRTC output format
-:87: CHECK:PARENTHESIS_ALIGNMENT: Alignment s
== Series Details ==
Series: YCBCR 4:2:0/4:4:4 output support for LSPCON (rev5)
URL : https://patchwork.freedesktop.org/series/36068/
State : warning
== Summary ==
Series 36068v5 YCBCR 4:2:0/4:4:4 output support for LSPCON
https://patchwork.freedesktop.org/api/1.0/series/36068/revisions/5/mbox
From: Kevin Rogovin
Add the documentation of "DOC: User command execution" of
i915_gem_execbuffer.c into a new section in i915.rst.
Signed-off-by: Kevin Rogovin
---
Documentation/gpu/i915.rst | 6 ++
1 file changed, 6 insertions(+)
diff --git a/Documentation/gpu/i915.rst b/Documentation/g
From: Kevin Rogovin
Correct documentation of logical ring context implementation to note
that ringbuffer and backing store are created lazily for all context
types (driver global, local default context and local extra context).
Signed-off-by: Kevin Rogovin
---
drivers/gpu/drm/i915/intel_lrc.c
From: Kevin Rogovin
Note: I want to make a one or two follow-up series that provide
narration and potentially additional documentation for GUC submission
and the breadcrumbs.
v4:
Drop some details from narration to provide better focus.
(suggested/requested by Chris Wilson)
Spelling an
From: Kevin Rogovin
Add documentation to a number of the function pointer fields of
intel_engine_cs.
Signed-off-by: Kevin Rogovin
---
drivers/gpu/drm/i915/intel_ringbuffer.h | 29 +
1 file changed, 29 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer
From: Kevin Rogovin
Now that "DOC: User command execution" of i915_gem_execbuffer.c is included
in the i915.rst, it is benecifial (for new developers) to read what happens
at the bottom of the driver stack (in terms of bytes written to be read
by the GPU) when processing a user-space batchbuffer.
From: Kevin Rogovin
Add a narration to i915.rst about Intel GEN GPU's: engines,
driver context and relocation.
Signed-off-by: Kevin Rogovin
---
Documentation/gpu/i915.rst | 116
drivers/gpu/drm/i915/i915_vma.h | 10 ++--
2 files changed, 100 inser
Chris Wilson writes:
> We would like to start doing some bookkeeping at the beginning, between
> contexts and at the end of execlists submission. We already mark the
> beginning and end using EXECLISTS_ACTIVE_USER, to provide an indication
> when the HW is idle. This give us a pair of sequence po
Quoting Francisco Jerez (2018-04-02 17:32:20)
> Chris Wilson writes:
>
> > We would like to start doing some bookkeeping at the beginning, between
> > contexts and at the end of execlists submission. We already mark the
> > beginning and end using EXECLISTS_ACTIVE_USER, to provide an indication
>
From: Tvrtko Ursulin
Reset and unwedge stress testing is supposed to trigger wedging or resets
at incovenient times and then re-use the context so either the context or
driver tracking might get confused and break.
v2:
* Renamed for more sensible naming.
* Added some comments to explain what t
== Series Details ==
Series: GuC, HuC Loading Support for Cannonlake. (rev2)
URL : https://patchwork.freedesktop.org/series/41031/
State : failure
== Summary ==
Possible new issues:
Test core_auth:
Subgroup basic-auth:
pass -> SKIP (shard-snb)
Quoting Tvrtko Ursulin (2018-04-03 12:36:44)
> From: Tvrtko Ursulin
>
> Reset and unwedge stress testing is supposed to trigger wedging or resets
> at incovenient times and then re-use the context so either the context or
> driver tracking might get confused and break.
>
> v2:
> * Renamed for m
Quoting kevin.rogo...@intel.com (2018-04-03 13:52:23)
> From: Kevin Rogovin
>
> Add a narration to i915.rst about Intel GEN GPU's: engines,
> driver context and relocation.
>
> Signed-off-by: Kevin Rogovin
I'm still bummed by the long lines in the bulleted list, but regardless:
Reviewed-by: J
Quoting Steven Rostedt (2018-04-02 16:17:36)
> On Fri, 30 Mar 2018 16:01:31 +0100
> Chris Wilson wrote:
>
> > Across suspend, we may see a very large drift in timestamps if the sched
> > clock is unstable, prompting the global trace's ringbuffer code to warn
> > and suggest switching to the globa
Quoting kevin.rogo...@intel.com (2018-04-03 13:52:24)
> From: Kevin Rogovin
>
> Now that "DOC: User command execution" of i915_gem_execbuffer.c is included
> in the i915.rst, it is benecifial (for new developers) to read what happens
> at the bottom of the driver stack (in terms of bytes written
Quoting kevin.rogo...@intel.com (2018-04-03 13:52:25)
> From: Kevin Rogovin
>
> Add the documentation of "DOC: User command execution" of
> i915_gem_execbuffer.c into a new section in i915.rst.
>
> Signed-off-by: Kevin Rogovin
Reviewed-by: Joonas Lahtinen
Regards, Joonas
== Series Details ==
Series: Documentation patch for batchbuffer submission (rev4)
URL : https://patchwork.freedesktop.org/series/38433/
State : failure
== Summary ==
Applying: i915.rst: Narration overview on GEM + minor reorder to improve
narration
error: Failed to merge in the changes.
Usin
== Series Details ==
Series: Add NV12 support (rev7)
URL : https://patchwork.freedesktop.org/series/39670/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
028f935bfc8a drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
c37c92d65c7c drm/i915/skl+: refactor WM calculation
From: Tvrtko Ursulin
Realtime scheduling interferes with execlists submission (tasklet) so try
to simplify the PWM loop in a few ways:
* Drop RT.
* Longer batches for smaller systematic error.
* More truthful test duration calculation.
* Less clock queries.
* No self-adjust - instead just r
== Series Details ==
Series: Add NV12 support (rev7)
URL : https://patchwork.freedesktop.org/series/39670/
State : success
== Summary ==
Series 39670v7 Add NV12 support
https://patchwork.freedesktop.org/api/1.0/series/39670/revisions/7/mbox/
fi-bdw-5557u total:285 pass:264 dwarn:0 dfa
Quoting Tvrtko Ursulin (2018-04-03 13:38:25)
> From: Tvrtko Ursulin
>
> Realtime scheduling interferes with execlists submission (tasklet) so try
> to simplify the PWM loop in a few ways:
>
> * Drop RT.
> * Longer batches for smaller systematic error.
> * More truthful test duration calculati
Quoting kevin.rogo...@intel.com (2018-04-03 13:52:27)
> From: Kevin Rogovin
>
> Add documentation to a number of the function pointer fields of
> intel_engine_cs.
>
> Signed-off-by: Kevin Rogovin
> ---
> drivers/gpu/drm/i915/intel_ringbuffer.h | 29 +
> 1 file chang
On Tue, 03 Apr 2018, Joonas Lahtinen wrote:
> Quoting kevin.rogo...@intel.com (2018-04-03 13:52:23)
>> From: Kevin Rogovin
>>
>> Add a narration to i915.rst about Intel GEN GPU's: engines,
>> driver context and relocation.
>>
>> Signed-off-by: Kevin Rogovin
>
> I'm still bummed by the long lin
kevin.rogo...@intel.com writes:
> From: Kevin Rogovin
>
> Add a narration to i915.rst about Intel GEN GPU's: engines,
> driver context and relocation.
>
> Signed-off-by: Kevin Rogovin
> ---
> Documentation/gpu/i915.rst | 116
>
> drivers/gpu/drm/i9
Hi,
On 03.04.2018 12:36, Tvrtko Ursulin wrote:
On 29/03/2018 15:30, Eero Tamminen wrote:
I tested this on HSW GT2, BYT, BDW GT3, SKL GT2 and KBL GT3e,
with Ubuntu 16.04 and 17.10, using Ubuntu default kernels (4.4 to 4.13)
and latest drm-tip build (4.16.0-rc7).
General comments
--
From: Tomas Winkler
Whitelist HDCP client for in kernel drm use
v2:
Rebased.
v3:
No changes.
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/bus-fixup.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/misc/mei/bus-fixup.c b/drivers/misc/mei/bus-fixup.c
inde
This patch defines the hdcp2.2 protocol messages for the
HDCP2.2 authentication.
v2:
bit_fields are removed. Instead bitmasking used. [Tomas and Jani]
prefix HDCP_2_2_ is added to the macros. [Tomas]
v3:
No Changes.
Signed-off-by: Ramalingam C
---
include/drm/drm_hdcp.h | 183
The sequence for HDCP2.2 authentication and encryption is implemented
in I915. Encoder specific implementations are moved into hdcp_shim.
Intel HWs supports HDCP2.2 through ME FW. Hence this series
introduces a client driver for mei bus, so that for HDCP2.2
authentication, HDCP2.2 stack in I915 ca
Request ME FW to start the HDCP2.2 session for a intel port.
Prepares payloads for command WIRED_INITIATE_HDCP2_SESSION and sent
to ME FW.
On Success, ME FW will start a HDCP2.2 session for the port and
provides the content for HDCP2.2 AKE_Init message.
v2:
Rebased.
v3:
cldev is add as a sepa
In preparation for implementing HDCP2.2 in I915, this patch adds
HDCP register definitions for HDMI and DP HDCP adaptations.
HDMI specific HDCP2.2 register definitions are added into drm_hdcp.h,
where are HDCP2.2 register offsets in DPCD offsets are defined at
drm_dp_helper.h.
v2:
bit_field def
ME FW is contributes a vital role in HDCP2.2 authentication.
HDCP2.2 driver needs to communicate to ME FW for each step of the
HDCP2.2 authentication.
ME FW prepare and HDCP2.2 authentication parameters and encrypt them
as per spec. With such parameter Driver prepares HDCP2.2 auth messages
and co
Notifier Chain is defined to inform all its clients about the mei
client device state change. Routine is defined for the clients to
register and unregister for the notification on state change.
v2:
Rebased.
v3:
Notifier chain is adopted for cldev state update [Tomas]
Signed-off-by: Ramalingam
Data structures and Enum for the I915-MEI_HDCP interface are defined
at
v2:
Rebased.
v3:
mei_cl_device is removed from mei_hdcp_data [Tomas]
Signed-off-by: Ramalingam C
---
include/linux/mei_hdcp.h | 70
1 file changed, 70 insertions(+)
dif
Defines the HDCP specific ME FW interfaces such as Request CMDs,
payload structure for CMDs and their response status codes.
This patch defines payload size(Excluding the Header)for each WIRED
HDCP2.2 CMDs.
v2:
Rebased.
v3:
Extra comments are removed.
Signed-off-by: Ramalingam C
---
driver
Requests for verification for receiver certification and also the
preparation for next AKE auth message with km.
On Success ME FW validate the HDCP2.2 receivers certificate and do the
revocation check on the receiver ID. AKE_Stored_Km will be prepared if
the receiver is already paired, else AKE_No
Requests for the verifcation of AKE_Send_H_prime.
ME will calculation the H and comparing it with received H_Prime.
Here AKE_Send_H_prime is a HDCP2.2 Authentication msg.
v2:
Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comments and cast are removed [Tomas]
Signed-off-
Request to ME to prepare the encrypted session key.
On Success, ME provides Encrypted session key. Functions populates
the HDCP2.2 authentication msg SKE_Send_Eks.
v2:
Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comments and cast are removed [Tomas]
Signed-off-by: Ram
Provides Pairing info to ME to store.
Pairing is a process to fast track the subsequent authentication
with the same HDCP sink.
On Success, received HDCP pairing info is stored in non-volatile
memory of ME.
v2:
Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comments and
Intel HDCP2.2 registers are defined with addr offsets and bit details.
v2:
Replaced the arith calc with _PICK [Sean Paul]
v3:
No changes.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/i915_reg.h | 32
1 file changed, 32 insertions(+)
diff --git a/dri
Request to ME to configure a port as authenticated.
On Success, ME FW will mark th eport as authenticated and provides
HDCP chiper of the port with the encryption keys.
Enabling the Authentication can be requested once the all
stages of HDCP2.2 authentication is completed by interating with
ME FW
Request the ME to terminate the HDCP2.2 session for a port.
On Success, ME FW will mark the intel port as Deauthenticated and
terminate the wired HDCP2.2 Tx session started due to the cmd
WIRED_INITIATE_HDCP2_SESSION.
v2:
Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant com
Adds the wrapper for all mei hdcp2.2 service functions.
v2:
Rebased.
v3:
cldev is moved from mei_hdcp_data to hdcp.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_hdcp.c | 194 ++
1 file changed, 194 insertions(+)
diff --git a/drivers/gpu/drm
Requests ME to start the second stage of HDCP2.2 authentication,
called Locality Check.
On Success, ME FW will provide LC_Init message to send to hdcp sink.
v2:
Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comments and cast are removed [Tomas]
Signed-off-by: Ramalingam
Request ot ME to verify the downatream topology information received.
ME FW will validate the Repeaters receiver id list and
downstream topology.
On Success ME FW will provide the Least Significant
128bits of VPrime, which forms the repeater ack.
v2:
Rebased.
v3:
cldev is passed as first par
Request to ME to verify the LPrime received from HDCP sink.
On Success, ME FW will verify the received Lprime by calculating and
comparing with L.
This represents the completion of Locality Check.
v2:
Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comments and cast are r
Considering the upcoming significant no HDCP2.2 variables, it will
be clean to have separate struct fo HDCP.
New structure called intel_hdcp is introduced.
v2:
struct hdcp statically allocated. [Sean Paul]
enable and disable function parameters are retained.[Sean Paul]
v3:
No Changes.
Sign
Request to ME to verify the M_Prime received from the HDCP sink.
ME FW will calculate the M and compare with M_prime received
as part of RepeaterAuth_Stream_Ready, which is HDCP2.2 protocol msg.
On successful completion of this stage, downstream propagation of
the stream management info is comple
For upcoming implementation of HDCP2.2 in I915, important variable
required for HDCP2.2 are defined.
HDCP_shim is extended to support encoder specific HDCP2.2 flows.
v2:
1.4 shim is extended to support hdcp2.2. [Sean Paul]
platform's/panel's hdcp ver capability is removed. [Sean Paul]
mei r
Implements HDCP2.2 authentication for hdcp2.2 receivers, with
following steps:
Authentication and Key enchange (AKE).
Locality Check (LC).
Session Key Exchange(SKE).
DP Errata for stream type confuguration for receivers.
At AKE, the HDCP Receiver’s public key certif
Implements the enable and disable functions for HDCP2.2 encryption
of the PORT.
v2:
intel_wait_for_register is used instead of wait_for. [Chris Wilson]
v3:
No Changes.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_hdcp.c | 54 +++
1 file chan
Implements the HDCP2.2 repeaters authentication steps such as verifying
the downstream topology and sending stream management information.
v2:
Rebased.
v3:
No Changes.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_hdcp.c | 135 ++
1 file chan
Implements a sequence of enabling and disabling the HDCP2.2
(auth and encryption).
v2:
Rebased.
v3:
No Changes.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_hdcp.c | 75 +++
1 file changed, 75 insertions(+)
diff --git a/drivers/gpu/drm/i915
Implements the link integrity check once in 500mSec.
Once encryption is enabled, an ongoing Link Integrity Check is
performed by the HDCP Receiver to check that cipher synchronization
is maintained between the HDCP Transmitter and the HDCP Receiver.
On the detection of synchronization lost, the H
When repeater notifies a downstream topology change, this patch
reauthenticate the repeater alone with out disabling the hdcp
encryption. If that fails then complete reauthentication is executed.
v2:
Rebased.
v3:
No Changes.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_hdcp.c
As a preparation for making the intel_hdcp_enable as common function
for both HDCP1.4 and HDCP2.2, HDCP1.4 check_link scheduling is moved
into _intel_hdcp_enable() function.
v3:
No Changes.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_hdcp.c | 11 +++
1 file changed, 7 i
Initialize HDCP2.2 support. This includes the mei interface
initialization along with required notifier registration.
v2:
mei interface handle is protected with mutex. [Chris Wilson]
v3:
Notifiers are used for the mei interface state.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/int
For reusability purpose, this patch implements the hdcp1.4 bksv's
read and validation as a functions.
For detecting the HDMI panel's HDCP capability this fucntions will be
used.
v2:
Rebased.
v3:
No Changes.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_hdcp.c | 38
Considering that HDCP2.2 is more secure than HDCP1.4, When a setup
supports HDCP2.2 and HDCP1.4, HDCP2.2 will be enabled.
v2:
Included few optimization suggestions [Chris Wilson]
Commit message is updated as per the rebased version.
v3:
No changes.
Signed-off-by: Ramalingam C
---
drivers/
HDCP check link is invoked only on CP_IRQ detection, instead of all
short pulses.
v3:
No Changes.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_dp.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915
When HDCP2.2 enabling fails and HDCP1.4 is supported, HDCP1.4 is
enabled.
v2:
Rebased.
v3:
No Changes.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_hdcp.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_hdcp.c
b/drivers/gpu/dr
On DP HDCP1.4 and 2.2, when CP_IRQ is received, start the link
integrity check for the HDCP version that is enabled.
v2:
Rebased. Function name is changed.
v3:
No Changes.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_dp.c | 2 +-
drivers/gpu/drm/i915/intel_drv.h | 2 +-
d
Implements a interface for single burst read of data that is larger
than 512 Bytes through gmbus.
HDCP2.2 spec expects HDCP2.2 transmitter to read 522Bytes of HDCP
receiver certificates in single burst read. On gmbus, to read more
than 511Bytes, HW provides a workaround for burst read.
This patch
Implements the HDMI adapatation specific HDCP2.2 operations.
Basically these are DDC read and write for authenticating through
HDCP2.2 messages.
v2:
Rebased.
v3:
No Changes.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_hdmi.c | 203 ++
1 fi
Implements the DP adaptation specific HDCP2.2 functions.
These functions perform the DPCD read and write for communicating the
HDCP2.2 auth message back and forth.
Note: Chris Wilson suggested alternate method for waiting for CP_IRQ,
than completions concept. WIP to understand and implement that,
On DP connector init, intel_hdcp_init is passed with a flag for hdcp2.2
support based on the platform capability.
v2:
Rebased.
v3:
No Changes.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_dp.c | 2 +-
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_hdcp.c
On HDMI connector init, intel_hdcp_init is passed with a flag for hdcp2.2
support based on the platform capability.
v2:
Rebased.
v3:
No Changes.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_hdmi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gp
== Series Details ==
Series: drm/i915: Implement HDCP2.2 (rev3)
URL : https://patchwork.freedesktop.org/series/38254/
State : failure
== Summary ==
CHK include/config/kernel.release
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease.h
CHK include/
HI,
-Original Message-
From: Joonas Lahtinen [mailto:joonas.lahti...@linux.intel.com]
- snip -
>>
>> void(*set_default_submission)(struct intel_engine_cs
>> *engine);
>>
>> + /* In addition to pinning the context, returns the intel_ringbuffer
>> +
== Series Details ==
Series: Add NV12 support (rev7)
URL : https://patchwork.freedesktop.org/series/39670/
State : failure
== Summary ==
Possible new issues:
Test gem_linear_blits:
Subgroup normal:
pass -> INCOMPLETE (shard-hsw)
Test kms_draw_crc:
Su
HI,
Clear idea if caused by changes?
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
> Patchwork
> Sent: tiistai 3. huhtikuuta 2018 18.06
> To: Srinivas, Vidya
> Cc: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] ✗ Fi.CI.IGT:
On Tue, Apr 03, 2018 at 07:27:18PM +0530, Ramalingam C wrote:
> Notifier Chain is defined to inform all its clients about the mei
> client device state change. Routine is defined for the clients to
> register and unregister for the notification on state change.
>
> v2:
> Rebased.
> v3:
> Notif
On 03/04/2018 14:10, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-04-03 13:38:25)
From: Tvrtko Ursulin
Realtime scheduling interferes with execlists submission (tasklet) so try
to simplify the PWM loop in a few ways:
* Drop RT.
* Longer batches for smaller systematic error.
* More
Quoting Tvrtko Ursulin (2018-04-03 17:09:09)
>
> On 03/04/2018 14:10, Chris Wilson wrote:
> > To me it seems like the closed system with each loop being "spin then
> > adjusted sleep" will autocorrect and more likely to finish correct (as
> > we are less reliant on the next loop for the accuracy).
From: Tvrtko Ursulin
Realtime scheduling interferes with execlists submission (tasklet) so try
to simplify the PWM loop in a few ways:
* Drop RT.
* Longer batches for smaller systematic error.
* More truthful test duration calculation.
* Less clock queries.
* No self-adjust - instead just r
On Tue, Apr 03, 2018 at 07:27:49PM +0530, Ramalingam C wrote:
> Implements a interface for single burst read of data that is larger
> than 512 Bytes through gmbus.
>
> HDCP2.2 spec expects HDCP2.2 transmitter to read 522Bytes of HDCP
> receiver certificates in single burst read. On gmbus, to read
On 03/04/2018 15:06, Eero Tamminen wrote:
Hi,
On 03.04.2018 12:36, Tvrtko Ursulin wrote:
On 29/03/2018 15:30, Eero Tamminen wrote:
I tested this on HSW GT2, BYT, BDW GT3, SKL GT2 and KBL GT3e,
with Ubuntu 16.04 and 17.10, using Ubuntu default kernels (4.4 to 4.13)
and latest drm-tip build (4.
On Mon, Apr 02, 2018 at 03:11:54PM -0700, Souza, Jose wrote:
> On Mon, 2018-04-02 at 11:20 -0700, Rodrigo Vivi wrote:
> > On Fri, Mar 30, 2018 at 03:23:31PM -0700, José Roberto de Souza
> > wrote:
> > > intel_psr_activate_block_get() should be called when by some reason
> > > PSR should not be acti
== Series Details ==
Series: HDCP1.4 fixes (rev5)
URL : https://patchwork.freedesktop.org/series/38978/
State : success
== Summary ==
Series 38978v5 HDCP1.4 fixes
https://patchwork.freedesktop.org/api/1.0/series/38978/revisions/5/mbox/
Known issues:
Test gem_mmap_gtt:
Subgroup b
On Tue, Apr 03, 2018 at 10:27:16AM +0300, Jani Nikula wrote:
>
> DK, please start stable backport commit messages with:
>
> commit b1e314462bba76660eec62760bb2e87f28f58866 upstream.
Thank you for that, it helped me figure this out...
greg k-h
___
Inte
After a discussion with Wily I got the nagging feeling we might have
some cases of nasty busy loops. The window is fairly small since we
always have a non-faulting fastpath (using page_fault_dis|enable())
first, usually followed by a pile of pending signal checks, before we
go into the slowpath cop
On Fri, Mar 30, 2018 at 03:23:29PM -0700, José Roberto de Souza wrote:
> It is not necessary as is possible to get the pipe information
> from intel_dp.
>
> Signed-off-by: José Roberto de Souza
> Cc: Dhinakaran Pandiyan
> Cc: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/i915_drv.h | 3 +--
> dr
On Tue, 2018-04-03 at 19:40 +0200, Greg KH wrote:
> On Tue, Apr 03, 2018 at 10:27:16AM +0300, Jani Nikula wrote:
> >
> > DK, please start stable backport commit messages with:
> >
> > commit b1e314462bba76660eec62760bb2e87f28f58866 upstream.
Got it, I'll do that next time onwards since Greg to
After a discussion with Wily I got the nagging feeling we might have
some cases of nasty busy loops. The window is fairly small since we
always have a non-faulting fastpath (using page_fault_dis|enable())
first, usually followed by a pile of pending signal checks, before we
go into the slowpath cop
== Series Details ==
Series: drm/i915: WARN if we hit a signal from kernel context
URL : https://patchwork.freedesktop.org/series/41082/
State : warning
== Summary ==
Series 41082v1 drm/i915: WARN if we hit a signal from kernel context
https://patchwork.freedesktop.org/api/1.0/series/41082/rev
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