== Series Details ==
Series: ICL display initialization, selected patches (rev3)
URL : https://patchwork.freedesktop.org/series/37668/
State : warning
== Summary ==
Series 37668v3 ICL display initialization, selected patches
https://patchwork.freedesktop.org/api/1.0/series/37668/revisions/3/mb
Quoting Imre Deak (2018-02-06 18:20:07)
> FORCEWAKE_ACK is depricated by BSpec at least starting from BDW,
> referring to the multi-threaded version of it instead. Accessing
> FORCEWAKE_ACK triggers an unclaimed register access error - at
> least on GLK - see the Reference: below.
>
> As opposed t
From: Ville Syrjälä
Check that userspace isn't passing in garbage in the colorkey
ioctl flags.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_sprite.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_sprite.c
b/drivers/gpu/drm/i915/intel_sprite.c
== Series Details ==
Series: drm/i915: Reject undefined colorkey flags
URL : https://patchwork.freedesktop.org/series/37764/
State : success
== Summary ==
Series 37764v1 drm/i915: Reject undefined colorkey flags
https://patchwork.freedesktop.org/api/1.0/series/37764/revisions/1/mbox/
fi-bdw-5
Quoting Tvrtko Ursulin (2018-02-06 18:33:11)
> From: Tvrtko Ursulin
>
> We are not allowed to call intel_runtime_pm_get from the PMU counter read
> callback since the former can sleep, and the latter is running under IRQ
> context.
>
> To workaround this, we record the last known RC6 and while r
On Tue, 06 Feb 2018 06:15:54 +0100, Sagar Arun Kamble
wrote:
On 2/6/2018 5:32 AM, Jackie Li wrote:
intel_guc_reg.h should only include definition for GuC registers and
related register bits. Non-register related GuC WOPCM macro definitions
should not be defined in intel_guc_reg.h
This patc
Quoting Ville Syrjala (2018-02-06 20:43:33)
> From: Ville Syrjälä
>
> Check that userspace isn't passing in garbage in the colorkey
> ioctl flags.
>
> Signed-off-by: Ville Syrjälä
I think we can retrospectively apply this filter. Afaict, only the ddx
ever hooked up this interface.
Reviewed-by
== Series Details ==
Series: drm/i915: Reject undefined colorkey flags
URL : https://patchwork.freedesktop.org/series/37764/
State : success
== Summary ==
Test perf:
Subgroup enable-disable:
fail -> PASS (shard-apl) fdo#103715
Subgroup buffer-fill:
Hi Rafael,
On Tue, Feb 06, 2018 at 09:11:02PM +, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2018-02-06 18:33:11)
> > From: Tvrtko Ursulin
> >
> > We are not allowed to call intel_runtime_pm_get from the PMU counter read
> > callback since the former can sleep, and the latter is running un
On Tue, 06 Feb 2018 07:20:41 +0100, Sagar Arun Kamble
wrote:
change looks good to me. minor updates suggested with r-b.
On 2/6/2018 5:32 AM, Jackie Li wrote:
Hardware may have specific restrictions on GuC WOPCM offset and size. On
Gen9, the value of the GuC WOPCM size register needs to be
On Tue, 06 Feb 2018 07:31:06 +0100, Sagar Arun Kamble
wrote:
On 2/6/2018 5:32 AM, Jackie Li wrote:
CNL has its own specific reserved GuC WOPCM size and hardware
restrictions
on GuC WOPCM size. On CNL A0 and Gen9, there's a hardware restriction
that
requires the available GuC WOPCM size
On Tue, 06 Feb 2018 07:39:27 +0100, Sagar Arun Kamble
wrote:
On 2/6/2018 5:32 AM, Jackie Li wrote:
GuC WOPCM registers are write-once registers. Current driver code
accesses
these registers without checking the accessibility to these registers,
this
will lead unpredictable driver behavi
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104676
Signed-off-by: Chris Wilson
---
lib/igt_gt.c| 1 +
tests/gem_eio.c | 77 +++--
2 files changed, 43 insertions(+), 35 deletions(-)
diff --git a/lib/igt_gt.c b/lib/igt_gt.c
index
On Fri, 2018-02-02 at 21:12 -0800, Dhinakaran Pandiyan wrote:
> 570e86963a51 ("drm: Widen vblank count to 64-bits [v3]") changed the
> return type for drm_crtc_vblank_count() to u64. This could cause
> potential problems if the return value is used in arithmetic operations
> with a 32-bit reference
On Wed, 2018-01-31 at 22:56 -0800, Rodrigo Vivi wrote:
> On Sat, Jan 27, 2018 at 02:49:15AM +, Dhinakaran Pandiyan wrote:
> > There is no corresponding invalidate call before the buffer is written
> > to, this results in screen freezing sometime after switching to console
> > mode with PSR enab
Hi Maarten
Sorry, my bad. This was a wrong push from my end. I have changed the tag to Not
applicable.
Apologies.
Have sent out the NV12 series separately.
Regards
Vidya
> -Original Message-
> From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com]
> Sent: Tuesday, February
On 2018.02.06 11:45:04 -0800, Rodrigo Vivi wrote:
>
> Hi Zhi,
>
> Daniel asked few weeks ago about the scripts that you run there,
> but I didn't see any follow-up.
>
> I don't understand why yet, but apparently gvt pull request
> is not going to patchwork so dim is not able to add the "Link:"
>
On 02/05/2018 10:39 PM, Sagar Arun Kamble wrote:
+/**
+ * intel_guc_wopcm_init_hw() - Setup GuC WOPCM registers.
+ * @guc: intel guc.
+ *
+ * Setup the GuC WOPCM size and offset registers with the stored
values. It will
+ * also check the registers locking status to determine whether
these re
On 02/06/2018 01:11 PM, Michal Wajdeczko wrote:
On Tue, 06 Feb 2018 06:15:54 +0100, Sagar Arun Kamble
wrote:
On 2/6/2018 5:32 AM, Jackie Li wrote:
intel_guc_reg.h should only include definition for GuC registers and
related register bits. Non-register related GuC WOPCM macro definitions
s
On 02/06/2018 02:56 PM, Michal Wajdeczko wrote:
+ /* Explicitly cast the return value to bool. */
+ return !!(I915_READ(reg) & GUC_WOPCM_REG_LOCKED);
you should avoid reusing bits defined for one register in others
it's a common bit. use BIT(0) instead?
+ offset &= DMA_GUC_WOP
On 02/06/2018 02:25 PM, Michal Wajdeczko wrote:
default_desc_template(dev_priv, dev_priv->mm.aliasing_ppgtt);
- /* GuC requires the ring to be placed above GUC_WOPCM_TOP. If
GuC is not
+ /*
+ * GuC requires the ring to be placed above GuC WOPCM top. If
GuC is not
* prese
Zhenyu Wang writes:
> On 2018.02.06 11:45:04 -0800, Rodrigo Vivi wrote:
>>
>> Hi Zhi,
>>
>> Daniel asked few weeks ago about the scripts that you run there,
>> but I didn't see any follow-up.
>>
>> I don't understand why yet, but apparently gvt pull request
>> is not going to patchwork so dim
== Series Details ==
Series: series starting with [01/10] drm/vblank: Data type fixes for 64-bit
vblank sequences.
URL : https://patchwork.freedesktop.org/series/37598/
State : warning
== Summary ==
Series 37598v1 series starting with [01/10] drm/vblank: Data type fixes for
64-bit vblank seq
101 - 123 of 123 matches
Mail list logo