On 10/9/2017 8:39 PM, Imre Deak wrote:
On Sat, Oct 07, 2017 at 09:33:09AM +0100, Chris Wilson wrote:
Quoting Sagar Arun Kamble (2017-10-07 08:07:23)
With GuC based SLPC, frequency control will be moved to GuC and Host will
continue to control RC6 and LLC ring frequency setup. This needs separ
On Tue, 03 Oct 2017, Madhav Chauhan wrote:
> This patch parse DSI backlight/cabc ports info from
> VBT and save them inside local strucutre. This saved info
> can be directly used while initializing DSI for different
> platforms instead of parsing for each platform.
>
> Signed-off-by: Madhav Chauh
On Tue, 03 Oct 2017, Madhav Chauhan wrote:
> This patch re-use already parsed DSI backlight/cabc ports
> info for saving it inside struct intel_dsi rather than
> parsing it at the time of DSI initialization.
>
> Signed-off-by: Madhav Chauhan
With the initialization of dl_dcs_backlight_ports and
On 10 October 2017 at 16:57, Dave Airlie wrote:
> On 1 October 2017 at 13:52, wrote:
>> From: Keith Packard
>>
>> Validate that the leasing API creates leases that allow access to a
>> subset of the available resources and that lease revocation works.
>
> These don't test the GET and LIST_LEASE
== Series Details ==
Series: drm/i915: Miscellaneous fixes to reduce dependency for I915_MAX_PIPES
URL : https://patchwork.freedesktop.org/series/30336/
State : success
== Summary ==
Series 30336v1 drm/i915: Miscellaneous fixes to reduce dependency for
I915_MAX_PIPES
https://patchwork.freedes
All our mmio writes take forever with lockdep due to the constant
lock acquire&dropping we do. Ville has some patches to only acquire
the mmio spinlocks once instead for every single mmio, but those
aren't ready yet.
As an interim solution just extend our budget slightly when lockdep is
enabled, t
On Tue, Oct 10, 2017 at 10:46:57AM +0200, Daniel Vetter wrote:
> All our mmio writes take forever with lockdep due to the constant
> lock acquire&dropping we do. Ville has some patches to only acquire
> the mmio spinlocks once instead for every single mmio, but those
> aren't ready yet.
>
> As an
This improves the GEM tests section of I-G-T to make it more
suitable for CI testing
Cc: Joonas Lahtinen
Signed-off-by: Abdiel Janulgue
---
tests/Makefile.sources | 3 -
tests/gem_hangcheck_forcewake.c | 123 --
tests/gem_pin.c | 248 -
tes
== Series Details ==
Series: drm/i915: Increase atomic update vblank evasion time with lockdep
URL : https://patchwork.freedesktop.org/series/31630/
State : success
== Summary ==
Series 31630v1 drm/i915: Increase atomic update vblank evasion time with lockdep
https://patchwork.freedesktop.org/
On Thu, Sep 14, 2017 at 10:53:03AM +0300, Mika Kahola wrote:
> From: "Kahola, Mika"
>
> Remove dependency for I915_MAX_PIPES by replacing it with
> for_each_pipe() macro.
>
> Signed-off-by: Ramalingam C
> Signed-off-by: Kahola, Mika
> ---
> drivers/gpu/drm/i915/intel_display.c | 5 -
> dr
On Mon, Oct 09, 2017 at 07:33:49PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Asking for the initial vblank count by specifying and absolute vblank count
> of 0
> doesn't make much sense. Switch to a relative query instead.
>
> Signed-off-by: Ville Syrjälä
> ---
> tests/kms_setmode
On Thu, Sep 14, 2017 at 10:53:05AM +0300, Mika Kahola wrote:
> Favor for_each_pipe() macro when looping through pipes.
>
> Signed-off-by: Mika Kahola
> ---
> drivers/gpu/drm/i915/intel_pipe_crc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel
All our mmio writes take forever with lockdep due to the constant
lock acquire&dropping we do. Ville has some patches to only acquire
the mmio spinlocks once instead for every single mmio, but those
aren't ready yet.
As an interim solution just extend our budget slightly when lockdep is
enabled, t
On Thu, Sep 14, 2017 at 10:53:01AM +0300, Mika Kahola wrote:
> This patch series introduces fixes to reduce dependency for
> I915_MAX_PIPES and minor optimizations to reduce hardcoding.
>
> Kahola, Mika (1):
> drm/i915: Remove I915_MAX_PIPES dependency for DDB allocation
>
> Mika Kahola (4):
>
On Thursday, September 14, 2017 12:53:01 AM PDT Mika Kahola wrote:
> This patch series introduces fixes to reduce dependency for
> I915_MAX_PIPES and minor optimizations to reduce hardcoding.
>
> Kahola, Mika (1):
> drm/i915: Remove I915_MAX_PIPES dependency for DDB allocation
>
> Mika Kahola (
Quoting Daniel Vetter (2017-10-09 17:44:01)
> stop_machine is not really a locking primitive we should use, except
> when the hw folks tell us the hw is broken and that's the only way to
> work around it.
>
> This patch tries to address the locking abuse of stop_machine() from
>
> commit 20e4933c
On Tue, 2017-10-10 at 12:19 +0300, Ville Syrjälä wrote:
> On Thu, Sep 14, 2017 at 10:53:01AM +0300, Mika Kahola wrote:
> >
> > This patch series introduces fixes to reduce dependency for
> > I915_MAX_PIPES and minor optimizations to reduce hardcoding.
> >
> > Kahola, Mika (1):
> > drm/i915: Rem
On Tue, Oct 10, 2017 at 11:16:23AM +0200, Daniel Vetter wrote:
> On Mon, Oct 09, 2017 at 07:33:49PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Asking for the initial vblank count by specifying and absolute vblank count
> > of 0
> > doesn't make much sense. Switch to a relative q
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
scripts/media-bench.pl | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/scripts/media-bench.pl b/scripts/media-bench.pl
index 0956ef0a0621..78f45199e95d 100755
--- a/scripts/media-bench.pl
+++ b/scripts/media-bench.p
From: Tvrtko Ursulin
1.
Fixes for intel-gpu-overlay to work on top of the proposed i915 PMU perf API.
2.
New test to exercise the same API.
3.
Update to gem_wsim and media-bench.pl to be able to use engine busyness via PMU
for making balancing decisions.
v2:
* Added gem_wsim and media-bench.p
From: Tvrtko Ursulin
A bunch of tests for the new i915 PMU feature.
Parts of the code were initialy sketched by Dmitry Rogozhkin.
v2: (Most suggestions by Chris Wilson)
* Add new class/instance based engine list.
* Add gem_has_engine/gem_require_engine to work with class/instance.
* Use the
From: Tvrtko Ursulin
Add busy and busy-avg balancers which make balancing decisions by looking
at engine busyness via the i915 PMU.
And thus are able to make decisions on the actual instantaneous load of
the system, and not use metrics that lag behind by a batch or two. In
doing so, each client
From: Tvrtko Ursulin
v2: Update for i915 changes.
v3: Use 1eN for large numbers. (Chris Wilson)
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson
---
lib/igt_perf.h | 89 +---
overlay/gem-interrupts.c | 2 +-
overlay/gpu-freq.c
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
overlay/gem-interrupts.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/overlay/gem-interrupts.c b/overlay/gem-interrupts.c
index a84aef0398a7..3eda24f4d7eb 100644
--- a/overlay/gem-interrupts.c
+++ b/overlay/gem-i
From: Tvrtko Ursulin
Various tool modules implement their owm PMU open wrapper which
can be replaced by calling the library one.
v2:
* Remove extra newline. (Chris Wilson)
* Commit msg.
Signed-off-by: Tvrtko Ursulin
---
lib/igt_perf.c | 32
lib/igt
From: Tvrtko Ursulin
Configuration and format are uint64_t in the perf API.
Tidy some other details as well.
Signed-off-by: Tvrtko Ursulin
---
lib/igt_perf.c | 40 +++-
lib/igt_perf.h | 4 ++--
2 files changed, 21 insertions(+), 23 deletions(-)
diff --git
From: Tvrtko Ursulin
Wire up to the RAPL PMU for GPU energy readings.
The only complication is that we have to add code to parse:
# cat /sys/devices/power/events/energy-gpu.scale
2.3283064365386962890625e-10
Signed-off-by: Tvrtko Ursulin
---
lib/igt_perf.c | 16 --
lib/igt_perf.h |
From: Tvrtko Ursulin
Idea is to avoid duplication across multiple users in
upcoming patches.
v2: Commit message and use a separate library instead of piggy-
backing to libintel_tools. (Chris Wilson)
Signed-off-by: Tvrtko Ursulin
---
lib/Makefile.am | 6 +-
overlay/per
== Series Details ==
Series: drm/i915: Increase atomic update vblank evasion time with lockdep (rev2)
URL : https://patchwork.freedesktop.org/series/31630/
State : success
== Summary ==
Series 31630v2 drm/i915: Increase atomic update vblank evasion time with lockdep
https://patchwork.freedeskt
== Series Details ==
Series: IGT PMU support (rev7)
URL : https://patchwork.freedesktop.org/series/28253/
State : failure
== Summary ==
IGT patchset build failed on latest successful build
d7c88290ab6a8393dc341b30c7fb5e27d2952901 syncobj: Add a test for
SYNCOBJ_CREATE_SIGNALED
make all-recu
Daniel Vetter writes:
> stop_machine is not really a locking primitive we should use, except
> when the hw folks tell us the hw is broken and that's the only way to
> work around it.
>
> This patch tries to address the locking abuse of stop_machine() from
>
> commit 20e4933c478a1ca694b38fa4ac44d9
Windows guest driver needs vbt in opregion, to configure the setting
for display. Without opregion support, the display registers won't
be set and this blocks display model to get the correct information
of the guest display plane.
This patch is to provide a virtual opregion for guest. Current
imp
GEM proxy is a kind of GEM, whose backing physical memory is pinned
and produced by guest VM and is used by host as read only. With GEM
proxy, host is able to access guest physical memory through GEM object
interface. As GEM proxy is such a special kind of GEM, a new flag
I915_GEM_OBJECT_IS_PROXY i
The RGB 64-bit 16:16:16:16 float pixel format is needed by windows 10
guest VM. This patch is to add this pixel format support to gvt device
model. Without this patch, some Apps, e.g. "DXGIGammaVM.exe", will crash
and make guest screen black.
Signed-off-by: Tina Zhang
---
drivers/gpu/drm/i915/gv
The RGB 64-bit 16:16:16:16 float pixel format is needed by some Apps in
windows. The float format in each component is 1:5:10 MSb-sign:exponent:
fraction.
This patch is to introduce the format to drm, so that the windows guest's
framebuffer in this kind of format can be recognized and used by linu
This patch is to introduce the framebuffer decoder which can decode guest
OS's framebuffer information, including primary, cursor and sprite plane.
v14:
- refine pixel format table. (Zhenyu)
v9:
- move drm format change to a separate patch. (Xiaoguang)
v8:
- fix a bug in decoding primary plane.
Add VFIO_DEVICE_QUERY_GFX_PLANE ioctl command to let user mode query and
get the plan and its related information. This ioctl can be invoked with:
1) either flag DMABUF or REGION is set. Vendor driver returns success and
the plane_info only when the specific kind of buffer is supported.
2) flag PRO
v14->15:
1) Add VFIO_DEVICE_GET_GFX_DMABUF ABI. (Gerd)
2) Add intel_vgpu_dmabuf_cleanup() to clean up the vGPU's dmabuf. (Gerd)
v13->v14:
1) add PROBE, DMABUF and REGION flags. (Alex)
2) return -ENXIO when gem proxy object is banned by ioctl.
(Chris) (Daniel)
3) add some details about the float
This patch introduces a guest's framebuffer sharing mechanism based on
dma-buf subsystem. With this sharing mechanism, guest's framebuffer can
be shared between guest VM and host.
v15:
- Add VFIO_DEVICE_GET_GFX_DMABUF ABI. (Gerd)
- Add intel_vgpu_dmabuf_cleanup() to clean up the vGPU's dmabuf. (Ge
On Tue, 2017-10-10 at 02:20 -0700, Kenneth Graunke wrote:
> On Thursday, September 14, 2017 12:53:01 AM PDT Mika Kahola wrote:
> >
> > This patch series introduces fixes to reduce dependency for
> > I915_MAX_PIPES and minor optimizations to reduce hardcoding.
> >
> > Kahola, Mika (1):
> > drm/i
From the CI builds, its been observed that during a driver
reload/insert, dp dual mode read function sometimes fails to
read from LSPCON device over i2c-over-aux channel.
This patch:
- adds some delay and few retries, allowing a scope for these
devices to settle down and respond.
- changes one e
Our current logic to read LSPCON's current mode, stops retries and
breaks wait-loop, if it gets LSPCON_MODE_INVALID as return from the
core function. This doesn't allow us to try reading the mode again.
This patch removes this condition and allows retries reading
the currnt mode until timeout.
Th
This patch series adds various retries and delays
in DRM and I915 layer, to handle some of the read
failures while dealing with LSPCON devices.
LSPCON devices are sometimes slow to respond and
the vendores expect us to retry while probing the
device.
The typical scenarios are getting fixed / hand
We read the dp dual mode Adapter identifier to detect the
LSPCON device. It's been observed from the CI testing that in
few cases, this read can get delayed or fail. For such scenarios,
LSPCON vendors suggest to retry the read operation.
This patch adds retry in the probe function, while reading
L
== Series Details ==
Series: drm/i915/gvt: Dma-buf support for GVT-g
URL : https://patchwork.freedesktop.org/series/31638/
State : failure
== Summary ==
CHK include/config/kernel.release
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease.h
CHK i
== Series Details ==
Series: drm/i915: Increase atomic update vblank evasion time with lockdep
URL : https://patchwork.freedesktop.org/series/31630/
State : success
== Summary ==
shard-hswtotal:2552 pass:1412 dwarn:24 dfail:0 fail:13 skip:1103
time:9576s
== Logs ==
For more deta
Oscar Mateo writes:
> Now that we write RING_FORCE_TO_NONPRIV registers directly to hardware,
> there is no need to save space for them in the list of context workarounds.
>
> Signed-off-by: Oscar Mateo
> Cc: Chris Wilson
> Cc: Mika Kuoppala
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/d
Hi,
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Shashank Sharma
> Sent: tiistai 10. lokakuuta 2017 13.08
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v3 0/3] Various retries for LSPCON
>
> This patch series
This patch series introduces fixes to reduce dependency for
I915_MAX_PIPES and minor optimizations to reduce hardcoding.
Mika Kahola (5):
drm/i915: Don't relay on I915_MAX_PIPES
drm/i915: Remove I915_MAX_PIPES dependency for DDB allocation
drm/i915: Fold IRQ pipe masks
drm/i915: Favor for_
Let's remove the dependency on I915_MAX_PIPES. Instead, get the number
of pipes from platform information.
Reviewed-by: Ville Syrjälä
Signed-off-by: Ramalingam C
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/intel_audio.c| 2 +-
drivers/gpu/drm/i915/intel_pipe_crc.c | 7 ---
2 fi
Cleanup and parametrize the handling of South Error Interrupts (SERR_INT).
Reviewed-by: Ville Syrjälä
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/i915_irq.c | 12
drivers/gpu/drm/i915/i915_reg.h | 3 ---
2 files changed, 4 insertions(+), 11 deletions(-)
diff --git a/drive
Remove dependency for I915_MAX_PIPES by replacing it with
for_each_pipe() macro.
v2: use 'enum pipe pipe' instead of 'i'
Reviewed-by: Ville Syrjälä
Signed-off-by: Ramalingam C
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/intel_display.c | 5 -
drivers/gpu/drm/i915/intel_drv.h
Fold IRQ pipe masks into one loop instead of hardcoding per pipe.
Reviewed-by: Ville Syrjälä
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/i915_irq.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.
Favor for_each_pipe() macro when looping through pipes.
v2: use 'enum pipe pipe' instead of 'i'
Reviewed-by: Ville Syrjälä
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/intel_pipe_crc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel
On Mon, 09 Oct 2017, Ville Syrjälä wrote:
> On Thu, Sep 28, 2017 at 11:21:57AM +0300, Jani Nikula wrote:
>> While technically CHV isn't DDI, we do look at the VBT based DDI port
>> info for HDMI DDC pin and DP AUX channel. (We call these "alternate",
>> but they're really just something that aren'
== Series Details ==
Series: Various retries for LSPCON
URL : https://patchwork.freedesktop.org/series/31639/
State : success
== Summary ==
Series 31639v1 Various retries for LSPCON
https://patchwork.freedesktop.org/api/1.0/series/31639/revisions/1/mbox/
Test gem_exec_suspend:
Subgrou
Quoting Rodrigo Vivi (2017-10-05 05:34:02)
> On Thu, Aug 24, 2017 at 11:00:27PM +, Rodrigo Vivi wrote:
> > On Thu, Aug 24, 2017 at 3:39 PM, Oscar Mateo wrote:
> > >
> > >
> > > On 08/23/2017 05:01 PM, Rodrigo Vivi wrote:
> > >>
> > >> On Tue, Jul 18, 2017 at 8:15 AM, Oscar Mateo
> > >> wrote:
Quoting Chris Wilson (2017-10-10 11:25:38)
> Quoting Rodrigo Vivi (2017-10-05 05:34:02)
> > On Thu, Aug 24, 2017 at 11:00:27PM +, Rodrigo Vivi wrote:
> > > On Thu, Aug 24, 2017 at 3:39 PM, Oscar Mateo
> > > wrote:
> > > >
> > > >
> > > > On 08/23/2017 05:01 PM, Rodrigo Vivi wrote:
> > > >>
>
== Series Details ==
Series: drm/i915: Miscellaneous fixes to reduce dependency for I915_MAX_PIPES
(rev2)
URL : https://patchwork.freedesktop.org/series/30336/
State : success
== Summary ==
Series 30336v2 drm/i915: Miscellaneous fixes to reduce dependency for
I915_MAX_PIPES
https://patchwork
== Series Details ==
Series: drm/i915: Increase atomic update vblank evasion time with lockdep (rev2)
URL : https://patchwork.freedesktop.org/series/31630/
State : failure
== Summary ==
Test kms_flip:
Subgroup modeset-vs-vblank-race-interruptible:
pass -> FAIL
On Mon, Oct 09, 2017 at 06:44:00PM +0200, Daniel Vetter wrote:
> 4.14-rc1 gained the fancy new cross-release support in lockdep, which
> seems to have uncovered a few more rules about what is allowed and
> isn't.
>
> This one here seems to indicate that allocating a work-queue while
> holding mmap
On Tue, 2017-10-10 at 17:50 +0800, Tina Zhang wrote:
> GEM proxy is a kind of GEM, whose backing physical memory is pinned
> and produced by guest VM and is used by host as read only. With GEM
> proxy, host is able to access guest physical memory through GEM object
> interface. As GEM proxy is such
Regards
Shashank
On 10/10/2017 3:42 PM, Saarinen, Jani wrote:
Hi,
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
Of Shashank Sharma
Sent: tiistai 10. lokakuuta 2017 13.08
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v3
+ Chris and Mika for R-b's as they're the test authors
+ Arek, Tomi for CI blacklist reduction
On Tue, 2017-10-10 at 11:55 +0300, Abdiel Janulgue wrote:
> This improves the GEM tests section of I-G-T to make it more
> suitable for CI testing
>
> Cc: Joonas Lahtinen
> Signed-off-by: Abdiel Janulg
If we fail to allocate a 64k hugepage for scratch, we try again with a
normal 4k page (with some loss of efficiency at runtime). As we handle
this gracefully, we do not need a noisy allocation failure warning.
Signed-off-by: Chris Wilson
Cc: Matthew Auld
Cc: Joonas Lahtinen
---
drivers/gpu/drm
On 10 October 2017 at 12:10, Chris Wilson wrote:
> If we fail to allocate a 64k hugepage for scratch, we try again with a
> normal 4k page (with some loss of efficiency at runtime). As we handle
> this gracefully, we do not need a noisy allocation failure warning.
>
> Signed-off-by: Chris Wilson
On Tue, 2017-10-10 at 12:10 +0100, Chris Wilson wrote:
> If we fail to allocate a 64k hugepage for scratch, we try again with a
> normal 4k page (with some loss of efficiency at runtime). As we handle
> this gracefully, we do not need a noisy allocation failure warning.
>
> Signed-off-by: Chris Wi
From: Tvrtko Ursulin
Wire up to the RAPL PMU for GPU energy readings.
The only complication is that we have to add code to parse:
# cat /sys/devices/power/events/energy-gpu.scale
2.3283064365386962890625e-10
v2: Link with -lm.
Signed-off-by: Tvrtko Ursulin
---
lib/igt_perf.c | 16 ++
== Series Details ==
Series: Various retries for LSPCON
URL : https://patchwork.freedesktop.org/series/31639/
State : success
== Summary ==
shard-hswtotal:2552 pass:1412 dwarn:24 dfail:0 fail:13 skip:1103
time:9584s
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/t
== Series Details ==
Series: drm/i915: Silently fallback to 4k scratch
URL : https://patchwork.freedesktop.org/series/31646/
State : success
== Summary ==
Series 31646v1 drm/i915: Silently fallback to 4k scratch
https://patchwork.freedesktop.org/api/1.0/series/31646/revisions/1/mbox/
Test kms
Quoting Joonas Lahtinen (2017-10-10 12:30:17)
> On Tue, 2017-10-10 at 12:10 +0100, Chris Wilson wrote:
> > If we fail to allocate a 64k hugepage for scratch, we try again with a
> > normal 4k page (with some loss of efficiency at runtime). As we handle
> > this gracefully, we do not need a noisy al
There is function to tell how many ports we have, so use it.
We still have direct relationship with array size and port count,
so no harm was done.
Fixes: 76e70087d360 ("drm/i915: Make execlist port count variable")
Cc: Mika Kuoppala
Cc: Chris Wilson
Signed-off-by: Mika Kuoppala
---
drivers/gp
From: Tvrtko Ursulin
Wire up to the RAPL PMU for GPU energy readings.
The only complication is that we have to add code to parse:
# cat /sys/devices/power/events/energy-gpu.scale
2.3283064365386962890625e-10
v2: Link with -lm.
v3: strtod can handle scientific notation, even though my initial
== Series Details ==
Series: IGT PMU support (rev8)
URL : https://patchwork.freedesktop.org/series/28253/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
d7c88290ab6a8393dc341b30c7fb5e27d2952901 syncobj: Add a test for
SYNCOBJ_CREATE_SIGNALED
with latest D
This series adds NV12 support to IGT
and a test case for checking NV12 functionality.
The series is based on the initial version posted by Chandra Konduru
during 2015 based on the IGT framework available then.
Previous version reference links:
https://patchwork.freedesktop.org/patch/57590/
https:/
From: chandra konduru
This patch adds necessary prep work for nv12 testcase:
- updated fb allocation functions to handle NV12 format
- igt helper function to return png image size
- igt helper function to calculate start of uv in a given NV12 buffer
- igt helper function to map buffer for host ac
From: Mahesh Kumar
Current code calculates DDB for planar formats in such a way that we
store DDB of plane-0 in plane 1 & vice-versa.
In order to make this clean this patch refactors WM/DDB calculation for
NV12 planar formats.
Signed-off-by: Mahesh Kumar
---
drivers/gpu/drm/i915/i915_drv.h |
From: Mahesh Kumar
Add support of recognizing DRM_FORMAT_NV12 from plane_format
register value.
Signed-off-by: Mahesh Kumar
---
drivers/gpu/drm/i915/intel_display.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.
From: Mahesh Kumar
This will reduce number of arguments required to be pass in
skl_compute_plane_wm function.
Signed-off-by: Mahesh Kumar
---
drivers/gpu/drm/i915/intel_pm.c | 18 +++---
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c
From: Mahesh Kumar
NV12 require WM calculation for UV plane as well.
UV plane WM should also fulfill all the WM related restrictions.
Signed-off-by: Mahesh Kumar
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 54
From: Mahesh Kumar
skl_wm_values struct contains values os pipe/plane DDB only.
so rename it for better readability of code.
s/skl_wm_values/skl_ddb_values
Signed-off-by: Mahesh Kumar
---
drivers/gpu/drm/i915/i915_drv.h | 4 ++--
drivers/gpu/drm/i915/intel_drv.h | 2 +-
drivers/gpu/drm/i91
From: Mahesh Kumar
NV12 formats have two registers for DDB. verify both the registers for
NV12 during verify_wm_state.
Signed-off-by: Mahesh Kumar
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 50 ++
This patch series is adding NV12 support for Broxton display after rebasing on
latest drm-tip.
Initial series of the patches can be found here:
https://lists.freedesktop.org/archives/intel-gfx/2015-May/066786.html
Previous revision history:
The first version of patches were reviewed when floated b
From: Mahesh Kumar
Display Workaround #0826 (SKL:ALL BXT:ALL) & #1059(CNL:A)
Hardware sometimes fails to wake memory from pkg C states fetching the
last few lines of planar YUV 420 (NV12) planes. This causes
intermittent underflow and corruption.
WA: Disable package C states or do not enable late
From: Mahesh Kumar
DDB allocation optimization algorithm require/assumes ddb allocation for
any memory C-state level DDB value to be as high as level below.
Render decompression require level WM to be as high as wm level-0.
This patch fulfils both the requirements.
Signed-off-by: Mahesh Kumar
-
From: Chandra Konduru
This patch adds NV12 to format_is_yuv() function
for sprite planes.
v2:
-Use intel_ prefix for format_is_yuv (Ville)
v3: Rebased (me)
v4: Rebased and addressed review comments from Clinton A Taylor.
"static function in intel_sprite.c is not available
to th
From: Chandra Konduru
This patch sets appropriate scaler mode for NV12 format.
In this mode, skylake scaler does either chroma-upsampling or
chroma-upsampling and resolution scaling
v2: Review comments from Ville addressed
NV12 case to be checked first for setting
the scaler
v3:
From: Chandra Konduru
This patch updates scaler max limit support for NV12
v2: Rebased (me)
v3: Rebased (me)
v4: Missed the Tested-by/Reviewed-by in the previous series
Adding the same to commit message in this version.
v5: Addressed review comments from Ville and rebased
- ca
Quoting Mika Kuoppala (2017-10-10 12:48:57)
> There is function to tell how many ports we have, so use it.
> We still have direct relationship with array size and port count,
> so no harm was done.
>
> Fixes: 76e70087d360 ("drm/i915: Make execlist port count variable")
> Cc: Mika Kuoppala
> Cc: C
From: Chandra Konduru
This patch adds NV12 to list of supported formats for
primary plane
v2: Rebased (Chandra Konduru)
v3: Rebased (me)
v4: Review comments by Ville addressed
Removed the skl_primary_formats_with_nv12 and
added NV12 case in existing skl_primary_formats
v5: Reb
From: Chandra Konduru
This patch adds NV12 as supported format
to intel_framebuffer_init and performs various checks.
v2:
-Fix an issue in checks added (Chandra Konduru)
v3: rebased (me)
v4: Review comments by Ville addressed
Added platform check for NV12 in intel_framebuffer_init
From: Chandra Konduru
This patch adds NV12 to list of supported formats for sprite plane.
v2: Rebased (me)
v3: Review comments by Ville addressed
- Removed skl_plane_formats_with_nv12 and added
NV12 case in existing skl_plane_formats
- Added the 10bpc RGB formats
v4: Ad
From: Ville Syrjälä
To untangle the mess that is intel_ddi_post_disable() move the the bits
needed by FDI into intel_ddi_fdi_post_disable(). This way we can stop
worrying about FDI in intel_ddi_post_disable().
Reviewed-by: Jani Nikula
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/inte
From: Ville Syrjälä
Untangle intel_enable_ddi() by splitting it into DP and HDMI specific
variants.
v2: Keep using intel_ddi_get_encoder_port() for now
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_ddi.c | 86 +++-
1 file changed, 49 insertion
From: Ville Syrjälä
Pull the code to disable the port clock into a function. We already have
the intel_ddi_clk_select() counterpart.
v2: Keep using intel_ddi_get_encoder_port() for now (Chris)
Cc: Chris Wilson
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_ddi.c | 24 +++
From: Ville Syrjälä
To make it easier to debug things let's dump the output types bitmask in
the crtc state dump. And to make life that much better, let's pretty
print it as a a human reaadable string as well.
v2: Have the caller pass in the buffer (Chris)
#undef OUTPUT_TYPE (Jani)
Cc: Chri
From: Ville Syrjälä
To clean up the mess in intel_ddi_post_disable() split it into two
clean variants for HDMI and DP.
v2: Rebase due to MST DPMS changes
Reviewed-by: Jani Nikula #v1
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_ddi.c | 111 ++---
From: Ville Syrjälä
Extract the code to disable the DDI_BUF_CTL into small helper. This
will allows us to detangle the encoder type mess in
intel_ddi_post_disable().
v2: Keep using intel_ddi_get_encoder_port() for now
Reviewed-by: Jani Nikula #v1
Signed-off-by: Ville Syrjälä
---
drivers/gpu/
From: Ville Syrjälä
Untangle intel_disable_ddi() by splitting it into DP and HDMI specific
variants.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_ddi.c | 51
1 file changed, 31 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/
From: Ville Syrjälä
Here's a small selection of patches I extracted from my monster
DDI encoder->type drobbery series. These mostly split the encoder
hooks along the DP vs. HDMI lines. Hopefully it'll be a bit easier
to get these reviewed when they're not buried wihtin such a massive
series.
Vil
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