On Thu, 2017-09-28 at 20:39 +0100, Chris Wilson wrote:
> We use INT_MIN to denote the priority of a request that has not been
> submitted to the scheduler; we treat INT_MIN as an invalid priority and
> initialise the request to it. Give the value a name so it stands out.
>
> Signed-off-by: Chris W
On Fri, 2017-09-29 at 10:28 +0530, Sagar Arun Kamble wrote:
> i915_gem_restore_fences is GEM resumption task hence it is moved to
> i915_gem_resume from i915_restore_state.
>
> Signed-off-by: Sagar Arun Kamble
> Cc: Michal Wajdeczko
> Cc: Michał Winiarski
> Cc: Chris Wilson
> Cc: Joonas Lahtin
So, there won't be dmabuf leaking problem, as we release all the dmabuf_obj in
the release ops when user space crashing.
Can we just stop considering the way to fix the dmabuf life-cycle issue and try
to just consider the generic way to handle buffer exposing?
Does the generic way need the close
On Fri, 29 Sep 2017 00:36:56 +0200, Srivatsa, Anusha
wrote:
-Original Message-
From: Sundaresan, Sujaritha
Sent: Thursday, September 21, 2017 11:38 AM
To: intel-gfx@lists.freedesktop.org
Cc: Sundaresan, Sujaritha ; Wajdeczko,
Michal
; Srivatsa, Anusha
;
Mateo Lozano, Oscar ; C
Hi,
> The reason why I want to propose the close IOCTL is because that the
> current lock (fb_obj_list_lock), cannot sync the intel_vgpu_fb_info
> releasing and reusing.
> You see, the intel_vgpu_fb_info reusing and releasing are in
> different threads. There is a case that intel_vgpu_find_dmabu
On Thu, 2017-09-28 at 20:39 +0100, Chris Wilson wrote:
> WaDisableMidCmdPreemption
"WaDisable{3D,GPGPU}MidCmdPreemption are not ..."
Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
___
Intel-gfx mailing list
Intel-gfx
On Fri, Sep 29, 2017 at 08:57:47AM +0200, Mario Kleiner wrote:
> On 09/26/2017 07:05 AM, Daniel Vetter wrote:
> > On Fri, Sep 15, 2017 at 05:48:25PM +0200, Mario Kleiner wrote:
> > > The new module parameter enable_hw_color_correction defaults to
> > > true, to retain the current behaviour. If set
On Thu, 2017-09-28 at 20:39 +0100, Chris Wilson wrote:
> Add another perma-pinned context for using for preemption at any time.
> We cannot just reuse the existing kernel context, as first and foremost
> we need to ensure that we can preempt the kernel context itself, so
> require a distinct contex
On Fri, 2017-09-29 at 07:04 +, Zhang, Tina wrote:
> So, there won't be dmabuf leaking problem, as we release all the
> dmabuf_obj in the release ops when user space crashing.
>
> Can we just stop considering the way to fix the dmabuf life-cycle
> issue and try to just consider the generic way
On Thu, 2017-09-28 at 20:39 +0100, Chris Wilson wrote:
> When we write to ELSP, it triggers a context preemption at the earliest
> arbitration point (3DPRIMITIVE, some PIPECONTROLs, a few other
> operations and the explicit MI_ARB_CHECK). If this is to the same
> context, it triggers a LITE_RESTORE
On Thu, 2017-09-28 at 20:39 +0100, Chris Wilson wrote:
> Use a priority stored in the context as the initial value when
> submitting a request. This allows us to change the default priority on a
> per-context basis, allowing different contexts to be favoured with GPU
> time at the expense of lower
Hi,
> + __u32 x_pos;/* horizontal position of cursor plane,
> upper left corner in pixels */
> + __u32 y_pos;/* vertical position of cursor plane,
> upper left corner in lines*/
Completely separate question: Does the host know the cursor hotspot?
cheers,
Gerd
__
> -Original Message-
> From: Gerd Hoffmann [mailto:kra...@redhat.com]
> Sent: Friday, September 29, 2017 3:29 PM
> To: Zhang, Tina ; zhen...@linux.intel.com; Wang, Zhi
> A ; Tian, Kevin ; Alex
> Williamson
> Cc: Daniel Vetter ; intel-gfx@lists.freedesktop.org;
> intel-gvt-...@lists.freed
Hi,
> > > Does the generic way need the close ioctl?
> >
> > I think we don't need a close ioctl anyway.
>
> Can you share your thoughts?
See other mail. I think the race can be fixed by changing the locking,
so a explicit close ioctl isn't needed.
> Do you think the fd interface is enough
Parameter guc_log_level needs to be sanitized based on GuC support and
enable_guc_loading parameter since it depends on them like
enable_guc_submission. This will make GuC logging paths independent of
enable_guc_submission parameter.
Signed-off-by: Sagar Arun Kamble
Cc: Michal Wajdeczko
Cc: Mich
With most of the GuC disabling now separated from GuC parameters,
only function that needs GuC parameter enable_guc_loading check is
i915_disable_guc_ggtt as that is enabled based it. So call only
i915_disable_guc_ggtt when enable_guc_loading is set during fini.
Signed-off-by: Sagar Arun Kamble
C
Hide the initial setup cost of a new batch by performing it before we
start the clock for measuring the execute-wait latency.
Signed-off-by: Chris Wilson
---
tests/gem_sync.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tests/gem_sync.c b/tests/gem_sync.c
index 8ed9760d..c9e2f014 10064
GuC interrupts are currently enabled by Logging and disabled in different
scenarios. Make disabling check whether interrupts were already disabled
and similar for enable path. This will remove the state tracking for the
callers of these functions.
Signed-off-by: Sagar Arun Kamble
Cc: Michal Wajde
This series changes the way driver handles disabling of GuC related
operations and cleanup of objects. Patches 1 and 4 remove checks
based on enable_guc_submission. Patch 2 and 3 prepare GuC log related
functions to remove param based checks. Patch 5 updates check based on
enable_guc_loading.
Cc:
While enabling GuC submission, state is setup by driver for different
GuC needs like stage_ids, ads vma, stage_desc_pool vma, log vma and
log runtime, execbuf client that can be looked at while disabling
submission or destroying these objects. So remove the check for
i915.enable_guc_submission para
With guc_log_level parameter sanitized and GuC interrupts control
functions made self sufficient w.r.t interrupts state, we can remove
the enable_guc_submission checks from flush_guc_logs and
i915_guc_log_register/unregister and intel_uc_fini_hw.
Signed-off-by: Sagar Arun Kamble
Cc: Michal Wajdec
On Thu, 2017-09-28 at 18:26 +0100, Chris Wilson wrote:
> Check and measure how well we can submit a second high priority task
> when the engine is already busy with a low priority task and see how
> long it takes to complete (and wake up the client).
>
> Signed-off-by: Chris Wilson
Reviewed-by:
On Thu, 2017-09-28 at 18:26 +0100, Chris Wilson wrote:
> Measure how many high priority batches we can execute whilst running a
> bg spinner.
>
> Signed-off-by: Chris Wilson
> @@ -582,6 +592,79 @@ static void fence_signal(int fd, uint32_t handle,
> igt_info("Signal %s: %'lu cycles (%'lu
Quoting Oscar Mateo (2017-09-28 23:40:39)
> RING_FORCE_TO_NONPRIV registers do not live in the logical context. They are
> simply
> global privileged MMIO registers that happen to be powercontext saved and
> restored
> (meaning only they can survive RC6). Therefore, there is absolutely no need
>
On Thu, 2017-09-28 at 12:20 +0100, Chris Wilson wrote:
> Using vgem as our cork for building the request queue limits us to 10s
> of setup (or else the fence autoexpires and we start executing too
> early). Add timeouts to the setup loops and SKIP if we cannot establish
> the workload within 10s, t
On Wed, 2017-09-27 at 17:41 +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> If we store the platform as a bitmask, and convert the
> IS_PLATFORM macro to use it, we allow the compiler to
> merge the IS_PLATFORM(a) || IS_PLATFORM(b) || ... checks
> into a single conditional.
>
> As a seco
Signed-off-by: Chris Wilson
---
tests/gem_workarounds.c | 50 -
1 file changed, 24 insertions(+), 26 deletions(-)
diff --git a/tests/gem_workarounds.c b/tests/gem_workarounds.c
index c8e54391..a1aa5737 100644
--- a/tests/gem_workarounds.c
+++ b/tes
Quoting Joonas Lahtinen (2017-09-29 09:48:42)
> On Thu, 2017-09-28 at 12:20 +0100, Chris Wilson wrote:
> > Using vgem as our cork for building the request queue limits us to 10s
> > of setup (or else the fence autoexpires and we start executing too
> > early). Add timeouts to the setup loops and SK
Signed-off-by: Chris Wilson
---
tests/gem_workarounds.c | 28 +++-
1 file changed, 23 insertions(+), 5 deletions(-)
diff --git a/tests/gem_workarounds.c b/tests/gem_workarounds.c
index e5db1b39..05565d0a 100644
--- a/tests/gem_workarounds.c
+++ b/tests/gem_workarounds.c
@
The workarounds are only valid whilst the GPU is active. To be sure we
are reading the registers in the right state, issue the reads from the GPU.
Signed-off-by: Chris Wilson
---
tests/gem_workarounds.c | 138 +++-
1 file changed, 77 insertions(+), 61
Signed-off-by: Chris Wilson
---
tests/gem_workarounds.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/tests/gem_workarounds.c b/tests/gem_workarounds.c
index a1aa5737..5721e213 100644
--- a/tests/gem_workarounds.c
+++ b/tests/gem_workarounds.c
@@ -32,6 +32,7
To complete the picture also test a new fd with its implicit default
context. Now we have a test for a longstanding fd, new client, new
context.
Signed-off-by: Chris Wilson
---
tests/gem_workarounds.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/tests/gem_workar
== Series Details ==
Series: igt/gem_sync: Sync before starting the clock
URL : https://patchwork.freedesktop.org/series/31141/
State : failure
== Summary ==
Series 31141 revision 1 was fully merged or fully failed: no git log
___
Intel-gfx mailing
== Series Details ==
Series: Reduce enable_guc_submission param based checks
URL : https://patchwork.freedesktop.org/series/31140/
State : warning
== Summary ==
Series 31140v1 Reduce enable_guc_submission param based checks
https://patchwork.freedesktop.org/api/1.0/series/31140/revisions/1/mbo
> -Original Message-
> From: Gerd Hoffmann [mailto:kra...@redhat.com]
> Sent: Friday, September 29, 2017 4:03 PM
> To: Zhang, Tina ; zhen...@linux.intel.com; Wang, Zhi
> A ; Tian, Kevin ; Alex
> Williamson
> Cc: Daniel Vetter ; intel-gfx@lists.freedesktop.org;
> intel-gvt-...@lists.freed
On Wed, 2017-09-27 at 12:32 -0700, Rodrigo Vivi wrote:
> On Wed, Sep 27, 2017 at 12:03 AM, Jani Nikula
> wrote:
> > On Tue, 26 Sep 2017, Rodrigo Vivi wrote:
> > > On Tue, Sep 26, 2017 at 09:21:43PM +, Paulo Zanoni wrote:
> > > > Em Ter, 2017-09-26 às 14:13 -0700, Rodrigo Vivi escreveu:
> > >
On Wed, 2017-09-27 at 11:22 +, Michal Wajdeczko wrote:
> While here fix param and var types to match new naming rules.
>
> v2: update names and commit message (Sagar)
>
> Signed-off-by: Michal Wajdeczko
> Cc: Sagar Arun Kamble
Generally, when the function ends up being used only from singl
== Series Details ==
Series: series starting with [1/5] igt/gem_workarounds: Read the workaround
registers from the active context
URL : https://patchwork.freedesktop.org/series/31144/
State : failure
== Summary ==
Series 31144 revision 1 was fully merged or fully failed: no git log
On Tue, 2017-09-26 at 21:13 +0100, Chris Wilson wrote:
> Quoting Paulo Zanoni (2017-09-26 20:29:08)
> > Stolen memory pointers are dma_addr_t, which means they can be 64 bit
> > things. By using u32 we leave room for bugs in case we ever get huge
> > amounts of stolen memory. By using size_t we don
On Tue, 2017-09-26 at 16:34 +0100, Chris Wilson wrote:
> Currently, we are being fairly lazy and only using a wmb() following an
> update to an active batch. Previously, we have found that to be
> insufficient to ensure that a write from the CPU reaches memory in a
> timely fashion, and in some cac
On Tue, 2017-09-26 at 14:01 +0200, Daniel Vetter wrote:
> On Mon, Sep 25, 2017 at 02:48:41PM +0300, Jani Nikula wrote:
> > On Mon, 25 Sep 2017, Petri Latvala wrote:
> > > [[ a != b ]] is a bashism. As it's just comparing $1 to an empty
> > > string, use -n with a normal [ ].
> > >
> > > /bin/sh i
Quoting Joonas Lahtinen (2017-09-29 10:23:10)
> On Tue, 2017-09-26 at 21:13 +0100, Chris Wilson wrote:
> > Quoting Paulo Zanoni (2017-09-26 20:29:08)
> > > Stolen memory pointers are dma_addr_t, which means they can be 64 bit
> > > things. By using u32 we leave room for bugs in case we ever get hug
In the future I want to allow tests to commit more properties,
but for this to work I have to fix all properties to work better
with atomic commit. Instead of special casing each
property make a bitmask for all property changed flags, and try to
commit all properties.
This has been the most involv
Name change is ok to help the work in the future.
On Wed, 2017-09-27 at 20:16 +0200, Maarten Lankhorst wrote:
> Rename kms_pipe_color to kms_color, and rename the invalid tests to
> pipe-invalid.
> To prepare for adding support for plane color management.
>
> Signed-off-by: Maarten Lankhorst
Rev
In between tests, some tests can do the following sequence:
(pipe C configured with FB)
igt_plane_set_fb(primary (pipe C), NULL);
/* Clear rotation property first */
igt_display_commit2(display, COMMIT_UNIVERSAL);
/* disable pipe */
igt_display_commit2(display, COMMIT_LEGACY);
This would result
Most of these tests have no reason to look at those members,
so try other ways of getting the information.
Signed-off-by: Maarten Lankhorst
---
lib/igt_kms.h | 21
tests/kms_atomic_transition.c | 117 +-
tests/kms_busy.c
In the future I want to allow tests to commit more properties,
but for this to work I have to fix all properties to work better
with atomic commit. Instead of special casing each
property make a bitmask for all property changed flags, and try to
commit all properties.
This has been the most involv
In the future I want to allow tests to commit more properties,
but for this to work I have to fix all properties to work better
with atomic commit. Instead of special casing each
property make a bitmask for all property changed flags, and try to
commit all properties.
Changes since v1:
- Remove sp
In the future I want to allow tests to commit more properties,
but for this to work I have to fix all properties to work better
with atomic commit. Instead of special casing each
property make a bitmask for all property changed flags, and try to
commit all properties.
Changs since v1:
- Mention wh
This test was flipping the primary plane instead of the sprite plane.
Flip the correct plane to make the test pass properly.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102691
Signed-off-by: Maarten Lankhorst
---
tests/kms_rotation_crc.c | 23 +--
1 file changed, 1
igt_output_set_pipe with PIPE_ANY used to mean that we bind the output
to any pipe, but this is now a deprecated alias for PIPE_NONE, and
means the output will be unbound.
Because of this it's better to change output->pending_crtc_idx_mask to
an enum pipe, because only a single choice may be given
Instead of having to special case each property when it's added,
I want to make sure that any test can add arbitrary properties without
having to add too much code. Some of the members I want to expose directly,
and I also add a way to set a blob as property for planes and pipes,
which will be usef
Quoting Mika Kuoppala (2017-09-29 07:55:45)
> > @@ -533,7 +555,45 @@ static void execlists_dequeue(struct intel_engine_cs
> > *engine)
> > spin_lock_irq(&engine->timeline->lock);
> > rb = execlists->first;
> > GEM_BUG_ON(rb_first(&execlists->queue) != rb);
> > - while (rb) {
Quoting Joonas Lahtinen (2017-09-29 08:29:57)
> On Thu, 2017-09-28 at 20:39 +0100, Chris Wilson wrote:
> > When we write to ELSP, it triggers a context preemption at the earliest
> > arbitration point (3DPRIMITIVE, some PIPECONTROLs, a few other
> > operations and the explicit MI_ARB_CHECK). If thi
Hi,
> For example, if the old reused dmabuf_obj is released just after
> query ioctl return it, the next get_fd ioctl would
> return error as the dmabuf_obj has already been closed.
My branch already grabs an extra reference when creating a new
dmabuf_obj, which will be dropped on GET_DMABUF i
On Thu, 2017-09-28 at 16:47 -0700, Michel Thierry wrote:
> On 28/09/17 15:40, Oscar Mateo wrote:
> > RING_FORCE_TO_NONPRIV registers do not live in the logical context. They
> > are simply
> > global privileged MMIO registers that happen to be powercontext saved and
> > restored
> > (meaning only
On Thu, 2017-09-21 at 16:19 -0700, Oscar Mateo wrote:
> The total size of the context has decreased with the removal of the
> URB_ATOMIC section. BSpec indicates 16750 DWORDs (17 pages), plus
> one page for PPHWSP, and I'm throwing an extra page for precaution.
Rather no precaution, or make it for
== Series Details ==
Series: series starting with [v3,01/13] drm/i915: Inherit Kabylake platform
features from Skylake
URL : https://patchwork.freedesktop.org/series/31092/
State : success
== Summary ==
Series 31092v1 series starting with [v3,01/13] drm/i915: Inherit Kabylake
platform featur
Quoting Joonas Lahtinen (2017-09-29 10:31:22)
> On Tue, 2017-09-26 at 16:34 +0100, Chris Wilson wrote:
> > Currently, we are being fairly lazy and only using a wmb() following an
> > update to an active batch. Previously, we have found that to be
> > insufficient to ensure that a write from the CPU
Quoting Joonas Lahtinen (2017-09-29 08:08:31)
> On Fri, 2017-09-29 at 10:28 +0530, Sagar Arun Kamble wrote:
> > i915_gem_restore_fences is GEM resumption task hence it is moved to
> > i915_gem_resume from i915_restore_state.
> >
> > Signed-off-by: Sagar Arun Kamble
> > Cc: Michal Wajdeczko
> > C
== Series Details ==
Series: Introduce DVFS.
URL : https://patchwork.freedesktop.org/series/30922/
State : success
== Summary ==
Series 30922v1 Introduce DVFS.
https://patchwork.freedesktop.org/api/1.0/series/30922/revisions/1/mbox/
Test drv_module_reload:
Subgroup basic-reload-inject
On Wed, 2017-09-27 at 14:36 +0300, Joonas Lahtinen wrote:
> On Wed, 2017-09-27 at 11:22 +, Michal Wajdeczko wrote:
> > In old header structure we were mixing type definitions and
> > declarations that prevent us from exposing some functions
> > as inline. Lets try to fix that.
> >
> > v2: keep
We coalesce onto an active port[0], but not onto an active port[1]
despite it being the same mechanism. So explain the complications that
make skipping the first active port and coalescing onto the second
active port intractable (at least while keeping some resemblance of
sanity).
Suggested-by: Mi
== Series Details ==
Series: drm/i915/execlists: Explain why we skip an ELSP update if port[1] is
active
URL : https://patchwork.freedesktop.org/series/31162/
State : failure
== Summary ==
Series 31162 revision 1 was fully merged or fully failed: no git log
__
An adventure that started from a reported build error that was easy to
see why it happened, but not as easy to see why it didn't happen on my
end.
A user attempted to build IGT with a cairo that was built without
glib. That revealed a spot of code that unconditionally used glib
headers, making eve
kms_atomic_interruptible used signal() without #include
CC: Maarten Lankhorst
Signed-off-by: Petri Latvala
---
tests/kms_atomic_interruptible.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tests/kms_atomic_interruptible.c b/tests/kms_atomic_interruptible.c
index 4e06ee4e..a9f9cb13 100
In commit ebd6eb69f57b ("Make igtrc configuration common, with
configurable suspend/resume delay") .igtrc handling was moved to
igt_core from igt_chamelium. That made everything in IGT depend on
GLIB by accident.
In short, igt_core.h declared a variable of type GKeyFile*, requiring
glib.h. Everyth
gem_exec_schedule used sigaction() without #include
CC: Chris Wilson
Signed-off-by: Petri Latvala
---
tests/gem_exec_schedule.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/gem_exec_schedule.c b/tests/gem_exec_schedule.c
index 95128420..e3cfffda 100644
--- a/tests/gem_exec_schedul
On Mon, 2017-09-11 at 16:25 +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Other kernel users might want to look at total GPU busyness
> in order to implement things like package power distribution
> algorithms more efficiently.
>
> Signed-off-by: Tvrtko Ursulin
> Cc: Ben Widawsky
> C
On Fri, 2017-09-29 at 11:59 +0200, Maarten Lankhorst wrote:
> This test was flipping the primary plane instead of the sprite plane.
> Flip the correct plane to make the test pass properly.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102691
> Signed-off-by: Maarten Lankhorst
Reviewe
Quoting Petri Latvala (2017-09-29 11:51:58)
> gem_exec_schedule used sigaction() without #include
>
> CC: Chris Wilson
> Signed-off-by: Petri Latvala
And I've probably missed it in a few other files...
Reviewed-by: Chris Wilson
-Chris
___
Intel-gfx
== Series Details ==
Series: lib/igt_kms: Convert properties to be more atomic-like. (rev8)
URL : https://patchwork.freedesktop.org/series/30903/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
cf3e683a3650c18c89a3322c4171e1db94b5b9f8 igt/gem_exec_nop: Measu
On Fri, 2017-09-22 at 16:10 +0100, Lionel Landwerlin wrote:
> This function will be used later by the per (context,engine) power
> programming interface.
>
> Signed-off-by: Lionel Landwerlin
> ---
> drivers/gpu/drm/i915/i915_drv.h| 3 +++
> drivers/gpu/drm/i915/i915_gem_execbuffer.c
On Fri, 2017-09-22 at 16:10 +0100, Lionel Landwerlin wrote:
> From: Chris Wilson
>
> We want to expose the ability to reconfigure the slices, subslice and
> eu per context and per engine. To facilitate that, store the current
> configuration on the context for each engine, which is initially set
On Thu, Sep 28, 2017 at 01:18:30PM -0700, Rodrigo Vivi wrote:
> On Thu, Sep 28, 2017 at 07:54:36PM +, Imre Deak wrote:
> > On GLK and CNL enabling a pipe with its pipe scaler enabled will result
> > in a FIFO underrun. This happens only once after driver loading or
> > system/runtime resume, mo
On Fri, 2017-09-22 at 16:10 +0100, Lionel Landwerlin wrote:
> Hi,
>
> A small update to all userspace to select the engine to which the
> slice/subslice configuration applies (as suggested by Chris).
Lets link the Open Source user for these, for easier tracking of those
patches to be on their way
On Thu, Sep 28, 2017 at 08:38:58PM +0100, Chris Wilson wrote:
> I recently tried to update the gen9 feature matrix and to my unpleasant
> surprise found that Kabylake still acted like Broadwell and didn't
> enable the feature. This is because kbl/cfl are inheriting their
> defaults from Broadwell a
== Series Details ==
Series: series starting with [v3,01/13] drm/i915: Inherit Kabylake platform
features from Skylake
URL : https://patchwork.freedesktop.org/series/31092/
State : failure
== Summary ==
Test gem_ctx_param:
Subgroup invalid-param-get:
pass -> FAIL
On Mon, 2017-09-04 at 18:16 +0300, Marius Vlad wrote:
> From: Marius Vlad
>
> Signed-off-by: Marius Vlad
> Signed-off-by: Marius-Adrian Negreanu
> @@ -1183,6 +1183,71 @@ static void i915_driver_cleanup_hw(struct
> drm_i915_private *dev_priv)
> i915_ggtt_cleanup_hw(dev_priv);
> }
>
From: Tvrtko Ursulin
Printf family functions return a number of bytes, not tokens,
printed so the existing check (== 1) was wrong.
Signed-off-by: Tvrtko Ursulin
---
lib/igt_sysfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/igt_sysfs.c b/lib/igt_sysfs.c
index 81767
Quoting Tvrtko Ursulin (2017-09-29 12:29:49)
> From: Tvrtko Ursulin
>
> Printf family functions return a number of bytes, not tokens,
> printed so the existing check (== 1) was wrong.
Oops, copied from scanf without thinking.
> Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson
-Chris
_
On 29/09/17 12:20, Joonas Lahtinen wrote:
On Fri, 2017-09-22 at 16:10 +0100, Lionel Landwerlin wrote:
Hi,
A small update to all userspace to select the engine to which the
slice/subslice configuration applies (as suggested by Chris).
Lets link the Open Source user for these, for easier trackin
== Series Details ==
Series: Remove viral glib dependency
URL : https://patchwork.freedesktop.org/series/31163/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
cf3e683a3650c18c89a3322c4171e1db94b5b9f8 igt/gem_exec_nop: Measure
high-priority throughput over
On Thu, 28 Sep 2017, Rodrigo Vivi wrote:
> Merged both patches to dinq. Thanks for the patches.
While patch 1 was a simple addition of a few DP macros, we need to get
ack from Dave or (preferrably non-Intel) drm-misc maintainers before
queuing non-i915 patches through drm-intel.
Dave, Sean, ack
== Series Details ==
Series: Introduce DVFS.
URL : https://patchwork.freedesktop.org/series/30922/
State : failure
== Summary ==
Series 30922v1 Introduce DVFS.
https://patchwork.freedesktop.org/api/1.0/series/30922/revisions/1/mbox/
Test gem_exec_suspend:
Subgroup basic-s3:
Hi all,
The following changes tagged drm-intel-testing-2017-09-29:
2nd batch of v4.15 features:
- lib/scatterlist updates, use for userptr allocations (Tvrtko)
- Fixed point wrapper cleanup (Mahesh)
- Gen9+ transition watermarks, watermark optimization and fixes (Mahesh)
- Display IPC (Isochrono
On Thu, 2017-09-28 at 12:18 +0530, Sagar Arun Kamble wrote:
> These changes are preparation to handle GuC suspend/resume. Prepared
> helper i915_gem_runtime_resume to reinitialize suspended gem setup.
> Returning status from i915_gem_runtime_suspend and i915_gem_resume.
> This will be placeholder f
Quoting Chris Wilson (2017-09-28 20:39:01)
> From: Michał Winiarski
>
> Avoid the repeated rbtree lookup for each request as we unwind them by
> tracking the last priolist.
>
> v2: Fix up my unhelpful suggestion of using default_priolist.
>
> Signed-off-by: Michał Winiarski
> Signed-off-by: Ch
On Thu, 2017-09-28 at 12:18 +0530, Sagar Arun Kamble wrote:
> This patch moves GuC suspend/resume handlers to corresponding GEM handlers
> and orders them properly in the runtime and system suspend/resume flows.
>
> v2: Removed documentation of suspend/resume handlers as those are not
> interfaces
On Thu, 2017-09-28 at 12:18 +0530, Sagar Arun Kamble wrote:
> i915_gem_restore_fences is GEM resumption task hence it is moved to
> i915_gem_resume from i915_restore_state.
+ Chris
Didn't I just review this patch elsewhere? Other thread explains that
the emytology of fixing display checks out, wh
Quoting Joonas Lahtinen (2017-09-29 12:43:48)
> On Thu, 2017-09-28 at 12:18 +0530, Sagar Arun Kamble wrote:
> > These changes are preparation to handle GuC suspend/resume. Prepared
> > helper i915_gem_runtime_resume to reinitialize suspended gem setup.
> > Returning status from i915_gem_runtime_sus
Quoting Chris Wilson (2017-09-29 11:45:57)
> We coalesce onto an active port[0], but not onto an active port[1]
> despite it being the same mechanism. So explain the complications that
> make skipping the first active port and coalescing onto the second
> active port intractable (at least while kee
On Thu, 2017-09-28 at 12:18 +0530, Sagar Arun Kamble wrote:
> Currently GPU is reset at the end of suspend via i915_gem_sanitize.
> On resume, GuC will not be loaded until intel_uc_init_hw happens
> during GEM resume flow but action to exit sleep can be sent to GuC
> considering the FW load status.
== Series Details ==
Series: lib: Fix igt_sysfs_set_u32 return value
URL : https://patchwork.freedesktop.org/series/31166/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
cf3e683a3650c18c89a3322c4171e1db94b5b9f8 igt/gem_exec_nop: Measure
high-priority throu
On Fri, Sep 29, 2017 at 01:51:59PM +0300, Petri Latvala wrote:
> In commit ebd6eb69f57b ("Make igtrc configuration common, with
> configurable suspend/resume delay") .igtrc handling was moved to
> igt_core from igt_chamelium. That made everything in IGT depend on
> GLIB by accident.
>
> In short,
== Series Details ==
Series: lib/igt_kms: Convert properties to be more atomic-like. (rev8)
URL : https://patchwork.freedesktop.org/series/30903/
State : failure
== Summary ==
Test kms_rotation_crc:
Subgroup sprite-rotation-180-flip:
fail -> PASS (shard-hsw)
+ Michal,
On the principle of code motion first, changes second, I'd like to see
the clean split-up from Michal before touching the files much. That way
git history will be easier to examine.
Few comments below.
On Thu, 2017-09-28 at 12:18 +0530, Sagar Arun Kamble wrote:
> Prepared generic help
On Thu, 2017-09-28 at 12:18 +0530, Sagar Arun Kamble wrote:
> During GuC load/enable, state is setup by driver that can be looked at
> while disabling. So remove the check for i915.enable_guc_submission
> parameter in those functions.
>
> Suggested-by: Chris Wilson
> Signed-off-by: Sagar Arun Kam
On Thu, 2017-09-28 at 12:18 +0530, Sagar Arun Kamble wrote:
> With most of the GuC disabling now separated from enable_guc_submission
> parameter, only function that needs GuC parameter check is
> i915_disable_guc_ggtt as that is enabled based on GuC kernel parameters.
> Hence i915_disable_guc_ggtt
On Thu, Sep 28, 2017 at 08:19:29PM -, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Add has_psr-flag to gen9lp
> URL : https://patchwork.freedesktop.org/series/28488/
> State : success
>
> == Summary ==
>
> Series 28488v1 drm/i915: Add has_psr-flag to gen9lp
> https://patch
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