On Fri, Mar 24, 2017 at 06:29:54PM -0700, Michel Thierry wrote:
> As all other functions related to resetting engines are using reset_engine.
However, we should aim to clear any confusion between this and our
requests. Maybe gen8_reset_engine_start and gen8_reset_engine_cancel?
I think gen8_reset_
On Fri, Mar 24, 2017 at 06:29:56PM -0700, Michel Thierry wrote:
> From: Arun Siluvery
>
> This is a preparatory patch which modifies error handler to do per engine
> hang recovery. The actual patch which implements this sequence follows
> later in the series. The aim is to prepare existing recove
On Fri, Mar 24, 2017 at 06:30:10PM -0700, Michel Thierry wrote:
> From firmware v8.8, GuC provides the count of media engine resets
> (watchdog timeout). This information is available in the GuC shared
> context data struct, which resides in the first page of the default
> (kernel) lrc context.
>
On Fri, Mar 24, 2017 at 06:30:06PM -0700, Michel Thierry wrote:
> For watchdog / media reset, the firmware must know the address of the shared
> data page (the first page of the default context).
>
> This information should be in DWORD 9 of the GUC_CTL structure.
>
> Signed-off-by: Michel Thierry
Added description for the variable in this patch:
https://patchwork.freedesktop.org/patch/146424/
Regards
Shashank
-Original Message-
From: daniel.vet...@ffwll.ch [mailto:daniel.vet...@ffwll.ch] On Behalf Of
Daniel Vetter
Sent: Friday, March 24, 2017 9:08 PM
To: Sharma, Shashank
Cc: Syr
On Fri, Mar 24, 2017 at 06:30:07PM -0700, Michel Thierry wrote:
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 87e76ef589b1..d484cbc561eb 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1369,6 +1369,10 @@ gen8_cs
Please use updated version of the patch [V4]:
https://patchwork.freedesktop.org/patch/146426/
(previous one had a merge conflict due to my local patch)
Regards
Shashank
-Original Message-
From: Sharma, Shashank
Sent: Saturday, March 25, 2017 11:23 AM
To: 'Daniel Vetter'
Cc: Syrjala, Vil
On Fri, Mar 24, 2017 at 06:30:09PM -0700, Michel Thierry wrote:
> Final enablement patch for GPU hang detection using watchdog timeout.
> Using the gem_context_setparam ioctl, users can specify the desired
> timeout value in microseconds, and the driver will do the conversion to
> 'timestamps'.
>
On Fri, Mar 24, 2017 at 06:30:08PM -0700, Michel Thierry wrote:
> Emit the required commands into the ring buffer for starting and
> stopping the watchdog timer before/after batch buffer start during
> batch buffer submission.
>
> v2: Support watchdog threshold per context engine, merge lri comman
On Fri, Mar 24, 2017 at 06:30:03PM -0700, Michel Thierry wrote:
> Check that we can reset specific engines, also check the fallback to
> full reset if something didn't work.
>
> Signed-off-by: Michel Thierry
> ---
> drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 144
> ++
One POSTING_READ of ACTHD may not be enough to ensure that the seqno
write has been posted from the GPU and is now visible. So do three!
References: https://bugs.freedesktop.org/show_bug.cgi?id=97557
References: https://bugs.freedesktop.org/show_bug.cgi?id=17
References: https://bugs.freedeskt
== Series Details ==
Series: drm/i915: Click the ACTHD three times to go home
URL : https://patchwork.freedesktop.org/series/21876/
State : success
== Summary ==
Series 21876v1 drm/i915: Click the ACTHD three times to go home
https://patchwork.freedesktop.org/api/1.0/series/21876/revisions/1/m
Old devices have quite severe restrictions for using fences, and unlike
more recent device (anything from Pineview onwards) we need to enforce
those restrictions even for unfenced tiled access from the render
pipeline.
Fixes: 944397f04f24 ("drm/i915: Store required fence size/alignment for GGTT
v
Den 22.03.2017 09.36, skrev Daniel Vetter:
Discussed with Noralf on the list a bit.
An open question is tinydrm vs. drm_panel, but until we have a clear
idea what's really needed in that space, I think it's best to just
move forward with what we have.
Cc: Noralf Trønnes
Signed-off-by: Daniel
== Series Details ==
Series: drm/i915: Align "unfenced" tiled access on gen2, early gen3
URL : https://patchwork.freedesktop.org/series/21878/
State : failure
== Summary ==
Series 21878v1 drm/i915: Align "unfenced" tiled access on gen2, early gen3
https://patchwork.freedesktop.org/api/1.0/seri
Use the incoming value from debugfs/i915_wedged to select which engines
to marked as guilty in order to force us to reset those requests
(required to quickly bypass simulated hangs).
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_debugfs.c | 16 +++-
1 f
== Series Details ==
Series: drm/i915: Mark manually wedged engines as guilty
URL : https://patchwork.freedesktop.org/series/21882/
State : success
== Summary ==
Series 21882v1 drm/i915: Mark manually wedged engines as guilty
https://patchwork.freedesktop.org/api/1.0/series/21882/revisions/1/m
It has been many years since the last confirmed sighting (and fix) of an
RC6 related bug (usually a system hang). Remove the parameter to stop
users from setting dangerous values.
Signed-off-by: Chris Wilson
Cc: Jani Nikula
Cc: Imre Deak rps.enabled && intel_enable_rc6(
+ if (WARN_ON_O
I noticed that gcc was spilling the CSB to the stack, so rearrange the
code to be more compact. Spilling in this function is slightly more
interesting due to the mmio reads acting as memory barriers and so
end up flushing the stack spills. Still miniscule to having to do at
least the pair of uncach
== Series Details ==
Series: drm/i915/execlists: Trim irq handler
URL : https://patchwork.freedesktop.org/series/21887/
State : success
== Summary ==
Series 21887v1 drm/i915/execlists: Trim irq handler
https://patchwork.freedesktop.org/api/1.0/series/21887/revisions/1/mbox/
fi-bdw-5557u t
On Fri, Mar 24, 2017 at 11:46:53AM +0200, Tomi Valkeinen wrote:
> On 22/03/17 23:50, Daniel Vetter wrote:
> > Again this is an internal helper, not the official way to lock a crtc.
> >
> > Cc: Jyri Sarha
> > Cc: Tomi Valkeinen
> > Signed-off-by: Daniel Vetter
> > ---
> > drivers/gpu/drm/tilcdc
On Mon 2017-03-06 12:23:41, Chris Wilson wrote:
> On Mon, Mar 06, 2017 at 01:10:48PM +0100, Pavel Machek wrote:
> > On Mon 2017-03-06 11:15:28, Chris Wilson wrote:
> > > On Mon, Mar 06, 2017 at 12:01:51AM +0100, Pavel Machek wrote:
> > > > Hi!
> > > >
> > > > > > mplayer stopped working after a wh
- We can drop the different return value flags, the only caller only
cares about whether the scanout position is valid or not. Also, it's
entirely undefined what "accurate" means, if we'd really care we
should probably wire the max_error through. But since we never even
report this to users
Also unify/merge with the existing stuff.
I was a bit torn where to put this, but in the end I decided to put
all the ioctl/sysfs/debugfs stuff into drm-uapi.rst. That means we
have a bit a split with the other uapi related stuff used internally,
like drm_file.[hc], but I think overall this makes
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