On Tue, Nov 15, 2016 at 04:36:32PM +0200, Mika Kuoppala wrote:
> +static bool
> +hangcheck_engine_stall(struct intel_engine_cs *engine,
> +struct intel_engine_hangcheck *hc)
> +{
> + const unsigned long last_action = engine->hangcheck.action_timestamp;
>
> - me
On 15/11/2016 17:19, Praveen Paneri wrote:
Decoupled MMIO is an alternative way to access forcewake domain
registers, which requires less cycles for a single read/write and
avoids frequent software forcewake.
This certainly gives advantage over the forcewake as this new
mechanism “decouples” CPU
On 15/11/2016 22:46, Jeff McGee wrote:
On Tue, Nov 15, 2016 at 10:06:47AM -0800, Srivatsa, Anusha wrote:
-Original Message-
From: Tvrtko Ursulin [mailto:tvrtko.ursu...@linux.intel.com]
Sent: Tuesday, November 15, 2016 2:31 AM
To: Srivatsa, Anusha ; Mcgee, Jeff
Cc: Ursulin, Tvrtko ; int
[remove bouncing emails, added Rodrigo for firmware release process
insights]
On 15/11/2016 22:21, Jeff McGee wrote:
On Tue, Nov 15, 2016 at 10:26:46AM +, Tvrtko Ursulin wrote:
On 15/11/2016 00:39, Anusha Srivatsa wrote:
From: Peter Antoine
The HuC loading process is similar to GuC.
On 15/11/2016 11:16, Chris Wilson wrote:
Move the GuC invalidation of its ggtt TLB to where we perform the ggtt
modification rather than proliferate it into all the callers of the
insert (which may or may not in fact have to do the insertion).
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
--
On Wed, Nov 16, 2016 at 08:49:24AM +, Tvrtko Ursulin wrote:
>
> On 15/11/2016 11:16, Chris Wilson wrote:
> >Move the GuC invalidation of its ggtt TLB to where we perform the ggtt
> >modification rather than proliferate it into all the callers of the
> >insert (which may or may not in fact have
From: Tvrtko Ursulin
And a little bit of function prototype changes.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_irq.c | 24 ++--
1 file changed, 10 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.
From: Tvrtko Ursulin
Plus a small cascade of function prototype changes.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h | 4 ++--
drivers/gpu/drm/i915/i915_gem.c | 7 +++
drivers/gpu/drm/i915/i915_gem_fence_reg.c | 12 +---
drivers/gpu/drm/i
From: Tvrtko Ursulin
And a little bit of function prototype changes.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h | 4 ++--
drivers/gpu/drm/i915/i915_suspend.c | 22 +-
drivers/gpu/drm/i915/intel_display.c| 18 +++---
driver
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index e804cb2fa57e..e4efffe02fa8 100644
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_gem.c | 12 +---
drivers/gpu/drm/i915/i915_gem_gtt.c | 34 ++
drivers/gpu/drm/i9
From: Tvrtko Ursulin
And a little bit of cascaded function prototype changes.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_gpu_error.c | 20 +---
drivers/gpu/drm/i915/intel_display.c | 7 +++
3 files changed, 1
From: Tvrtko Ursulin
Plus a trickle of function prototype changes.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_pm.c | 67 +
1 file changed, 35 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm
From: Tvrtko Ursulin
Macro takes dev_priv and not dev.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 379755d6
From: Tvrtko Ursulin
Started with removing INTEL_INFO(dev) and cascaded into a quite
big trickle of function prototype changes. Still, I think it is
for the better.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_gem.c | 2 +-
dri
From: Tvrtko Ursulin
And at the same time introduce a static inline helper for
more type safety.
Signed-off-by: Tvrtko Ursulin
Suggested-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_drv.h | 19 +++
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/d
From: Tvrtko Ursulin
And a little bit of cascaded function prototype changes.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem_tiling.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c
b/drivers/gpu/drm/i915
From: Tvrtko Ursulin
And as usual a little bit of cascaded function prototype changes.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_display.c | 6 +++---
drivers/gpu/drm/i915/intel_dp.c | 26 +++---
drivers/gpu/drm/i915/intel_drv.h | 2 +-
3 files
From: Tvrtko Ursulin
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 3 +-
drivers/gpu/drm/i915/intel_display.c | 167 +++
3 files changed, 75 insertions(+), 97 deletions(-)
diff --git a/d
From: Tvrtko Ursulin
A bunch of source files with just a few instances of the
incorrect INTEL_INFO use.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_color.c| 5 ++---
drivers/gpu/drm/i915/intel_crt.c | 15 ++-
drivers/gpu/drm/i915/intel_ddi.c | 10 +++
From: Tvrtko Ursulin
Yet more churn. :) But good news are they are mostly really small patches, with
the exception to intel_display.c and some heavier function prototype changes
in i915_gem_gtt.c. Just to avoid having a lot of functions which take dev and
actually need dev_priv.
Small shrink of
From: Tvrtko Ursulin
And a little bit of cascaded function prototype changes.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h| 2 +-
drivers/gpu/drm/i915/i915_gem_gtt.c| 2 +-
drivers/gpu/drm/i915/i915_gem_stolen.c | 14 ++
3 files changed, 8 inserti
Soft-pinning depends upon being able to check for availabilty of an
interval and evict overlapping object from a drm_mm range manager very
quickly. Currently it uses a linear list, and so performance is dire and
not suitable as a general replacement. Worse, the current code will oops
if it tries to
Hi Tvrtko,
On Wednesday 16 November 2016 01:55 PM, Tvrtko Ursulin wrote:
On 15/11/2016 17:19, Praveen Paneri wrote:
Decoupled MMIO is an alternative way to access forcewake domain
registers, which requires less cycles for a single read/write and
avoids frequent software forcewake.
This certain
Move the GuC invalidation of its ggtt TLB to where we perform the ggtt
modification rather than proliferate it into all the callers of the
insert (which may or may not in fact have to do the insertion).
v2: Just do the guc invalidate unconditionally, (afaict) it has no impact
without the guc loade
---
drivers/gpu/drm/i915/i915_params.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_params.c
b/drivers/gpu/drm/i915/i915_params.c
index d46ffe7086bc..599b913d8906 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_p
On 16/11/2016 08:55, Chris Wilson wrote:
On Wed, Nov 16, 2016 at 08:49:24AM +, Tvrtko Ursulin wrote:
On 15/11/2016 11:16, Chris Wilson wrote:
Move the GuC invalidation of its ggtt TLB to where we perform the ggtt
modification rather than proliferate it into all the callers of the
insert (
On Wed, Nov 16, 2016 at 08:55:30AM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Yet more churn. :) But good news are they are mostly really small patches,
> with
> the exception to intel_display.c and some heavier function prototype changes
> in i915_gem_gtt.c. Just to avoid having a
On 16/11/2016 09:03, Praveen Paneri wrote:
Hi Tvrtko,
On Wednesday 16 November 2016 01:55 PM, Tvrtko Ursulin wrote:
On 15/11/2016 17:19, Praveen Paneri wrote:
Decoupled MMIO is an alternative way to access forcewake domain
registers, which requires less cycles for a single read/write and
avo
On Wed, Nov 16, 2016 at 09:05:41AM +, Chris Wilson wrote:
> On Wed, Nov 16, 2016 at 08:55:30AM +, Tvrtko Ursulin wrote:
> > From: Tvrtko Ursulin
> >
> > Yet more churn. :) But good news are they are mostly really small patches,
> > with
> > the exception to intel_display.c and some heavi
== Series Details ==
Series: Remove __I915__ magic macro
URL : https://patchwork.freedesktop.org/series/15393/
State : success
== Summary ==
Series 15393v1 Remove __I915__ magic macro
https://patchwork.freedesktop.org/api/1.0/series/15393/revisions/1/mbox/
fi-bdw-5557u total:244 pass:22
On Wed, Nov 16, 2016 at 09:08:30AM +, Tvrtko Ursulin wrote:
>
> On 16/11/2016 09:03, Praveen Paneri wrote:
> >Hi Tvrtko,
> >
> >On Wednesday 16 November 2016 01:55 PM, Tvrtko Ursulin wrote:
> >>
> >>On 15/11/2016 17:19, Praveen Paneri wrote:
> >>>Decoupled MMIO is an alternative way to access
To find out what firmware we actually loaded (from dmesg) the explicit
'dmc' and 'firmware' are missing from the info printout. Add them.
Cc: Imre Deak
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/intel_csr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/g
On 15/11/2016 18:15, Patchwork wrote:
== Series Details ==
Series: drm/i915/bxt: Broxton decoupled MMIO (rev5)
URL : https://patchwork.freedesktop.org/series/12028/
State : success
== Summary ==
Series 12028v5 drm/i915/bxt: Broxton decoupled MMIO
https://patchwork.freedesktop.org/api/1.0/se
== Series Details ==
Series: drm/i915: Fix i915_gem_evict_for_vma (soft-pinning)
URL : https://patchwork.freedesktop.org/series/15395/
State : warning
== Summary ==
Series 15395v1 drm/i915: Fix i915_gem_evict_for_vma (soft-pinning)
https://patchwork.freedesktop.org/api/1.0/series/15395/revisio
Op 08-11-16 om 14:56 schreef Mika Kahola:
> This is a testcase with multiple planes. The idea here is the following
>
> - draw a uniform frame with blue color
> - grab crc for reference
> - put planes randomly on top with the same blue color
> - punch holes with black color into the primary fra
On Wed, Nov 16, 2016 at 09:46:21AM -, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Fix i915_gem_evict_for_vma (soft-pinning)
> URL : https://patchwork.freedesktop.org/series/15395/
> State : warning
>
> == Summary ==
>
> Series 15395v1 drm/i915: Fix i915_gem_evict_for_vma
On Wed, 16 Nov 2016, Chris Wilson wrote:
> On Wed, Nov 16, 2016 at 09:05:41AM +, Chris Wilson wrote:
>> I read them on trybot and couldn't see anything I didn't object to, so
>
> Argh, incorrect double negative. Fire the editor.
I thought the original was more becoming of you! ;)
On the seri
On 16/11/2016 09:16, Patchwork wrote:
== Series Details ==
Series: Remove __I915__ magic macro
URL : https://patchwork.freedesktop.org/series/15393/
State : success
== Summary ==
Series 15393v1 Remove __I915__ magic macro
https://patchwork.freedesktop.org/api/1.0/series/15393/revisions/1/mb
We no longer cater for pre-production revisions of Skylake.
Fixes: d4362225e8cb ("drm/i915/gvt: update misc ctl regs base on stepping info")
Cc: Ping Gao
Cc: Zhenyu Wang
Cc: Zhi Wang
Cc:
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gvt/handlers.c | 6 ++
1 file changed, 2 insertio
On Thu, Nov 03, 2016 at 06:36:45PM +0200, Jani Nikula wrote:
> On Thu, 03 Nov 2016, Marius Vlad wrote:
> > v5:
> > - reworked gem_info to gem_sanitychecks (Chris Wilson)
> > - remove subgroups/subtests for gem_exec_store and gem_sanitycheck
> > (Chris Wilson)
> >
> > v4:
> > - adjust test to make
On ke, 2016-11-16 at 11:33 +0200, Mika Kuoppala wrote:
> To find out what firmware we actually loaded (from dmesg) the explicit
> 'dmc' and 'firmware' are missing from the info printout. Add them.
>
> Cc: Imre Deak
> Signed-off-by: Mika Kuoppala
Reviewed-by: Imre Deak
> ---
> drivers/gpu/drm
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Invalidate the guc ggtt TLB
upon insertion
URL : https://patchwork.freedesktop.org/series/15396/
State : failure
== Summary ==
Series 15396v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/15396
On Wed, Nov 16, 2016 at 10:54:15AM -, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [CI,1/2] drm/i915: Invalidate the guc ggtt TLB
> upon insertion
> URL : https://patchwork.freedesktop.org/series/15396/
> State : failure
>
> == Summary ==
>
> Series 15396v1 Ser
---
drivers/gpu/drm/i915/i915_params.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_params.c
b/drivers/gpu/drm/i915/i915_params.c
index d46ffe7086bc..599b913d8906 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_p
== Series Details ==
Series: drm/i915: Add more keywords to firmware loading message
URL : https://patchwork.freedesktop.org/series/15397/
State : success
== Summary ==
Series 15397v1 drm/i915: Add more keywords to firmware loading message
https://patchwork.freedesktop.org/api/1.0/series/15397
This patch, or
commit 20311bd35060435badba8a0d46b06d5d184abaf7
Author: Chris Wilson
Date: Mon Nov 14 20:41:03 2016 +
drm/i915/scheduler: Execute requests in order of priorities
tricks sparse into warnings. It makes me unhappy to see the sparse
warnings accumulate because that will ev
Another spin of [1]. The pain point seems to be the CADL update based on
the list of active connectors. So I left it out for now, and instead
just hack it to ensure CADL contains the internal displays.
Let's see if this sticks. It shouldn't prevent us from fixing CADL
update properly down the line
The graphics driver is supposed to define the DIDL, which are used for
_DOD, not the BIOS. Restore that behaviour.
This is basically a revert of
commit 3143751ff51a163b77f7efd389043e038f3e008e
Author: Zhang Rui
Date: Mon Mar 29 15:12:16 2010 +0800
drm/i915: set DIDL using the ACPI video o
The attempts to update CADL based on the actual active connectors have
not been successful. That is the right thing to do ultimately, but there
must be something we're still missing.
In the mean time, change the dumb CADL initialization we currently have
to put internal panels in front of the CADL
This is essentially the same thing as duplicating DIDL now that the
connector list has the ACPI device IDs.
Cc: Peter Wu
Cc: Rainer Koenig
Cc: Jan-Marek Glogowski
Cc: Maarten Lankhorst
Cc: Marcos Paulo de Souza
Cc: Paolo Stivanin
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_op
> -Original Message-
> From: Daniel Stone [mailto:dan...@fooishbar.org]
> Sent: Tuesday, November 15, 2016 3:20 PM
> To: Kahola, Mika
> Cc: intel-gfx
> Subject: Re: [Intel-gfx] [PATCH i-g-t] tests/kms_plane_lowres: Plane
> visibility
> after atomic modesets
>
> Hi Mika,
>
> On 15 Nov
Thanks for the review!
Cheers,
Mika
> -Original Message-
> From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com]
> Sent: Wednesday, November 16, 2016 11:48 AM
> To: Kahola, Mika ; intel-gfx@lists.freedesktop.org
> Cc: Latvala, Petri ; dan...@ffwll.ch
> Subject: Re: [PATCH i-g
== Series Details ==
Series: drm/i915/gvt: drop checks for early Skylake revisions
URL : https://patchwork.freedesktop.org/series/15400/
State : success
== Summary ==
Series 15400v1 drm/i915/gvt: drop checks for early Skylake revisions
https://patchwork.freedesktop.org/api/1.0/series/15400/rev
Hi,
On Friday 04 November 2016 12:36 AM, Paulo Zanoni wrote:
Em Qui, 2016-10-13 às 16:28 +0530, Kumar, Mahesh escreveu:
This patch adds support to decode system memory bandwidth
which will be used for arbitrated display memory percentage
calculation in GEN9 based system.
Changes from v1:
-
On 15 November 2016 at 22:44, Lyude Paul wrote:
> I'm fine with libsoup as well, I'll check it out and probably move all
> of the code over to using that instead.
Cool.
> On Tue, 2016-11-15 at 12:44 +0100, Tomeu Vizoso wrote:
>> On 11 November 2016 at 18:53, Lyude Paul wrote:
>> > > > - While
---
drivers/gpu/drm/i915/i915_params.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_params.c
b/drivers/gpu/drm/i915/i915_params.c
index d46ffe7086bc..599b913d8906 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_p
Something I missed before sending off the partial series was that the
non-scheduler guc reset path was broken (in the full series, this is
pushed to the execlists reset handler). The issue is that after a reset,
we have to refill the GuC workqueues, which we do by resubmitting the
requests. However
== Series Details ==
Series: HAX drm/i915: Enable guc submission
URL : https://patchwork.freedesktop.org/series/15402/
State : failure
== Summary ==
Series 15402v1 HAX drm/i915: Enable guc submission
https://patchwork.freedesktop.org/api/1.0/series/15402/revisions/1/mbox/
Test drv_module_relo
On 15 November 2016 at 09:27, Jani Nikula wrote:
> On Tue, 15 Nov 2016, David Weinehall wrote:
>> On Mon, Nov 14, 2016 at 12:44:25PM +0200, Jani Nikula wrote:
>>> On Thu, 06 Oct 2016, Tomeu Vizoso wrote:
>>> > diff --git a/drivers/gpu/drm/i915/intel_display.c
>>> > b/drivers/gpu/drm/i915/intel_
We don't spam the debug when we create a normal object, nor when we
allocate their pages. Yet we do for stolen objects, and since these are
quite frequently used (at least once per context), the resulting spam
floods the dmesg in CI.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_
Em Qua, 2016-11-16 às 12:13 +0200, Jani Nikula escreveu:
> We no longer cater for pre-production revisions of Skylake.
Reviewed-by: Paulo Zanoni
>
> Fixes: d4362225e8cb ("drm/i915/gvt: update misc ctl regs base on
> stepping info")
> Cc: Ping Gao
> Cc: Zhenyu Wang
> Cc: Zhi Wang
> Cc:
> Sig
From: Tvrtko Ursulin
v2: Rebase.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 3 +-
drivers/gpu/drm/i915/intel_display.c | 167 +++
3 files changed, 75 insertions(+), 97 deletions(-)
d
Em Qui, 2016-11-10 às 11:24 +0530, Mahesh Kumar escreveu:
> Hi,
>
>
>
(removed a bunch of stuff here)
> >
> > >
> >
> >
> > >
> > > + bool y_tile_enabled = false;
> > > +
> > if (!platforms_that_require_the_wa) {
> > wa = WATERMARK_WA_NONE;
> > return;
> > }
> this function is not
On 16/11/2016 12:26, Chris Wilson wrote:
We don't spam the debug when we create a normal object, nor when we
allocate their pages. Yet we do for stolen objects, and since these are
quite frequently used (at least once per context), the resulting spam
floods the dmesg in CI.
Signed-off-by: Chris
== Series Details ==
Series: drm/i915/opregion: proper handling of DIDL, and some hacks on CADL
URL : https://patchwork.freedesktop.org/series/15403/
State : failure
== Summary ==
Series 15403v1 drm/i915/opregion: proper handling of DIDL, and some hacks on
CADL
https://patchwork.freedesktop.o
On 16/11/2016 12:20, Chris Wilson wrote:
Something I missed before sending off the partial series was that the
non-scheduler guc reset path was broken (in the full series, this is
pushed to the execlists reset handler). The issue is that after a reset,
we have to refill the GuC workqueues, which
Op 03-11-16 om 16:11 schreef Ville Syrjälä:
> On Wed, Nov 02, 2016 at 09:28:46AM +0100, Maarten Lankhorst wrote:
>> Op 01-11-16 om 14:41 schreef Ville Syrjälä:
>>> On Tue, Nov 01, 2016 at 02:34:00PM +0100, Maarten Lankhorst wrote:
Op 01-11-16 om 14:09 schreef Ville Syrjälä:
> On Mon, Oct 1
On Wed, 16 Nov 2016, Tomeu Vizoso wrote:
> On 15 November 2016 at 09:27, Jani Nikula wrote:
>> On Tue, 15 Nov 2016, David Weinehall wrote:
>>> On Mon, Nov 14, 2016 at 12:44:25PM +0200, Jani Nikula wrote:
On Thu, 06 Oct 2016, Tomeu Vizoso wrote:
> diff --git a/drivers/gpu/drm/i915/inte
On Wed, Nov 16, 2016 at 12:53:07PM +, Tvrtko Ursulin wrote:
> On 16/11/2016 12:20, Chris Wilson wrote:
> >@@ -1538,8 +1541,7 @@ int i915_guc_submission_enable(struct drm_i915_private
> >*dev_priv)
> > list_for_each_entry(request,
> > &engine->timelin
* Fix for Haswell in generating a dummy reloc
* code cleanups / api name clarifications
- Abdiel
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
More and more test-cases are using this.
Signed-off-by: Abdiel Janulgue
---
lib/igt_aux.c | 11 ---
lib/igt_aux.h | 10 ++
lib/igt_core.c | 3 ---
tests/drv_hangman.c | 1 -
4 files changed, 10 insertions(+), 15 deletions(-)
diff --git a/lib/igt_aux.c b/lib/ig
v7: Adapt to api rename
Cc: Chris Wilson
Cc: Daniel Vetter
Signed-off-by: Abdiel Janulgue
---
tests/gem_wait.c | 129 +++
1 file changed, 7 insertions(+), 122 deletions(-)
diff --git a/tests/gem_wait.c b/tests/gem_wait.c
index b4127de..d2920
A lot of igt testcases need some GPU workload to make sure a race
window is big enough. Unfortunately having a fixed amount of
workload leads to spurious test failures or overtly long runtimes
on some fast/slow platforms. This library contains functionality
to submit GPU workloads that should consu
v7: Reuse NSEC_PER_SEC defines
Cc: Chris Wilson
Cc: Daniel Vetter
Signed-off-by: Abdiel Janulgue
---
tests/kms_flip.c | 188 ++-
1 file changed, 4 insertions(+), 184 deletions(-)
diff --git a/tests/kms_flip.c b/tests/kms_flip.c
index 2a9fe2e
v7: Adapt to api rename
Cc: Chris Wilson
Cc: Daniel Vetter
Signed-off-by: Abdiel Janulgue
---
tests/kms_busy.c | 75 +++-
1 file changed, 4 insertions(+), 71 deletions(-)
diff --git a/tests/kms_busy.c b/tests/kms_busy.c
index b555f99..680aeb
== Series Details ==
Series: series starting with [1/2] HAX drm/i915: Enable guc submission
URL : https://patchwork.freedesktop.org/series/15407/
State : failure
== Summary ==
Series 15407v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/15407/revisions/1/mbox/
T
For a singl_port_submission context, it can only be submitted to port 0,
and there shouldn't be any other context in port 1 at the same time. This
is required by GVT-g context to have an opportunity to save/restore some
non-hw context render registers.
This patch is to implement the correct logic i
On Wed, Nov 16, 2016 at 01:24:26PM -, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [1/2] HAX drm/i915: Enable guc submission
> URL : https://patchwork.freedesktop.org/series/15407/
> State : failure
>
> == Summary ==
>
> Series 15407v1 Series without cover lette
Something I missed before sending off the partial series was that the
non-scheduler guc reset path was broken (in the full series, this is
pushed to the execlists reset handler). The issue is that after a reset,
we have to refill the GuC workqueues, which we do by resubmitting the
requests. However
On Wed, Nov 16, 2016 at 09:32:56PM +0800, Min He wrote:
> For a singl_port_submission context, it can only be submitted to port 0,
> and there shouldn't be any other context in port 1 at the same time. This
> is required by GVT-g context to have an opportunity to save/restore some
> non-hw context
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Wednesday, November 16, 2016 9:48 PM
> To: He, Min
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH v2] drm/i915: fix the dequeue logic for
> single_port_submission context
>
> On W
On Wed, Nov 16, 2016 at 11:18:01PM +0200, Abdiel Janulgue wrote:
> A lot of igt testcases need some GPU workload to make sure a race
> window is big enough. Unfortunately having a fixed amount of
> workload leads to spurious test failures or overtly long runtimes
> on some fast/slow platforms. This
On 16 November 2016 at 13:58, Jani Nikula wrote:
> On Wed, 16 Nov 2016, Tomeu Vizoso wrote:
>> On 15 November 2016 at 09:27, Jani Nikula
>> wrote:
>>> On Tue, 15 Nov 2016, David Weinehall wrote:
On Mon, Nov 14, 2016 at 12:44:25PM +0200, Jani Nikula wrote:
> On Thu, 06 Oct 2016, Tomeu
On 16.11.2016 15:56, Chris Wilson wrote:
> On Wed, Nov 16, 2016 at 11:18:01PM +0200, Abdiel Janulgue wrote:
>> A lot of igt testcases need some GPU workload to make sure a race
>> window is big enough. Unfortunately having a fixed amount of
>> workload leads to spurious test failures or overtly l
On Wed, 16 Nov 2016, Tomeu Vizoso wrote:
> On 16 November 2016 at 13:58, Jani Nikula wrote:
>> On Wed, 16 Nov 2016, Tomeu Vizoso wrote:
>>> On 15 November 2016 at 09:27, Jani Nikula
>>> wrote:
On Tue, 15 Nov 2016, David Weinehall wrote:
> On Mon, Nov 14, 2016 at 12:44:25PM +0200, Jan
On Wed, Nov 16, 2016 at 04:08:30PM +0200, Jani Nikula wrote:
> On Wed, 16 Nov 2016, Tomeu Vizoso wrote:
> > On 16 November 2016 at 13:58, Jani Nikula
> > wrote:
> >> On Wed, 16 Nov 2016, Tomeu Vizoso wrote:
> >>> On 15 November 2016 at 09:27, Jani Nikula
> >>> wrote:
> On Tue, 15 Nov 201
== Series Details ==
Series: Remove __I915__ magic macro (rev2)
URL : https://patchwork.freedesktop.org/series/15393/
State : warning
== Summary ==
Series 15393v2 Remove __I915__ magic macro
https://patchwork.freedesktop.org/api/1.0/series/15393/revisions/2/mbox/
Test kms_force_connector_basi
On Wed, Nov 16, 2016 at 04:07:33PM +0200, Abdiel Janulgue wrote:
>
>
> On 16.11.2016 15:56, Chris Wilson wrote:
> > On Wed, Nov 16, 2016 at 11:18:01PM +0200, Abdiel Janulgue wrote:
> >> A lot of igt testcases need some GPU workload to make sure a race
> >> window is big enough. Unfortunately havi
For a singl_port_submission context, it can only be submitted to port 0,
and there shouldn't be any other context in port 1 at the same time. This
is required by GVT-g context to have an opportunity to save/restore some
non-hw context render registers.
This patch is to implement the correct logic i
On Mon, 07 Nov 2016, Rainer Koenig wrote:
> this is sad and also bad news. Means that actually we don't have any
> driver which makes the brightness keys on the Fujitsu LIFEBOOK E7x6
> series work.
I hope we can make this work [1].
BR,
Jani.
[1] https://patchwork.freedesktop.org/series/15403/
On Wed, Nov 16, 2016 at 08:58:30AM +, Chris Wilson wrote:
> Soft-pinning depends upon being able to check for availabilty of an
> interval and evict overlapping object from a drm_mm range manager very
> quickly. Currently it uses a linear list, and so performance is dire and
> not suitable as a
On Wed, Nov 16, 2016 at 01:54:45PM +, He, Min wrote:
>
> > -Original Message-
> > From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> > Sent: Wednesday, November 16, 2016 9:48 PM
> > To: He, Min
> > Cc: intel-gfx@lists.freedesktop.org
> > Subject: Re: [Intel-gfx] [PATCH v2] drm/i91
== Series Details ==
Series: series starting with [1/2] HAX drm/i915: Enable guc submission (rev2)
URL : https://patchwork.freedesktop.org/series/15407/
State : failure
== Summary ==
Series 15407v2 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/15407/revisions/2/m
On Wed, Nov 16, 2016 at 03:41:53PM +0100, Daniel Vetter wrote:
> On Wed, Nov 16, 2016 at 08:58:30AM +, Chris Wilson wrote:
> > Soft-pinning depends upon being able to check for availabilty of an
> > interval and evict overlapping object from a drm_mm range manager very
> > quickly. Currently it
Something I missed before sending off the partial series was that the
non-scheduler guc reset path was broken (in the full series, this is
pushed to the execlists reset handler). The issue is that after a reset,
we have to refill the GuC workqueues, which we do by resubmitting the
requests. However
== Series Details ==
Series: drm/i915: fix the dequeue logic for single_port_submission context
(rev3)
URL : https://patchwork.freedesktop.org/series/15391/
State : success
== Summary ==
Series 15391v3 drm/i915: fix the dequeue logic for single_port_submission
context
https://patchwork.freed
In order to simplify hangcheck state keeping, split hangcheck
per engine loop in three phases: state load, action, state save.
Add few more hangcheck actions to separate between seqno, head
and subunit movements. This helps to gather all the hangcheck
actions under a single switch umbrella.
Cc: C
As hangcheck score was removed, the active decay of score
was removed also. This removed feature for hangcheck to detect
if the gpu client was accidentally or maliciously causing intermittent
hangs. Reinstate the scoring as a per context property, so that if
one context starts to act unfavourably,
Avoid requiring struct_mutex for exclusive access to the temporary
dfs_link inside the i915_dependency as not all callers may want to touch
struct_mutex. So rather than force them to take a highly contended
lock, introduce a local lock for the execlists schedule operation.
Reported-by: David Weine
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