Storing the port enum in intel_encoder makes it convenient to know the
port attached to an encoder. Moving the port information up from
intel_digital_port to intel_encoder avoids unecessary intel_digital_port
access and handles MST encoders cleanly without requiring conditional
checks for them (tha
This series lays the groundwork for more DP MST audio work that will
follow.
v2:
Different solution replacing the enc_to_dig_port() fix (Ville, Lyude).
No changes to MST audio enabling and move audio_connector patches.
Reordered the patches (Lyude)
v3:
Different solution to get port from encoder
With DP MST, a digital_port can carry more than one audio stream. Hence,
more than one audio_connector needs to be attached to intel_digital_port in
such cases. However, each stream is associated with an unique encoder. So,
instead of creating an array of audio_connectors per port, move
audio_conne
From: Libin Yang
(This patch is developed by Dave Airlie originally)
This patch adds support for DP MST audio in i915.
Enable audio codec when DP MST is enabled if has_audio flag is set.
Disable audio codec when DP MST is disabled if has_audio flag is set.
Another separated patches to support
Now that we have the port enum stored in intel_encoder, use that instead of
dereferencing intel_dig_port. Saves us a few locals.
struct intel_encoder variables have been renamed to be consistent and
convey type information.
Signed-off-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/i915/intel_audio
It is possible that from Skylake onwards the initial plane is tiled in
some other format than X. Copy across this information to the object
when such formats are fence-able.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_display.c | 11 +--
1 file changed, 9 insertions(+), 2
When determining the initial plane config we set the same information in
both the framebuffer (fb.modifier[0]) and in plane_config.tiling.
Ultimately, we only need the information in the framebuffer so remove
the redundant copy from plane_config.tiling
Signed-off-by: Chris Wilson
---
drivers/gpu
When FBC is enabled, access through the fbdev is tracked using
ORIGIN_GTT, i.e. native hw tracking by FBC. This requires the
framebuffer to be fenced, which requires us to allocate the object
as X-tiled.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_fbdev.c | 13 +++--
1 fil
We can only use ORIGIN_GTT if the writes through the GTT can be tracked
by HW, i.e. if the region is fenced. If we do not fence the object,
declare the writes as originating from the CPU and do a full
invalidation.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_fbdev.c | 47 +
Hi Dave,
drm-intel-next-2016-08-22:
- bugfixes and cleanups for rcu-protected requests (Chris)
- atomic modeset fixes for gpu reset on pre-g4x (Maarten&Ville)
- guc submission improvements (Dave Gordon)
- panel power sequence cleanup (Imre)
- better use of stolen and unmappable ggtt (Chris), plus
Allow the casual user to run igt_command_line.sh to discover what make
check is complaining about.
Signed-off-by: Chris Wilson
---
lib/tests/igt_command_line.sh | 22 +++---
1 file changed, 15 insertions(+), 7 deletions(-)
diff --git a/lib/tests/igt_command_line.sh b/lib/tests/i
On Sun, Aug 21, 2016 at 09:39:17PM +0530, Kamble, Sagar A wrote:
>
>
> On 8/21/2016 2:09 PM, Chris Wilson wrote:
> >On Sun, Aug 21, 2016 at 11:39:22AM +0530, Kamble, Sagar A wrote:
> >>
> >>On 8/20/2016 1:32 PM, Chris Wilson wrote:
> >>>On Sat, Aug 20, 2016 at 10:39:25AM +0530, Sagar Arun Kamble
Removes useless warnings if a caller of a function
does not use its returned value(s). Mostly aesthetic.
Signed-off-by: Marius Vlad
CC: Chris Wilson
CC: Daniel Vetter
---
tests/Makefile.am | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/Makefile.am b/tests/Makefile.am
On Fri, Apr 29, 2016 at 04:11:19PM +0300, Marius Vlad wrote:
> We need to have the test list generated before running the check target.
> Migrated igt_command_line.sh to tests/ from lib/tests/, which allows to
> building the tests and execute the script.
>
> This would allow cleaning followed by a
While at it add SIGFPE as a crash signal.
v3: Remove calls to igt_assert_eq() as these are not async-safe. As one
user of this method remove the function pointer and recursive call.
(Chris Wilson)
v2: Added some helpers to avoid printf() inside a signal handler.
(Chris Wilson)
---
lib/igt_core.c
On Wed, Aug 24, 2016 at 08:20:31AM +0100, Chris Wilson wrote:
> When determining the initial plane config we set the same information in
> both the framebuffer (fb.modifier[0]) and in plane_config.tiling.
> Ultimately, we only need the information in the framebuffer so remove
> the redundant copy f
== Series Details ==
Series: series starting with [1/2] drm/i915: Replace initial
plane_config.tiling with fb modifier
URL : https://patchwork.freedesktop.org/series/11507/
State : failure
== Summary ==
Series 11507v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series
On Wed, Aug 24, 2016 at 10:47:22AM +0200, David Weinehall wrote:
> On Wed, Aug 24, 2016 at 08:20:31AM +0100, Chris Wilson wrote:
> > When determining the initial plane config we set the same information in
> > both the framebuffer (fb.modifier[0]) and in plane_config.tiling.
> > Ultimately, we only
On Wed, Aug 24, 2016 at 09:56:29AM +0100, Chris Wilson wrote:
> On Wed, Aug 24, 2016 at 10:47:22AM +0200, David Weinehall wrote:
> > On Wed, Aug 24, 2016 at 08:20:31AM +0100, Chris Wilson wrote:
> > > When determining the initial plane config we set the same information in
> > > both the framebuffe
On Wed, Aug 24, 2016 at 07:10:15AM +0100, Chris Wilson wrote:
> drm_atomic_state has a complicated single owner model that tracks the
> single reference from allocation through to destruction on another
> thread - or perhaps on a local error path. We can simplify this tracking
> by using reference
In order for the RC6 autoenable worker to take any action, RC6 first
must be disabled. Upon resume or reset, the sw state may be stale and so
we require a forced restore.
Fixes: b7137e0cf1e5 ("drm/i915: Defer enabling rc6 til after we submit...")
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc:
On 23 August 2016 at 20:21, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: free intel_fb
> URL : https://patchwork.freedesktop.org/series/11477/
> State : failure
>
> == Summary ==
>
> Series 11477v1 drm/i915: free intel_fb
> http://patchwork.freedesktop.org/api/1.0/series/11477/r
The D_COMP (render decompression) register write is followed by a status
check and another error (either that the decompression shutdown or the
lpll is enabled). Since we are followed by another, more pertinent,
error we can reduce the pcode timeout to a debug and squelch a sporadic
error message d
== Series Details ==
Series: series starting with [1/2] drm/i915/fbdev: ORIGIN_GTT is only suitable
for tracked writes
URL : https://patchwork.freedesktop.org/series/11509/
State : failure
== Summary ==
Series 11509v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series
On Wed, Aug 24, 2016 at 08:20:32AM +0100, Chris Wilson wrote:
> It is possible that from Skylake onwards the initial plane is tiled in
> some other format than X. Copy across this information to the object
> when such formats are fence-able.
>
> Signed-off-by: Chris Wilson
So this makes an impli
On Wed, Aug 24, 2016 at 08:39:52AM +0100, Chris Wilson wrote:
> When FBC is enabled, access through the fbdev is tracked using
> ORIGIN_GTT, i.e. native hw tracking by FBC. This requires the
> framebuffer to be fenced, which requires us to allocate the object
> as X-tiled.
>
> Signed-off-by: Chris
On Wed, Aug 24, 2016 at 7:54 AM, Daniel Vetter wrote:
> On Mon, Aug 22, 2016 at 09:39:17PM -0300, Paulo Zanoni wrote:
>> 2016-08-18 5:21 GMT-03:00 Chris Wilson :
>> > Only fbc1 is tied to using a fence. Later iterations of fbc are more
>> > flexible and allow operation on unfenced frontbuffers.
>>
== Series Details ==
Series: drm/i915: free intel_fb
URL : https://patchwork.freedesktop.org/series/11477/
State : success
== Summary ==
Series 11477v1 drm/i915: free intel_fb
http://patchwork.freedesktop.org/api/1.0/series/11477/revisions/1/mbox/
Test gem_exec_suspend:
Subgroup basic
On Wed, Aug 24, 2016 at 01:05:18PM +0200, Daniel Vetter wrote:
> On Wed, Aug 24, 2016 at 08:39:52AM +0100, Chris Wilson wrote:
> > When FBC is enabled, access through the fbdev is tracked using
> > ORIGIN_GTT, i.e. native hw tracking by FBC. This requires the
> > framebuffer to be fenced, which req
On Wed, Aug 24, 2016 at 1:16 PM, Chris Wilson wrote:
>> > + if (i915.enable_fbc) {
>> > + obj->tiling_and_stride = mode_cmd.pitches[0] | I915_TILING_X;
>> > + mode_cmd.modifier[0] = I915_FORMAT_MOD_X_TILED;
>> > + mode_cmd.flags |= DRM_MODE_FB_MODIFIERS;
>> > + }
On 24 August 2016 at 11:16, Chris Wilson wrote:
> The D_COMP (render decompression) register write is followed by a status
> check and another error (either that the decompression shutdown or the
> lpll is enabled). Since we are followed by another, more pertinent,
> error we can reduce the pcode
On Tue, 23 Aug 2016, David Weinehall wrote:
> On Tue, Aug 23, 2016 at 10:25:58AM +0100, Chris Wilson wrote:
>> If we hit the error path, we have never called drm_encoder_init() and so
>> have nothing to cleanup. Doing so hits a null dereference:
>>
>> [ 10.066261] BUG: unable to handle kernel N
Chris Wilson writes:
> In order for the RC6 autoenable worker to take any action, RC6 first
> must be disabled. Upon resume or reset, the sw state may be stale and so
> we require a forced restore.
>
> Fixes: b7137e0cf1e5 ("drm/i915: Defer enabling rc6 til after we submit...")
> Signed-off-by: Ch
Hi,
There also seems to be SUCCESS results for the series, strange.
Anyway, pushed it. Thanks for the patch and review!
Regards, Joonas
On ke, 2016-08-24 at 11:06 +0100, Matthew Auld wrote:
> On 23 August 2016 at 20:21, Patchwork wrote:
> >
> > == Series Details ==
> >
> > Series: drm/i915:
On Wed, Aug 24, 2016 at 04:08:29PM +0300, Joonas Lahtinen wrote:
> Hi,
>
> There also seems to be SUCCESS results for the series, strange.
fi-bsw-n3050 was repaired and the test rerun, that seems to have done
the trick.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
___
Chris Wilson writes:
> Adding to the tail of the client request list as the only other user is
> in the throttle ioctl that iterates forwards over the list. It only
> needs protection against deletion of a request as it reads it, it simply
> won't see a new request added to the end of the list, o
On 22/08/2016 09:03, Chris Wilson wrote:
Combine the two slightly overlapping parameter structures we pass around
the execbuffer routines into one.
Should also include something about also renaming and refactoring the
eb_* / i915_gem_execbuffer_* helper functions too.
Also, while you are doing
== Series Details ==
Series: drm/i915: Suppress DRM_ERROR for D_COMP write on Haswell
URL : https://patchwork.freedesktop.org/series/11516/
State : failure
== Summary ==
Series 11516v1 drm/i915: Suppress DRM_ERROR for D_COMP write on Haswell
http://patchwork.freedesktop.org/api/1.0/series/1151
@Chris: I assume this is no longer necessary with the split to kms_busy?
On Tue, Aug 23, 2016 at 09:44:14AM +, Gore, Tim wrote:
>
>
> Tim Gore
> Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ
>
>
> > -Original Message-
> > From: Morton, Derek J
> > S
On Wed, Aug 24, 2016 at 04:16:55PM +0300, Mika Kuoppala wrote:
> Chris Wilson writes:
> > index 7b8abda541e6..e432211e8b24 100644
> > --- a/drivers/gpu/drm/i915/i915_gem.c
> > +++ b/drivers/gpu/drm/i915/i915_gem.c
> > @@ -3673,16 +3673,14 @@ i915_gem_ring_throttle(struct drm_device *dev,
> > stru
On Wed, 24 Aug 2016, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the drm-intel tree got a conflict in:
>
> drivers/gpu/drm/i915/intel_display.c
>
> between commits from the drm-intel-fixes tree (some of which are
> cherry-picked from the drm-intel tree) and teh same and oth
On Wed, Aug 24, 2016 at 04:25:06PM +0300, Marius Vlad wrote:
> @Chris: I assume this is no longer necessary with the split to kms_busy?
You probably want to change the gem_busy in this patch to kms_busy, so
that kms_busy doesn't get built without cairo?
-Chris
--
Chris Wilson, Intel Open Source
On 2016-08-24 02:01 AM, Daniel Vetter wrote:
On Tue, Aug 23, 2016 at 01:56:02PM -0400, robert.f...@collabora.com wrote:
From: Robert Foss
This series implements the sw_sync test and the lib/sw_sync helper functions
for said test.
Gustavo Padovans sw_sync series was just de-staged in
gregkh-
I put a rule in the android make file a while back that automatically adds any
test starting kms_ to the cairo dependant list, so kms_busy will not need to be
listed explicitly.
//Derek
-Original Message-
From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
Sent: Wednesday, August 24,
Since we are experiencing too much noise in BAT from what just looks
like scheduling delays in inspecting the vblank, reduce the basic test
to the fundament: check that the cursor ioctl following the nonblocking
flip/modeset occurs within the same vblank. However, CI + debug builds
are fast enough.
On Wed, Aug 24, 2016 at 03:06:25PM +0100, Chris Wilson wrote:
> Since we are experiencing too much noise in BAT from what just looks
> like scheduling delays in inspecting the vblank, reduce the basic test
> to the fundament: check that the cursor ioctl following the nonblocking
fundametal
> flip
Em Qua, 2016-08-24 às 07:43 +0100, Chris Wilson escreveu:
> On Mon, Aug 22, 2016 at 09:39:17PM -0300, Paulo Zanoni wrote:
> >
> > 2016-08-18 5:21 GMT-03:00 Chris Wilson :
> > >
> > > Only fbc1 is tied to using a fence. Later iterations of fbc are
> > > more
> > > flexible and allow operation on u
On Wed, Aug 24, 2016 at 03:16:15PM +0100, Chris Wilson wrote:
> On Wed, Aug 24, 2016 at 03:06:25PM +0100, Chris Wilson wrote:
> > Since we are experiencing too much noise in BAT from what just looks
> > like scheduling delays in inspecting the vblank, reduce the basic test
> > to the fundament: che
On 22/08/2016 09:03, Chris Wilson wrote:
As i915.enable_cmd_parser is an unsafe option, make it read-only at
runtime. Now that it is constant, we can use the value determined during
initialisation as to whether we need the cmdparser at execbuffer time.
I'm confused. I can't see where i915.enable_
The comment which documents the proper usage of the *_FW family of macros makes
reference to intel_uncore_forcewake_irq{unlock, lock}, which is just
confusing, seeing as such a set of functions don't even exist and never have
for that matter(according to git). Let's fix that by replacing them with
== Series Details ==
Series: drm/i915: fix comment referencing imaginary functions
URL : https://patchwork.freedesktop.org/series/11527/
State : failure
== Summary ==
Series 11527v1 drm/i915: fix comment referencing imaginary functions
http://patchwork.freedesktop.org/api/1.0/series/11527/revi
This reverts commit 8678fdaf396c ("drm/i915/fbc: Allow on unfenced surfaces,
for recent gen") as Skylake has issues with unfenced FBC tracking (and
yes Skylake doesn't even enable FBC yet). Paulo would like to do a full
review of all existing workarounds to see if any more are missing prior
to allo
== Series Details ==
Series: Revert "drm/i915/fbc: Allow on unfenced surfaces, for recent gen"
URL : https://patchwork.freedesktop.org/series/11529/
State : failure
== Summary ==
Series 11529v1 Revert "drm/i915/fbc: Allow on unfenced surfaces, for recent gen"
http://patchwork.freedesktop.org/a
Recently I have been applying an optimisation to avoid stalling and
clflushing GGTT objects based on their current binding. That is we only
set-to-gtt-domain upon first bind. However, on hibernation the objects
remain bound, but they are in the CPU domain. Currently (since commit
975f7ff42edf ("drm
Now that we have working partial VMA and faulting support for all
objects, including fence support, advertise to userspace that it can
take advantage of unlimited GGTT mmaps.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_drv.c | 8
include/uapi/drm/i915_drm.h | 1 +
2 fi
From about kernel 4.9, GTT mmaps are virtually unlimited. A new
parameter, I915_PARAM_MMAP_GTT_VERSION, is added to advertise the
feature so query it and use it to avoid limiting tiled allocations to
only fit within the mappable aperture.
Signed-off-by: Chris Wilson
Cc: Kenneth Graunke
---
src/
== Series Details ==
Series: drm/i915: Flush to GTT domain all GGTT bound objects after hibernation
URL : https://patchwork.freedesktop.org/series/11532/
State : failure
== Summary ==
Series 11532v1 drm/i915: Flush to GTT domain all GGTT bound objects after
hibernation
http://patchwork.freede
On 2016-08-23 06:56 PM, Eric Engestrom wrote:
On Tue, Aug 23, 2016 at 01:56:02PM -0400, robert.f...@collabora.com wrote:
From: Robert Foss
This series implements the sw_sync test and the lib/sw_sync helper functions
for said test.
Gustavo Padovans sw_sync series was just de-staged in
gregkh
From: Robert Foss
Base functions to help testing the Sync File Framework (explicit fencing
mechanism ported from Android).
These functions allow you to create, use and destroy timelines and fences.
Signed-off-by: Gustavo Padovan
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
lib/
From: Robert Foss
Add subtest alloc_fence that verifies that it's possible to allocate a fence
on a timeline.
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
tests/sw_sync.c | 16
1 file changed, 16 insertions(+), 0 deletions(-)
diff --git a/tests/sw_sync.c b/test
From: Robert Foss
This series implements the sw_sync test and the lib/sw_sync helper functions
for said test.
Gustavo Padovans sw_sync series was just de-staged in
gregkh-staging/staging-next [1], and this test is targeted at verifying the
functionality implemented in that series.
The sw_sync s
From: Robert Foss
Add initial tests for sw_sync.
Signed-off-by: Robert Foss
Signed-off-by: Gustavo Padovan
Reviewed-by: Eric Engestrom
---
tests/Makefile.sources | 1 +-
tests/sw_sync.c| 51 +++-
2 files changed, 52 insertions(+), 0 deletions(
From: Robert Foss
Add subtest test_sync_merge that tests merging fences and the validity of the
resulting merged fence.
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
tests/sw_sync.c | 67 ++-
1 file changed, 67 insertions(+), 0 dele
From: Robert Foss
This subtest verifies merging a fence with itself does not fail.
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
tests/sw_sync.c | 27 +++
1 file changed, 27 insertions(+), 0 deletions(-)
diff --git a/tests/sw_sync.c b/tests/sw_sync.c
inde
From: Robert Foss
This subtest verifies that waiting on fences works properly.
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
tests/sw_sync.c | 38 ++
1 file changed, 38 insertions(+), 0 deletions(-)
diff --git a/tests/sw_sync.c b/tests/sw_sync
From: Robert Foss
This subtests tests that creating fences on negative timelines fail.
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
tests/sw_sync.c | 7 +++
1 file changed, 7 insertions(+), 0 deletions(-)
diff --git a/tests/sw_sync.c b/tests/sw_sync.c
index a8c8ca4..102647d
From: Robert Foss
This subtest runs a single consumer thread and multiple producer thread that
are synchronized using multiple timelines.
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
tests/sw_sync.c | 139 +-
1 file changed, 139 in
From: Robert Foss
This subtest verifies that creating many timelines and merging random fences
from each timeline with eachother results in merged fences that are fully
functional.
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
tests/sw_sync.c | 73
From: Robert Foss
This subtest verifies that merging two fences works in the simples possible
case.
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
tests/sw_sync.c | 23 +++
1 file changed, 23 insertions(+), 0 deletions(-)
diff --git a/tests/sw_sync.c b/tests/s
From: Robert Foss
This test verifies that stressing the kernel by creating multiple
consumer/producer threads that wait on a single timeline to be incremented
by another conumer/producer thread does not fail.
And that the order amongst the threads is maintained.
Signed-off-by: Robert Foss
Revie
From: Robert Foss
This subtest verifies that waiting, timing out on a wait and that counting
fences in various states works.
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
tests/sw_sync.c | 66 ++-
1 file changed, 66 insertions(+), 0
From: Robert Foss
This subtest verifies the access ordering of multiple consumer threads.
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
tests/sw_sync.c | 103 +-
1 file changed, 103 insertions(+), 0 deletions(-)
diff --git a/tests/
Em Qua, 2016-08-17 às 12:02 -0700, Dhinakaran Pandiyan escreveu:
> Since a DRM function that reads link DP link status is available,
> let's
> use that instead of the i915 clone.
One could describe the i915 function as a convenient wrapper instead of
a clone, since it allows passing just intel_dp
Em Qua, 2016-08-24 às 19:00 +0100, Chris Wilson escreveu:
> This reverts commit 8678fdaf396c ("drm/i915/fbc: Allow on unfenced
> surfaces,
> for recent gen") as Skylake has issues with unfenced FBC tracking
> (and
> yes Skylake doesn't even enable FBC yet)
But it used to work if you had i915.enabl
On Wed, Aug 24, 2016 at 09:14:59PM +, Zanoni, Paulo R wrote:
> Em Qua, 2016-08-24 às 19:00 +0100, Chris Wilson escreveu:
> > . In the meantime lets hope that all
> > framebuffers are idle and naturally fit within the mappable aperture.
>
> What exactly do you mean with the sentence above? Is t
On 8/24/2016 2:07 PM, Chris Wilson wrote:
On Sun, Aug 21, 2016 at 09:39:17PM +0530, Kamble, Sagar A wrote:
On 8/21/2016 2:09 PM, Chris Wilson wrote:
On Sun, Aug 21, 2016 at 11:39:22AM +0530, Kamble, Sagar A wrote:
On 8/20/2016 1:32 PM, Chris Wilson wrote:
On Sat, Aug 20, 2016 at 10:39:25AM
The major scaling bottleneck in execbuffer is the processing of the
execobjects. Creating an auxiliary list is inefficient when compared to
using the execobject array we already have allocated.
Reservation is then split into phases. As we lookup up the VMA, we
try and bind it back into active loca
== Series Details ==
Series: series starting with [01/17] drm/i915: Skip holding an object reference
for execbuf preparation (rev2)
URL : https://patchwork.freedesktop.org/series/11399/
State : warning
== Summary ==
Series 11399v2 Series without cover letter
http://patchwork.freedesktop.org/a
On Wed, Aug 24, 2016 at 04:41:02PM -0400, Gustavo Padovan wrote:
> 2016-08-24 Daniel Vetter :
>
> > On Tue, Aug 23, 2016 at 01:56:02PM -0400, robert.f...@collabora.com wrote:
> > > From: Robert Foss
> > >
> > > This series implements the sw_sync test and the lib/sw_sync helper
> > > functions
>
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