== Series Details ==
Series: drm/i915/vlv: Enable/disable VGA hotplugging properly
URL : https://patchwork.freedesktop.org/series/5012/
State : failure
== Summary ==
Series 5012v1 drm/i915/vlv: Enable/disable VGA hotplugging properly
http://patchwork.freedesktop.org/api/1.0/series/5012/revisio
Check functions are used by atomic to see if the new state will
be allowed. There's also a hw state checker which checks afterwards
that the committed state is correct. Rename it to hw state verifier
to reduce some confusion.
Suggested-by: Matt Roper
Signed-off-by: Maarten Lankhorst
---
drivers
>
>
>-Original Message-
>From: Ceraolo Spurio, Daniele
>Sent: Thursday, March 17, 2016 8:58 AM
>To: Morton, Derek J ; intel-gfx@lists.freedesktop.org
>Subject: Re: [PATCH i-g-t v3 5/6] tests/gem_scheduler: Add subtests to test
>batch priority behaviour
>
>
>
>On 10/03/16 11:03, Derek Mort
On Thu, Mar 24, 2016 at 12:19 PM, Sedat Dilek wrote:
> On Thu, Mar 24, 2016 at 11:56 AM, Sedat Dilek wrote:
>> Hi Chris,
>>
>> is TearFree feature still "experimental" in current
>> xf86-video-intel.git#master?
>> It is enabled by default!
>>
>> [ configure-log ]
>> ...
>> xf86-video-intel 2.99.
On Tue, Mar 29, 2016 at 6:16 PM, Andy Lutomirski wrote:
> On Tue, Mar 29, 2016 at 12:49 AM, Andy Lutomirski wrote:
>> On Tue, Mar 29, 2016 at 12:43 AM, Daniel Vetter
>> wrote:
>>> On Tue, Mar 29, 2016 at 4:39 AM, Andy Lutomirski
>>> wrote:
AFAICT something got rather screwed up in i915 l
Hi all,
New -testing cycle with cool stuff:
- VBT code refactor for a clean split between parsing&using of firmware
information (Jani)
- untangle the pll computation code, and splitting up the monster
i9xx_crtc_compute_clocks (Ander)
- dsi support for bxt (Jani, Shashank Sharma and others)
- c
On Tue, Mar 29, 2016 at 03:25:38PM +0100, Chris Wilson wrote:
> On Tue, Mar 29, 2016 at 04:15:54PM +0300, Joonas Lahtinen wrote:
> > On to, 2016-03-24 at 16:47 +0200, Joonas Lahtinen wrote:
> > > Rename and document the GGTT init functions to give a better
> > > idea of the context where they are c
commit e2c8b8701e2d moved modeset locking inside resume/suspend
functions, but missed a code path only executed on lid close/open
on older hardware. The result was a deadlock when closing and
opening the lid without suspending on such hardware:
=
[ INF
This allows us to ditch a ton of ugly #ifdefs from a bunch of drm modeset
drivers.
v2: Make the dummy function actually return a sane value, spotted by
Ville.
v3: Because the patch is still in limbo there's no more drivers to
convert, noticed by Emil.
v4: Rebase once more, because hooray. I'll j
And move the comment to the right macro. This was mixed up in
commit cfb23ed622d040619abb91e625fcba74d356b8a8
Author: Maarten Lankhorst
Date: Tue Jul 14 12:17:40 2015 +0200
drm/i915: Allow fuzzy matching in pipe_config_compare, v2
v2: Rebase.
Cc: Maarten Lankhorst
Cc: Daniel Stone
Acke
This goes all the way back to the original KMS commit aeons ago
commit f453ba0460742ad027ae0c4c7d61e62817b3e7ef
Author: Dave Airlie
Date: Fri Nov 7 14:05:41 2008 -0800
DRM: add mode setting support
But it seems to be completely unused. Only i915 and nouveau even
register these properties,
Lots of arm drivers get this wrong and for most arm boards this is the
right thing actually. And anyway with most loaders you want to chase
sysfs links anyway to figure out which dri device you want.
This will fix dmesg noise for rockchip and sti.
Cc: Ilia Mirkin
Reported-by: Ilia Mirkin
Signed
For documentation and paranoia.
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/drm_sysfs.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c
index d503f8e8c2d1..43875cb35691 100644
--- a/drivers/gpu/drm/drm
It tries to do fancy things with excluding agp support if ttm is
built-in, but agp isn't. Instead just express this depency like drm
does and use CONFIG_AGP everywhere.
Also use the neat Makefile magic to make the entire ttm_agp_backend
file optional.
v2: Use IS_ENABLED(CONFIG_AGP) as suggested b
Hi all,
Found this pile of cruft removal patches hiding. Bunch of them have been posted
already a few times, most of them are variations of the "hide dev->struct_mutex"
theme.
Feedback and review highly welcome, I'd like to get them all in.
Thanks, Daniel
Daniel Vetter (10):
drm/ttm: Remove T
Only two drivers implement this hook. vmwgfx (which doesn't need it
really) and legacy radeon (which since v1 has been nuked, yay).
v1: Rebase over radeon ums removal.
Cc: Thomas Hellstrom
Cc: Alex Deucher
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/drm_drv.c | 2 +-
1 file changed, 1 in
And again make sure it's a no-op for modern drivers, again with the
exception of nouveau. Another case of dev->struct_mutex gone for
modern drivers!
v2: Also add a DRIVER_* check like for all other maps functions to
really short-circuit the code. And give drm_legacy_rmmap used by the
dev unregiste
It belongs right next to the addmap and rmmap functions really. And
for OCD consistency name it drm_legacy_getmap_ioctl.
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/drm_bufs.c | 52 ++
drivers/gpu/drm/drm_ioctl.c | 54 +-
Except for the ->lasclose driver callback evrything in drm_lastclose()
is all legacy cruft and can be hidden. Which means another
dev->struct_mutex site disappears entirely for modern drivers!
Also while at it change the return value of drm_lastclose to void
since it will always succeed. No one ch
Like in
commit 0e975980d435d58df2d430d688b8c18778b42218
Author: Peter Antoine
Date: Tue Jun 23 08:18:49 2015 +0100
drm: Turn off Legacy Context Functions
we need to again make an exception for nouveau, but everyone else
really doesn't need this.
Cc: Peter Antoine
Cc: Ben Skeggs
Signed-
It has a DRIVER_MODESET check to sure make it's not creating havoc
for drm drivers. Make that clear in the name too.
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/drm_agpsupport.c | 4 ++--
drivers/gpu/drm/drm_fops.c | 2 +-
drivers/gpu/drm/drm_pci.c| 2 +-
include/drm/drm_agps
DRM fbdev emulation only supports pallete_color with depth == 8, and
truecolor with depth > 8. Handling depth == 16 for palettes is hence
dead code, let's remove it.
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/drm_fb_helper.c | 33 ++---
1 file changed, 2 inserti
Code stolen from gma500.
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/drm_crtc.c | 13 +
drivers/gpu/drm/gma500/psb_intel_display.c | 7 ---
2 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.
Hi all,
Inspired by the color manager work, some prep work cleanup for the legacy gamma
code. Two more things I'd like to pull off:
- rework the fbdev emulation to use the main gamma interfaces, instead of
hand-rolling it's own.
- add some helpers to implement legacy gamma in terms of atomic and
No need to confuse userspace like this.
Cc: Gerd Hoffmann
Cc: Dave Airlie
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/virtio/virtgpu_display.c | 9 -
1 file changed, 9 deletions(-)
diff --git a/drivers/gpu/drm/virtio/virtgpu_display.c
b/drivers/gpu/drm/virtio/virtgpu_display.c
i
imx doesn't have any functions for setting the gamma table, so this is
completely defunct.
Not nice to lie to userspace, so let's stop!
Cc: Russell King
Cc: Philipp Zabel
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/imx/imx-drm-core.c | 4
1 file changed, 4 deletions(-)
diff --git a
tegra doesn't have any functions to set gamma tables, so this is
completely defunct.
Not nice to lie to userspace, so let's stop!
Cc: Thierry Reding
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/tegra/dc.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/tegra/dc.c b/drive
Only really needed for fbdev emulation at 8bpp. And bochs doesn't do
that. And either way bochs only does 32bit rgb, so this is all pretty
much wasted dead code.
The only consideration is that we need to not set up any gamma size
either.
Cc: Gerd Hoffmann
Cc: Dave Airlie
Signed-off-by: Daniel V
The fb helper private gamma_set/get functions are only required when
the driver supports paletted 8bit mode with fbdev. Armada uses 32bpp
unconditionally, so this is just dead code. It also doesn't do
anything really. Let's just remove it.
Cc: Russell King
Signed-off-by: Daniel Vetter
---
drive
qxl doesn't have any functions for setting the gamma table, so this is
completely defunct.
Not nice to lie to userspace, so let's stop!
Cc: Dave Airlie
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/qxl/qxl_display.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/qxl/qxl_
Again the fbdev emulation gamma_set/get functions are only needed for
drivers that try to also use 8bpp paletted mode. Which msm doesn't, so
this is dead code. Let's rip it out.
Cc: Rob Clark
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/msm/msm_fbdev.c | 14 --
1 file changed, 1
The core does this for us already.
Cc: Dave Airlie
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/cirrus/cirrus_mode.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/cirrus/cirrus_mode.c
b/drivers/gpu/drm/cirrus/cirrus_mode.c
index d3d8d7bfcc57..0b1a411cb89e 100644
---
On Wed, Mar 30, 2016 at 11:08:33AM +0200, Bjørn Mork wrote:
> commit e2c8b8701e2d moved modeset locking inside resume/suspend
> functions, but missed a code path only executed on lid close/open
> on older hardware. The result was a deadlock when closing and
> opening the lid without suspending on s
On to, 2016-03-24 at 15:54 +, Matthew Auld wrote:
> Lets BUG_ON and don't bother with a WARN and returning an error, so we can
> remove the need to pollute the code with error handling, after all it is
> a programmer error to provide NULL view. Also while we're here remove
> redundant NULL ggtt
Hi Daniel,
[auto build test ERROR on drm/drm-next]
[also build test ERROR on v4.6-rc1 next-20160330]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Daniel-Vetter/Another-shot-at-cruft-removal
From: Praveen Paneri
When the system is running low on memory, gem shrinker is invoked.
In this process objects will be unbounded from GTT and unbinding process
will require access to GTT(GTTADR) and also to fence register potentially.
That requires a resume of gfx device, if suspended, in the sh
Op 30-03-16 om 11:08 schreef Bjørn Mork:
> commit e2c8b8701e2d moved modeset locking inside resume/suspend
> functions, but missed a code path only executed on lid close/open
> on older hardware. The result was a deadlock when closing and
> opening the lid without suspending on such hardware:
>
App
On 30 March 2016 at 10:26, Daniel Vetter wrote:
> This allows us to ditch a ton of ugly #ifdefs from a bunch of drm modeset
> drivers.
>
> v2: Make the dummy function actually return a sane value, spotted by
> Ville.
>
> v3: Because the patch is still in limbo there's no more drivers to
> convert,
On Wed, Mar 30, 2016 at 01:11:53PM +0300, Mika Kuoppala wrote:
> From: Praveen Paneri
>
> When the system is running low on memory, gem shrinker is invoked.
> In this process objects will be unbounded from GTT and unbinding process
> will require access to GTT(GTTADR) and also to fence register p
Patchwork writes:
> [ text/plain ]
> == Series Details ==
>
> Series: drm/i915: Rename __force_wake_get to __force_wake_auto
> URL : https://patchwork.freedesktop.org/series/4864/
> State : warning
>
> == Summary ==
>
> Series 4864v1 drm/i915: Rename __force_wake_get to __force_wake_auto
> http
From: Praveen Paneri
i915_gem_shrink_all() will scan the bound list only if device is not
suspended but in OOM scenarios it becomes absolutely necessary to
release as much memory as possible. So, adding rpm get/put in
i915_shrinker_oom() to ensure shrinking of bound objects in OOM
scenario.
Sign
Chris Wilson writes:
> [ text/plain ]
> On Wed, Mar 30, 2016 at 01:11:53PM +0300, Mika Kuoppala wrote:
>> From: Praveen Paneri
>>
>> When the system is running low on memory, gem shrinker is invoked.
>> In this process objects will be unbounded from GTT and unbinding process
>> will require acc
On 30 March 2016 at 10:45, Daniel Vetter wrote:
> Like in
>
> commit 0e975980d435d58df2d430d688b8c18778b42218
> Author: Peter Antoine
> Date: Tue Jun 23 08:18:49 2015 +0100
>
> drm: Turn off Legacy Context Functions
>
> we need to again make an exception for nouveau, but everyone else
> rea
On Tue, 29 Mar 2016, Ramalingam C wrote:
> At BXT DSI, PIPE registers are inactive. So we can't get the
> PIPE's mode parameters from them. The possible option is
> retriving them from the PORT registers.
>
> The required changes are added for BXT in intel_dsi_get_config
> (encoder->get_config).
>
On 30 March 2016 at 10:45, Daniel Vetter wrote:
> Lots of arm drivers get this wrong and for most arm boards this is the
> right thing actually. And anyway with most loaders you want to chase
> sysfs links anyway to figure out which dri device you want.
>
> This will fix dmesg noise for rockchip a
On 30 March 2016 at 10:45, Daniel Vetter wrote:
> --- a/drivers/gpu/drm/Kconfig
> +++ b/drivers/gpu/drm/Kconfig
> @@ -83,6 +83,7 @@ config DRM_LOAD_EDID_FIRMWARE
> config DRM_TTM
> tristate
> depends on DRM
> + depends on (AGP || AGP=n)
Already part of config DRM, so we don
On ke, 2016-03-30 at 10:12 +0100, Chris Wilson wrote:
> On Tue, Mar 29, 2016 at 03:25:38PM +0100, Chris Wilson wrote:
> >
> > On Tue, Mar 29, 2016 at 04:15:54PM +0300, Joonas Lahtinen wrote:
> > >
> > > On to, 2016-03-24 at 16:47 +0200, Joonas Lahtinen wrote:
> > > >
> > > > Rename and document
Hi Daniel,
[auto build test ERROR on drm/drm-next]
[also build test ERROR on v4.6-rc1 next-20160330]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Daniel-Vetter/Another-shot-at-cruft-removal
On Tue, 29 Mar 2016, Ramalingam C wrote:
> At BXT DSI, PIPE registers are inactive. So we can't get the
> PIPE's mode parameters from them. The possible option is
> retriving them from the PORT registers. But mode timing
> parameters are progammed to port registers interms of byteclocks.
>
> The f
It tries to do fancy things with excluding agp support if ttm is
built-in, but agp isn't. Instead just express this depency like drm
does and use CONFIG_AGP everywhere.
Also use the neat Makefile magic to make the entire ttm_agp_backend
file optional.
v2: Use IS_ENABLED(CONFIG_AGP) as suggested b
On Thu, 2016-03-24 at 12:21 +, Shrivastava, Shubhangi wrote:
> Hi Daniel,
>
> Is something else required for this patch series (5 patches) to be merged?
It needs to please CI. The errors reported are probably not caused by this
series, but at this point is probably better to rebase and resend
On Wed, 30 Mar 2016, Daniel Vetter wrote:
> And move the comment to the right macro. This was mixed up in
>
> commit cfb23ed622d040619abb91e625fcba74d356b8a8
> Author: Maarten Lankhorst
> Date: Tue Jul 14 12:17:40 2015 +0200
>
> drm/i915: Allow fuzzy matching in pipe_config_compare, v2
>
>
On to, 2016-03-24 at 17:02 +, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [v2] drm/i915: Rename GGTT init functions (rev3)
> URL : https://patchwork.freedesktop.org/series/4790/
> State : warning
>
> == Summary ==
>
> Series 4790v3 Series without cover letter
>
On Wed, Mar 30, 2016 at 11:51:18AM +0200, Daniel Vetter wrote:
> The fb helper private gamma_set/get functions are only required when
> the driver supports paletted 8bit mode with fbdev. Armada uses 32bpp
> unconditionally, so this is just dead code. It also doesn't do
> anything really. Let's just
On Wed, Mar 30, 2016 at 1:09 PM, Russell King - ARM Linux
wrote:
> On Wed, Mar 30, 2016 at 11:51:18AM +0200, Daniel Vetter wrote:
>> The fb helper private gamma_set/get functions are only required when
>> the driver supports paletted 8bit mode with fbdev. Armada uses 32bpp
>> unconditionally, so t
Hi Daniel,
[auto build test WARNING on drm/drm-next]
[also build test WARNING on v4.6-rc1 next-20160330]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Daniel-Vetter/drm-ttm-Remove
It tries to do fancy things with excluding agp support if ttm is
built-in, but agp isn't. Instead just express this depency like drm
does and use CONFIG_AGP everywhere.
Also use the neat Makefile magic to make the entire ttm_agp_backend
file optional.
v2: Use IS_ENABLED(CONFIG_AGP) as suggested b
On Wed, Mar 30, 2016 at 10:00:05AM +0200, Maarten Lankhorst wrote:
> Check functions are used by atomic to see if the new state will
> be allowed. There's also a hw state checker which checks afterwards
> that the committed state is correct. Rename it to hw state verifier
> to reduce some confusion
On Tue, Mar 29, 2016 at 05:42:01PM +0200, Borislav Petkov wrote:
> From: Borislav Petkov
>
> Signed-off-by: Borislav Petkov
> Cc: intel-gfx@lists.freedesktop.org
Acked-by: Daniel Vetter
> ---
>
> @tip guys, the pat_bsp_init() and pat_ap_init() hunk will conflict with
>
> d63dcf49cf5a ("x8
On Tue, Mar 29, 2016 at 11:04:51PM +0530, Ramalingam C wrote:
> At BXT DSI, PIPE registers are inactive. So we can't get the
> PIPE's mode parameters from them. The possible option is
> retriving them from the PORT registers. But mode timing
> parameters are progammed to port registers interms of b
On Wed, Mar 30, 2016 at 02:09:11PM +0300, Jani Nikula wrote:
> On Wed, 30 Mar 2016, Daniel Vetter wrote:
> > And move the comment to the right macro. This was mixed up in
> >
> > commit cfb23ed622d040619abb91e625fcba74d356b8a8
> > Author: Maarten Lankhorst
> > Date: Tue Jul 14 12:17:40 2015 +02
On Wed, 2016-03-23 at 14:51 +0100, Maarten Lankhorst wrote:
> With async modesets this is no longer protected with connection_mutex,
> so ensure that each pll has its own lock. The pll configuration state
> is still protected; it's only the pll updates that need locking against
> concurrency.
>
>
Refer to the GGTT VM consistently as "ggtt->base" instead of just "ggtt",
"vm" or indirectly through other variables like "dev_priv->ggtt.base"
to avoid confusion with the i915_ggtt object itself and PPGTT VMs.
As a bonus gets rid of the long-standing i915_obj_to_ggtt vs.
i915_gem_obj_to_ggtt conf
This patch checks for changes in sink count between short pulse
hpds and forces full detect when there is a change.
This will allow both detection of hotplug and unplug of panels
through dongles that give only short pulse for such events.
v2: changed variable type from u8 to bool (Jani)
retur
When created originally intel_dp_check_link_status()
was supposed to handle only link training for short
pulse but has grown into handler for short pulse itself.
This patch cleans up this function by splitting it into
two halves. First intel_dp_short_pulse() is called,
which will be entry point and
Sink count can change between short pulse hpd hence this patch
adds a member variable to intel_dp so we can track any changes
between short pulse interrupts.
This patch reads sink_count dpcd always and removes its
read operation based on values in downstream port dpcd.
SINK_COUNT dpcd is not depe
Current DP detection has DPCD operations split across
intel_dp_hpd_pulse and intel_dp_detect which contains
duplicates as well. Also intel_dp_detect is called
during modes enumeration as well which will result
in multiple dpcd operations. So this patch tries
to solve both these by bringing all DPCD
intel_dp_detect() is called for not just detection but
during modes enumeration as well. Repeating the whole
sequence during each of these calls is wasteful and
time consuming.
This patch moves probing for panel, DPCD read etc done in
intel_dp_detect() to a new function intel_dp_long_pulse().
Note
On Wed, Mar 30, 2016 at 11:51:25AM +0200, Daniel Vetter wrote:
> tegra doesn't have any functions to set gamma tables, so this is
> completely defunct.
>
> Not nice to lie to userspace, so let's stop!
>
> Cc: Thierry Reding
> Signed-off-by: Daniel Vetter
> ---
> drivers/gpu/drm/tegra/dc.c | 1
On 30 March 2016 at 12:24, Daniel Vetter wrote:
> It tries to do fancy things with excluding agp support if ttm is
> built-in, but agp isn't. Instead just express this depency like drm
> does and use CONFIG_AGP everywhere.
>
> Also use the neat Makefile magic to make the entire ttm_agp_backend
> f
On Wed, Mar 30, 2016 at 01:19:21PM +0200, Daniel Vetter wrote:
> On Wed, Mar 30, 2016 at 1:09 PM, Russell King - ARM Linux
> wrote:
> > On Wed, Mar 30, 2016 at 11:51:18AM +0200, Daniel Vetter wrote:
> >> The fb helper private gamma_set/get functions are only required when
> >> the driver supports
On Wed, Mar 30, 2016 at 06:09:04PM +0800, kbuild test robot wrote:
> Hi Daniel,
>
> [auto build test ERROR on drm/drm-next]
> [also build test ERROR on v4.6-rc1 next-20160330]
> [if your patch is applied to the wrong git tree, please drop us a note to
> help improving th
This patch set adds scheduler tests.
Patch 1 adds library code used by the tests. There are other tests under
development which are planned to reuse some of these libraries.
Patch 2 adds some basic tests, read dependency tests and write dependency tests.
Patch 3 Is the patch previously submitted by
Adds functions to create a number of different batch buffers to perform
several functions including:
Batch buffer which will run for a long duration to provide a delay on a
specified ring.
Function to calibrate the delay batch buffer to run for a specified period
of time.
Function to create a batch
This is intended to test the scheduler behaviour is correct.
The subtests are
-basic
Tests that batch buffers of the same priority submitted to a ring
execute in the order they are submitted.
-read
Submits a batch buffer with a read dependency to a buffer object to
a ring which is held in the sched
From: John Harrison
The GPU scheduler has added an execution priority level to the context
object. There is an IOCTL interface to allow user apps/libraries to
set this priority. This patch updates the context paramter IOCTL test
to include the new interface.
For: VIZ-1587
Signed-off-by: John Har
Add subtests to test each ring to check batch buffers of a higher
priority will be executed before batch buffers of a lower priority.
v2: Addressed review comments from Daniele Ceraolo Spurio
v4: Changed priorities to +/-200 - Daniele Ceraolo Spurio
Signed-off-by: Derek Morton
---
tests/gem_s
When a batch is selected for execution all other batch buffers in the
scheduler queue get a small priority increase to prevent starving due
to continuous submissions by a high priority user.
Added a subtest to check this behaviour.
Requested by Joonas Lahtinen during scheduler code review
v4: Add
On Wed, Mar 30, 2016 at 11:45:16AM +0200, Daniel Vetter wrote:
[...]
> diff --git a/include/drm/drm_agpsupport.h b/include/drm/drm_agpsupport.h
> index e134e9ca422b..b2d912670a7f 100644
> --- a/include/drm/drm_agpsupport.h
> +++ b/include/drm/drm_agpsupport.h
> @@ -93,7 +93,7 @@ static inline struc
On Tue, Mar 29, 2016 at 10:03:56AM +0200, Maarten Lankhorst wrote:
> Op 24-03-16 om 16:32 schreef Ville Syrjälä:
> > On Thu, Mar 24, 2016 at 04:19:13PM +0100, Maarten Lankhorst wrote:
> >> Op 24-03-16 om 15:48 schreef Ville Syrjälä:
> >>> On Thu, Mar 24, 2016 at 03:42:28PM +0100, Maarten Lankhorst
On Tue, Mar 29, 2016 at 03:38:55PM +0200, Maarten Lankhorst wrote:
> This function is useful for gen2 intel devices which have no frame
> counter, but need a way to determine the current vblank count without
> racing with the vblank interrupt handler.
>
> intel_pipe_update_start checks if no vblan
On Tue, 15 Mar 2016, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> The VLV and CHV DPLL disable and update are almost identical in
> how the DPLL/DPLL_MD registers need to be set up. But the code
> looks more different than it really is. Try to bring them into
> line.
>
> v2: s/ch
On Tue, 15 Mar 2016, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Add the scaling mode property to DSI connectors, handle changes in the
> property value, and compute the panel fitter state during
> .compute_config().
>
> v2: Handle BXT as well
>
> Signed-off-by: Ville Syrjälä
Hi Daniel,
Am Mittwoch, den 30.03.2016, 11:51 +0200 schrieb Daniel Vetter:
> imx doesn't have any functions for setting the gamma table, so this is
> completely defunct.
>
> Not nice to lie to userspace, so let's stop!
Thank you for the patch. Now the ret variable and the err_register label
are
On Tue, 15 Mar 2016, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> We don't have a LVDS_BORDER_ENABLE type of bit for either eDP or DSI,
> and just trying to frob the display timings to include borders results
> in a corrupted picture. So reject the 'Center' scaling mode on GMCH
>
Jani,
Thanks for the review comments. Addressing them in the next patch ver.
On Wednesday 30 March 2016 04:13 PM, Jani Nikula wrote:
On Tue, 29 Mar 2016, Ramalingam C wrote:
At BXT DSI, PIPE registers are inactive. So we can't get the
PIPE's mode parameters from them. The possible option is
r
Op 30-03-16 om 15:13 schreef Ville Syrjälä:
> On Tue, Mar 29, 2016 at 03:38:55PM +0200, Maarten Lankhorst wrote:
>> This function is useful for gen2 intel devices which have no frame
>> counter, but need a way to determine the current vblank count without
>> racing with the vblank interrupt handler
On Wed, Mar 30, 2016 at 03:41:26PM +0200, Maarten Lankhorst wrote:
> Op 30-03-16 om 15:13 schreef Ville Syrjälä:
> > On Tue, Mar 29, 2016 at 03:38:55PM +0200, Maarten Lankhorst wrote:
> >> This function is useful for gen2 intel devices which have no frame
> >> counter, but need a way to determine t
On Wed, Mar 30, 2016 at 5:45 AM, Daniel Vetter wrote:
> This goes all the way back to the original KMS commit aeons ago
>
> commit f453ba0460742ad027ae0c4c7d61e62817b3e7ef
> Author: Dave Airlie
> Date: Fri Nov 7 14:05:41 2008 -0800
>
> DRM: add mode setting support
>
> But it seems to be co
On Tue, 29 Mar 2016, "Deepak, M" wrote:
>> -Original Message-
>> From: Nikula, Jani
>> Sent: Tuesday, March 29, 2016 8:31 PM
>> To: intel-gfx@lists.freedesktop.org; Deepak, M
>> Cc: Nikula, Jani
>> Subject: [PATCH 3/5] drm/i915: Parse LFP brightness control field in VBT
>>
>> From: Deep
On Wed, Mar 30, 2016 at 5:26 AM, Daniel Vetter wrote:
> This allows us to ditch a ton of ugly #ifdefs from a bunch of drm modeset
> drivers.
>
> v2: Make the dummy function actually return a sane value, spotted by
> Ville.
>
> v3: Because the patch is still in limbo there's no more drivers to
> co
Refer to the GGTT VM consistently as "ggtt->base" instead of just "ggtt",
"vm" or indirectly through other variables like "dev_priv->ggtt.base"
to avoid confusion with the i915_ggtt object itself and PPGTT VMs.
Refer to the GGTT as "ggtt" instead of indirectly through chaining.
As a bonus gets ri
Shared the function pixel_format_from_vbt for whole display module.
Function declaration is added to intel_dsi.h.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_dsi.h |1 +
drivers/gpu/drm/i915/intel_dsi_panel_vbt.c |2 +-
2 files changed, 2 insertions(+), 1 deletio
At BXT DSI, PIPE registers are inactive. So we can't get the
PIPE's mode parameters from them. The possible option is
retriving them from the PORT registers.
The required changes are added for BXT in intel_dsi_get_config
(encoder->get_config).
v2: Addressed the Jani's comments
-removed the re
From: Deepak M
Adding new DCS commands which are specified in the
DCS 1.3 spec related to CABC.
v2: Sorted the Macro`s by value (Andrzej)
v3 by Jani: sort all of enum, refer to MIPI DCS 1.3
Cc: Andrzej Hajda
Cc: Thierry Reding
Cc: David Airlie
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc:
Sugg
From: Deepak M
For dual link panel scenarios there are new fields added in the
VBT which indicate on which port the PWM cntrl and CABC ON/OFF
commands needs to be sent.
v2: Moving the comment to intel_dsi.h(Jani)
v3: Renaming the field names (Jani)
v4 by Jani: make this patch only about VBT
C
From: Deepak M
If the source of the backlight PWM is from the
panel then the PWM can be controlled by DCS
command, this patch adds the support to
enable/disbale panel PWM, control backlight level
etc...
v2: Moving the CABC bkl functions to new file.(Jani)
v3: Rebase
v4: Rebase
v5: Use mipi_ds
From: Deepak M
These fields in VBT indicates the PWM source which
is used and also the controller number.
v2 by Jani: check for out of bounds access, some renames, change default
type, etc.
v3 by Jani: s/INTEL_BACKLIGHT_CABC/INTEL_BACKLIGHT_DSI_DCS/
Signed-off-by: Deepak M
Signed-off-by: Jani
From: Deepak M
In CABC (Content Adaptive Brightness Control) content grey level
scale can be increased while simultaneously decreasing
brightness of the backlight to achieve same perceived brightness.
The CABC is not standardized and panel vendors are free to follow
their implementation. The CAB
On Wed, Mar 30, 2016 at 04:57:10PM +0300, Joonas Lahtinen wrote:
> Refer to the GGTT VM consistently as "ggtt->base" instead of just "ggtt",
> "vm" or indirectly through other variables like "dev_priv->ggtt.base"
> to avoid confusion with the i915_ggtt object itself and PPGTT VMs.
>
> Refer to the
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