[Intel-gfx] [maintainer-tools PATCH v2 33/33] dim: add -h option for usage, imrove output on unknown options

2016-01-28 Thread Jani Nikula
Show usage also with the -h option, and improve output on unknown options. Signed-off-by: Jani Nikula --- dim | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/dim b/dim index 1651b5e8218a..fe1b2e8f1bad 100755 --- a/dim +++ b/dim @@ -107,6 +107,7 @@ DRY_RUN= INTERAC

[Intel-gfx] [maintainer-tools PATCH v2 17/33] dim: abstract dim_for_each_workdirs

2016-01-28 Thread Jani Nikula
Signed-off-by: Jani Nikula --- dim | 24 +--- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/dim b/dim index fd61ce5a7f49..d887a9afc426 100755 --- a/dim +++ b/dim @@ -603,6 +603,19 @@ function dim_create_workdir done } +dim_alias_fw=for-each-workdir

[Intel-gfx] [maintainer-tools PATCH v2 27/33] dim: abstract dim_update_next

2016-01-28 Thread Jani Nikula
Signed-off-by: Jani Nikula --- dim | 126 +++- 1 file changed, 64 insertions(+), 62 deletions(-) diff --git a/dim b/dim index 1ecdfefc4f11..25597743e2a0 100755 --- a/dim +++ b/dim @@ -708,6 +708,70 @@ function dim_for_each_workdirs

[Intel-gfx] [maintainer-tools PATCH v2 28/33] dim: abstract dim_tag_next

2016-01-28 Thread Jani Nikula
Signed-off-by: Jani Nikula --- dim | 34 ++ 1 file changed, 18 insertions(+), 16 deletions(-) diff --git a/dim b/dim index 25597743e2a0..88ee7350741d 100755 --- a/dim +++ b/dim @@ -772,6 +772,24 @@ function dim_update_next "$addr_intel_qa2" } +func

[Intel-gfx] [maintainer-tools PATCH v2 30/33] dim: abstract dim_checker

2016-01-28 Thread Jani Nikula
Signed-off-by: Jani Nikula --- dim | 12 +++- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/dim b/dim index 4ff903fb3818..4370aec28ec0 100755 --- a/dim +++ b/dim @@ -662,6 +662,13 @@ function dim_checkpatch done } +function dim_checker +{ + rm drivers/gpu/

[Intel-gfx] [maintainer-tools PATCH v2 25/33] dim: abstract dim_cherry_pick

2016-01-28 Thread Jani Nikula
Signed-off-by: Jani Nikula --- dim | 30 -- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/dim b/dim index 4942b1684f74..69c8d6a49495 100755 --- a/dim +++ b/dim @@ -453,6 +453,22 @@ function dim_apply_next_fixes dim_apply_branch drm-intel-next-

[Intel-gfx] [maintainer-tools PATCH v2 29/33] dim: abstract dim_{create, remove}_branch

2016-01-28 Thread Jani Nikula
Signed-off-by: Jani Nikula --- dim | 100 +++- 1 file changed, 52 insertions(+), 48 deletions(-) diff --git a/dim b/dim index 88ee7350741d..4ff903fb3818 100755 --- a/dim +++ b/dim @@ -515,6 +515,58 @@ function dim_magic_patch

[Intel-gfx] [maintainer-tools PATCH v2 23/33] dim: abstract dim_tc

2016-01-28 Thread Jani Nikula
Signed-off-by: Jani Nikula --- dim | 30 -- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/dim b/dim index 808c9c74a8d4..8c21c4d905b6 100755 --- a/dim +++ b/dim @@ -876,6 +876,22 @@ function dim_cat_to_fixup cat > `cat .fixup_file_path` } +f

[Intel-gfx] [maintainer-tools PATCH v2 31/33] dim: abstract dim_help

2016-01-28 Thread Jani Nikula
dim help being the last subcommand handled by the switch case, obliterate it as well, finishing the job we set out to do. Now all subcommands are handled via dim_ prefixed functions. Signed-off-by: Jani Nikula --- dim | 50 -- 1 file changed, 24 in

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/4] drm/i915: Make LRC (un)pinning work on context and engine

2016-01-28 Thread Patchwork
== Summary == Built on b3f8ad64bc71f6236f05c2e9f4ad49a61745869a drm-intel-nightly: 2016y-01m-28d-10h-26m-23s UTC integration manifest bdw-nuci7total:156 pass:147 dwarn:0 dfail:0 fail:0 skip:9 bdw-ultratotal:159 pass:153 dwarn:0 dfail:0 fail:0 skip:6 bsw-nuc-2

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: add WaIncreaseDefaultTLBEntries

2016-01-28 Thread Patchwork
== Summary == Series 2811v1 drm/i915: add WaIncreaseDefaultTLBEntries Test kms_flip: Subgroup basic-flip-vs-modeset: pass -> DMESG-WARN (ilk-hp8440p) UNSTABLE bdw-nuci7total:156 pass:147 dwarn:0 dfail:0 fail:0 skip:9 bdw-ultratotal:159 pas

Re: [Intel-gfx] [PATCH 5/5] drm/atomic: Add encoder_mask to crtc_state, v2.

2016-01-28 Thread Maarten Lankhorst
A diff to make this v3. Found when running this through IGT bat. - Keeping an encoder but moving it to a different crtc resulted, in encoder_mask not being updated. - Add some paranoia when best_encoder was already updated to a different encoder in steal_encoder. This could happen in theory.

[Intel-gfx] [PATCH] drm/i915/bxt: update list of PCIIDs

2016-01-28 Thread Imre Deak
Add PCIIDs for new versions of the SOC, based on BSpec. Also add the name of the versions as code comment where this is available. The new versions don't have any changes visible to the kernel driver. Signed-off-by: Imre Deak --- include/drm/i915_pciids.h | 4 +++- 1 file changed, 3 insertions(+

[Intel-gfx] [PATCH v3 5/5] drm/atomic: Add encoder_mask to crtc_state, v3.

2016-01-28 Thread Maarten Lankhorst
This allows iteration over encoders without requiring connection_mutex. Changes since v1: - Add a set_best_encoder helper function and update encoder_mask inside it. Changes since v2: - Relax the WARN_ON(!crtc), with explanation. - Call set_best_encoder when connector is moved between crtc's. -

[Intel-gfx] ✓ Fi.CI.BAT: success for MAINTAINERS: Add "B:" preferred bug reporting method (rev3)

2016-01-28 Thread Patchwork
== Summary == Series 2539v3 MAINTAINERS: Add "B:" preferred bug reporting method http://patchwork.freedesktop.org/api/1.0/series/2539/revisions/3/mbox/ bdw-nuci7total:156 pass:147 dwarn:0 dfail:0 fail:0 skip:9 bdw-ultratotal:159 pass:153 dwarn:0 dfail:0 fail:0 s

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/gen9: Probe power well 1 status on dc status query

2016-01-28 Thread Patchwork
== Summary == Series 2845v1 drm/i915/gen9: Probe power well 1 status on dc status query http://patchwork.freedesktop.org/api/1.0/series/2845/revisions/1/mbox/ Test kms_flip: Subgroup basic-flip-vs-dpms: pass -> DMESG-WARN (skl-i5k-2) pass -> DME

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Capture revision id in error state

2016-01-28 Thread Patchwork
== Summary == Series 2850v1 drm/i915: Capture revision id in error state http://patchwork.freedesktop.org/api/1.0/series/2850/revisions/1/mbox/ Test kms_flip: Subgroup basic-flip-vs-modeset: pass -> DMESG-WARN (bsw-nuc-2) pass -> DMESG-WARN (ilk

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] agp/intel-gtt: Don't leak the scratch page

2016-01-28 Thread Patchwork
== Summary == Series 2851v1 Series without cover letter http://patchwork.freedesktop.org/api/1.0/series/2851/revisions/1/mbox/ bdw-nuci7total:156 pass:147 dwarn:0 dfail:0 fail:0 skip:9 bdw-ultratotal:159 pass:153 dwarn:0 dfail:0 fail:0 skip:6 bsw-nuc-2

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: expose fifo pipe underrun counts

2016-01-28 Thread Patchwork
== Summary == Series 2852v1 drm/i915: expose fifo pipe underrun counts http://patchwork.freedesktop.org/api/1.0/series/2852/revisions/1/mbox/ Test kms_flip: Subgroup basic-flip-vs-dpms: pass -> DMESG-WARN (ilk-hp8440p) UNSTABLE bdw-nuci7total:156 pass:147

Re: [Intel-gfx] [maintainer-tools PATCH v2 00/33] dim: function based subcommand handling

2016-01-28 Thread Jani Nikula
On Thu, 28 Jan 2016, Jani Nikula wrote: > This is v2 of [1], with Daniel's concern regarding aliases > addressed. It's much better now. > > Patches 1-11 and 15-31 are mostly just mechanical renames or code > movement. They explode the series so big, but I think they're easier to > look at this way

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: check that rpm ref is held when writing to ringbuf in stolen mem

2016-01-28 Thread Patchwork
== Summary == Series 2862v1 drm/i915: check that rpm ref is held when writing to ringbuf in stolen mem http://patchwork.freedesktop.org/api/1.0/series/2862/revisions/1/mbox/ bdw-nuci7total:156 pass:147 dwarn:0 dfail:0 fail:0 skip:9 bdw-ultratotal:159 pass:153 dwarn:0

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] agp/intel-gtt: Don't leak the scratch page

2016-01-28 Thread Patchwork
== Summary == Series 2876v1 Series without cover letter http://patchwork.freedesktop.org/api/1.0/series/2876/revisions/1/mbox/ bdw-nuci7total:156 pass:147 dwarn:0 dfail:0 fail:0 skip:9 bdw-ultratotal:159 pass:153 dwarn:0 dfail:0 fail:0 skip:6 bsw-nuc-2

Re: [Intel-gfx] [PATCH] drm/i915/bxt: update list of PCIIDs

2016-01-28 Thread Mika Kuoppala
Imre Deak writes: > Add PCIIDs for new versions of the SOC, based on BSpec. Also add the > name of the versions as code comment where this is available. The new > versions don't have any changes visible to the kernel driver. > > Signed-off-by: Imre Deak Reviewed-by: Mika Kuoppala > --- > inc

[Intel-gfx] ✓ Fi.CI.BAT: success for Adding CPU mmap support to DRM_IOCTL_I915_GEM_MMAP_GTT (rev3)

2016-01-28 Thread Patchwork
== Summary == Series 2843v3 Adding CPU mmap support to DRM_IOCTL_I915_GEM_MMAP_GTT http://patchwork.freedesktop.org/api/1.0/series/2843/revisions/3/mbox/ bdw-nuci7total:156 pass:147 dwarn:0 dfail:0 fail:0 skip:9 bdw-ultratotal:159 pass:153 dwarn:0 dfail:0 fail:0

Re: [Intel-gfx] [PATCH v2] drm/i915: refine qemu south bridge detection

2016-01-28 Thread Bruno Wolff III
On Mon, Jan 25, 2016 at 12:02:28 +0100, Gerd Hoffmann wrote: The test for the qemu q35 south bridge added by commit "39bfcd52 drm/i915: more virtual south bridge detection" also matches on real hardware. Having the check for virtual systems last in the list is not enough to avoid that ... Ref

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: check that rpm ref is held when accessing ringbuf in stolen mem (rev2)

2016-01-28 Thread Patchwork
== Summary == Series 2878v2 drm/i915: check that rpm ref is held when accessing ringbuf in stolen mem http://patchwork.freedesktop.org/api/1.0/series/2878/revisions/2/mbox/ Test gem_exec_basic: Subgroup basic-bsd1: pass -> SKIP (bsw-nuc-2) pass

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Make wa_tail_dwords flexible for future platforms. (rev2)

2016-01-28 Thread Patchwork
== Summary == Series 2818v2 drm/i915: Make wa_tail_dwords flexible for future platforms. http://patchwork.freedesktop.org/api/1.0/series/2818/revisions/2/mbox/ Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-b: pass -> DMESG-WARN (ivb-t430s) bdw-nuci7

[Intel-gfx] ✗ Fi.CI.BAT: failure for iGVT-g implementation in i915

2016-01-28 Thread Patchwork
== Summary == Series 2895v1 iGVT-g implementation in i915 Apply patch: http://patchwork.freedesktop.org/api/1.0/series/2895/revisions/1/mbox/ Applying: drm/i915/gvt: Introduce the basic architecture of GVT-g Using index info to reconstruct a base tree... M drivers/gpu/drm/i915/i915_dma.c M

[Intel-gfx] [PATCH] drm/i915: Capture PCI revision and subsytem details in error state

2016-01-28 Thread Arun Siluvery
Revision id along with device id is useful in better identification of the HW and its limitations so include this detail in error state. v2: make it clear that it is PCI revision and We might as well dump PCI subsystem details while we update this (Ville, Chris). Cc: Chris Wilson Signed-off-by:

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915: Make LRC (un)pinning work on context and engine

2016-01-28 Thread Patchwork
== Summary == Series 2896v1 Series without cover letter http://patchwork.freedesktop.org/api/1.0/series/2896/revisions/1/mbox/ Test kms_flip: Subgroup basic-flip-vs-modeset: pass -> DMESG-WARN (ilk-hp8440p) UNSTABLE bdw-nuci7total:156 pass:147 dwarn:0 df

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915: Make LRC (un)pinning work on context and engine

2016-01-28 Thread Tvrtko Ursulin
On 28/01/16 17:26, Patchwork wrote: == Summary == Series 2896v1 Series without cover letter http://patchwork.freedesktop.org/api/1.0/series/2896/revisions/1/mbox/ Test kms_flip: Subgroup basic-flip-vs-modeset: pass -> DMESG-WARN (ilk-hp8440p) UNSTABLE Known a

[Intel-gfx] ✓ Fi.CI.BAT: success for Fix pointer tests in error-handling paths

2016-01-28 Thread Patchwork
== Summary == Series 2897v1 Fix pointer tests in error-handling paths http://patchwork.freedesktop.org/api/1.0/series/2897/revisions/1/mbox/ bdw-ultratotal:159 pass:153 dwarn:0 dfail:0 fail:0 skip:6 bsw-nuc-2total:159 pass:135 dwarn:0 dfail:0 fail:0 skip:24 byt

Re: [Intel-gfx] [PATCH v2 06/18] drm: Add drm_format_plane_width() and drm_format_plane_height()

2016-01-28 Thread Ville Syrjälä
On Mon, Jan 25, 2016 at 06:08:23PM +0100, Daniel Vetter wrote: > On Wed, Jan 20, 2016 at 09:05:27PM +0200, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > Add a few helpers to get the dimensions of the chroma plane(s). > > > > v2: Add kernel-doc (Daniel) > > > > Cc: dri-de.

Re: [Intel-gfx] [PATCH 07/18] drm/i915: Fix intel_tile_width() parameters

2016-01-28 Thread Ville Syrjälä
On Mon, Jan 25, 2016 at 06:12:15PM +0100, Daniel Vetter wrote: > On Wed, Jan 20, 2016 at 09:05:28PM +0200, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > The fb_modifiers and cpp arguments passed to intel_tile_width() in > > intel_fill_fb_ggtt_view() got accidentally swapped

Re: [Intel-gfx] [PATCH v3 08/18] drm/i915: Pass 90/270 vs. 0/180 rotation info for intel_gen4_compute_page_offset()

2016-01-28 Thread Ville Syrjälä
On Mon, Jan 25, 2016 at 06:30:17PM +0100, Daniel Vetter wrote: > On Wed, Jan 20, 2016 at 09:05:29PM +0200, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > The page aligned surface address calculation needs to know which way > > things are rotated. The contract now says that t

[Intel-gfx] [PATCH v3 4/6] drm/i915: consolidate LRC mode HWSP setup & teardown

2016-01-28 Thread Dave Gordon
In legacy ringbuffer mode, the HWSP is a separate GEM object with its own pinning and reference counts. In LRC mode, however, it's not; instead its part of the default context object. The LRC-mode setup & teardown code therefore needs to handle this specially; the presence of the two bugs fixed in

[Intel-gfx] [PATCH v3 2/6] drm/i915: tidy up initialisation failure paths (GEM & LRC)

2016-01-28 Thread Dave Gordon
1. add call to i915_gem_context_fini() to deallocate the default context(s) if the call to init_rings() fails, so that we don't leak the context in that situation. 2. remove useless code in intel_logical_ring_cleanup(), presumably copypasted from legacy ringbuffer version at creation. Si

[Intel-gfx] [PATCH v3 5/6] drm/i915: HWSP should be unmapped earlier in LRC teardown sequence

2016-01-28 Thread Dave Gordon
In LRC mode, the HWSP is part of the default context object, and therefore does not exist independently. Worse, it doesn't contribute to the refcount on the default context object either. Currently, the default context is deallocated in intel_lr_context_free(), but the HWSP kmapping is not torn do

[Intel-gfx] [PATCH v3 3/6] drm/i915: unmap the correct page in intel_logical_ring_cleanup()

2016-01-28 Thread Dave Gordon
The kunmap() call here didn't match the corresponding kmap(). The kmap()ing was changed with the introduction of the GuC-compatible layout of context objects and the introduction of "LRC_PPHWSP_PN", in d167519 drm/i915: Integrate GuC-based command submission but the corresponding kunmap() was

[Intel-gfx] [PATCH v3 6/6] drm/i915: fix context/engine cleanup order

2016-01-28 Thread Dave Gordon
From: Nick Hoath Swap the order of context & engine cleanup, so that contexts are cleaned up first, and *then* engines. This is a more sensible order anyway, but in particular has become necessary since the 'intel_ring_initialized() must be simple and inline' patch, which now uses ring->dev as an

[Intel-gfx] [PATCH v3 0/6] A collection of cleanups, version 3

2016-01-28 Thread Dave Gordon
Various things can go wrong during initialisation and teardown, but they usually don't, so the error-handling paths go largely untested. This collection of patches fixes some things I recently noticed. Some might lead to a kernel OOPS, but mostly they're leaks and other inconsistencies. Includes

[Intel-gfx] [PATCH v3 1/6] drm/i915: tidy up initialisation failure paths (legacy)

2016-01-28 Thread Dave Gordon
1. Fix intel_cleanup_ring_buffer() to handle the error cleanup case where the ringbuffer has been allocated but map-and-pin failed. Unpin it iff it's previously been mapped-and-pinned. 2. Fix the error path in intel_init_ring_buffer(), which already called intel_destroy_ringbuffer_obj(),

[Intel-gfx] [PATCH 1/5] drm/i915/error: capture execlist state on error

2016-01-28 Thread Arun Siluvery
From: Dave Gordon At present, execlist status/ctx_id and CSBs, not the submission queue For: VIZ-2021 Signed-off-by: Dave Gordon --- drivers/gpu/drm/i915/i915_drv.h | 9 + drivers/gpu/drm/i915/i915_gpu_error.c | 38 +-- 2 files changed, 45 inserti

[Intel-gfx] [PATCH 0/5] Capture more useful details in error state

2016-01-28 Thread Arun Siluvery
Few patches to capture more useful details in error state - these details include execlist state, csb events and their decoded form, WA ctx batch buffer. Except WA ctx batch all other patches are already sent as part of preemption patch series but these are independent patches; it may take a while

[Intel-gfx] [PATCH 3/5] drm/i915/error: report ctx id & desc for each request in the queue

2016-01-28 Thread Arun Siluvery
From: Dave Gordon Also decode and output CSB entries, in time order For: VIZ-2021 Signed-off-by: Dave Gordon --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gpu_error.c | 37 +++ 2 files changed, 30 insertions(+), 8 deletions(-) diff

[Intel-gfx] [PATCH 5/5] drm/i915/error: Capture WA ctx batch in error state

2016-01-28 Thread Arun Siluvery
From Gen8 onwards we apply ctx workarounds using special batch buffers that execute during save/restore, good to have them in error state. Signed-off-by: Arun Siluvery --- drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/i915_gpu_error.c | 25 + 2 files

[Intel-gfx] [PATCH 2/5] drm/i915/error: capture ringbuffer pointed to by START

2016-01-28 Thread Arun Siluvery
From: Dave Gordon For: VIZ-2021 Signed-off-by: Dave Gordon --- drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/i915_gpu_error.c | 36 +-- 2 files changed, 27 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/driver

[Intel-gfx] [PATCH 4/5] drm/i915/error: improve CSB reporting

2016-01-28 Thread Arun Siluvery
From: Dave Gordon v2: add separators for readability For: VIZ-2021 Signed-off-by: Dave Gordon Signed-off-by: Arun Siluvery (v2) Signed-off-by: Arun Siluvery --- drivers/gpu/drm/i915/i915_drv.h | 4 +- drivers/gpu/drm/i915/i915_gpu_error.c | 87 --- 2 fi

Re: [Intel-gfx] [PATCH 07/18] drm/i915: Fix intel_tile_width() parameters

2016-01-28 Thread Ville Syrjälä
On Thu, Jan 28, 2016 at 08:35:26PM +0200, Ville Syrjälä wrote: > On Mon, Jan 25, 2016 at 06:12:15PM +0100, Daniel Vetter wrote: > > On Wed, Jan 20, 2016 at 09:05:28PM +0200, ville.syrj...@linux.intel.com > > wrote: > > > From: Ville Syrjälä > > > > > > The fb_modifiers and cpp arguments passed t

Re: [Intel-gfx] drm/i915: Decouple execbuf uAPI from internal implementation

2016-01-28 Thread Dan Carpenter
Hello Tvrtko Ursulin, The patch de1add360522: "drm/i915: Decouple execbuf uAPI from internal implementation" from Jan 15, 2016, leads to the following static checker warning: drivers/gpu/drm/i915/i915_gem_execbuffer.c:1411 eb_select_ring() warn: buffer overflow 'dev_priv->ring' 5

[Intel-gfx] [PATCH] drm/i915: Check DDI max lanes after applying BXT workaround

2016-01-28 Thread Matt Roper
In commit bfb9faab8 we added a workaround for some BXT BIOS that fail to properly initialize the DDI_A_4_LANES bit of the control register (4 lanes is the only valid configuration on BXT since there is no DDI E to share with). A recent patch added some additional checks on this register bit before

[Intel-gfx] [PATCH] drm/i915/skl: Fix DMC load on Skylake J0 and K0

2016-01-28 Thread Mat Martineau
The driver does not load firmware for unknown steppings, so these new steppings must be added to the list. Cc: Rodrigo Vivi Signed-off-by: Mat Martineau --- drivers/gpu/drm/i915/intel_csr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_csr.c b/

[Intel-gfx] [PATCH] drm/i915: Fix file permissions

2016-01-28 Thread Mat Martineau
No functional change Signed-off-by: Mat Martineau --- drivers/gpu/drm/i915/intel_hdmi.c | 0 1 file changed, 0 insertions(+), 0 deletions(-) mode change 100755 => 100644 drivers/gpu/drm/i915/intel_hdmi.c diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c old mo

Re: [Intel-gfx] [PATCH] drm/i915/skl: Fix DMC load on Skylake J0 and K0

2016-01-28 Thread Vivi, Rodrigo
First of all: Reviewed-by: Rodrigo Vivi I've checked with DMC folks that DMC 1.23 that we are currently using and the following releases support J0 and K0. With this patch we are covering all SKL steppings we know so far, but besides being concern with new steppings appearing at any moment I'm

[Intel-gfx] i915 corrupting memory on shutdown since 4.4?

2016-01-28 Thread Chris Bainbridge
Hi, I'm using 4.5-rc1 and before that 4.4. Twice in the past month I've rebooted and the root btrfs partition has become corrupted and unbootable. I was wondering if the cause could be i915 and if so is there any better way to track it down? In test 200 reboots gave only 3 errors, but the third e

Re: [Intel-gfx] [PATCH 01/25] drm/i915/fbc: wait for a vblank instead of 50ms when enabling

2016-01-28 Thread Rodrigo Vivi
Thanks for all the explanation. Makes sense now and everything looks fine for me. Reviewed-by: Rodrigo Vivi On Tue, Jan 26, 2016 at 10:08 AM Zanoni, Paulo R wrote: > Em Ter, 2016-01-26 às 17:44 +, Rodrigo Vivi escreveu: > > > > > > On Thu, Jan 21, 2016 at 12:03 PM Paulo Zanoni > om> wro

Re: [Intel-gfx] [RFC 14/22] drm/i915/slpc: Notification of Display mode change

2016-01-28 Thread Kamble, Sagar A
Thanks for the review Ville. I will update the patch. On 1/22/2016 10:44 PM, Ville Syrjälä wrote: On Wed, Jan 20, 2016 at 06:26:16PM -0800, tom.orou...@intel.com wrote: From: Sagar Arun Kamble GuC SLPC need to be sent data related to Active pipes, refresh rates, widi pipes, fullscreen pipes r

Re: [Intel-gfx] [PATCH v2] drm/i915: refine qemu south bridge detection

2016-01-28 Thread Jani Nikula
On Thu, 28 Jan 2016, Bruno Wolff III wrote: > On Mon, Jan 25, 2016 at 12:02:28 +0100, > Gerd Hoffmann wrote: >>The test for the qemu q35 south bridge added by commit >>"39bfcd52 drm/i915: more virtual south bridge detection" >>also matches on real hardware. Having the check for >>virtual syste

[Intel-gfx] [maintainer-tools RFC PATCH] dim: add cherry-pick-[next-]fixes subcommands

2016-01-28 Thread Jani Nikula
Add two new subcommands for cherry-picking fixes from dinq to drm-intel-fixes and drm-intel-next-fixes. The only difference in the subcommands is the assert branch check to ensure the user is on the right branch. The commands scan dinq for commits Cc'd to stable or drm-intel-fixes, checks whether

Re: [Intel-gfx] [PATCH 1/5] drm/i915/error: capture execlist state on error

2016-01-28 Thread Mika Kuoppala
Arun Siluvery writes: > From: Dave Gordon > > At present, execlist status/ctx_id and CSBs, not the submission queue > > For: VIZ-2021 > Signed-off-by: Dave Gordon > --- > drivers/gpu/drm/i915/i915_drv.h | 9 + > drivers/gpu/drm/i915/i915_gpu_error.c | 38 > +

[Intel-gfx] [maintainer-tools PATCH] dim: update copyright year and authorship

2016-01-28 Thread Jani Nikula
Considering the git stats on the script, seems fair to add myself as an author. Signed-off-by: Jani Nikula --- dim | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/dim b/dim index c64f6e86af62..4cb6ceff5228 100755 --- a/dim +++ b/dim @@ -1,6 +1,6 @@ #!/bin/bash -# Copyrig

Re: [Intel-gfx] [PATCH 5/5] drm/i915/error: Capture WA ctx batch in error state

2016-01-28 Thread Mika Kuoppala
Arun Siluvery writes: > From Gen8 onwards we apply ctx workarounds using special batch buffers that > execute during save/restore, good to have them in error state. > > Signed-off-by: Arun Siluvery > --- > drivers/gpu/drm/i915/i915_drv.h | 2 +- > drivers/gpu/drm/i915/i915_gpu_error.c |

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