Currently Backlight registers which are associated with Power Well 0
are not being saved before gating the power well for S0ix. Hence,
upon resume from S0ix, these registers are not being restored. Due to
this, the display has resumed and since there is no backlight, nothing is
seen. Patch fixes th
== Summary ==
Built on 79686f613b3955a4ed09cee936e7f70ec4e61b67 drm-intel-nightly:
2015y-12m-30d-11h-59m-54s UTC integration manifest
Test kms_flip:
Subgroup basic-flip-vs-dpms:
dmesg-warn -> PASS (ilk-hp8440p)
Subgroup basic-flip-vs-modeset:
On 30.12.2015 15:03, Joonas Lahtinen wrote:
Hi,
On ti, 2015-12-29 at 12:55 +0200, Gabriel Feceoru wrote:
This fixes an issue added with: "1f814da drm/i915: add support for
checking
if we hold an RPM reference", noticed while running
drv_module_reload_basic.
WARNING: CPU: 1 PID: 2032 at drive
On to, 2015-12-31 at 12:44 +0200, Gabriel Feceoru wrote:
>
> On 30.12.2015 15:03, Joonas Lahtinen wrote:
> > Hi
> > > +++ b/drivers/gpu/drm/i915/i915_dma.c
> > > @@ -1136,6 +1136,8 @@ int i915_driver_unload(struct drm_device
> > > *dev)
> > > struct drm_i915_private *dev_priv = dev->d
This gets rid of errors like:
[ 906.286213] [ cut here ]
[ 906.286233] WARNING: CPU: 0 PID: 12252 at
drivers/gpu/drm/i915/intel_drv.h:1457 gen6_read32+0x1ca/0x1e0 [i915]()
[ 906.286234] RPM wakelock ref not held during HW access
[ 906.286235] Modules linked in:
[ 906.
== Summary ==
Built on 79686f613b3955a4ed09cee936e7f70ec4e61b67 drm-intel-nightly:
2015y-12m-30d-11h-59m-54s UTC integration manifest
Test gem_basic:
Subgroup create-close:
pass -> DMESG-WARN (skl-i7k-2)
Test gem_cpu_reloc:
Subgroup basic:
pa
This gets rid of errors like:
[ 906.286213] [ cut here ]
[ 906.286233] WARNING: CPU: 0 PID: 12252 at
drivers/gpu/drm/i915/intel_drv.h:1457 gen6_read32+0x1ca/0x1e0 [i915]()
[ 906.286234] RPM wakelock ref not held during HW access
[ 906.286235] Modules linked in:
[ 906.
== Summary ==
Built on 79686f613b3955a4ed09cee936e7f70ec4e61b67 drm-intel-nightly:
2015y-12m-30d-11h-59m-54s UTC integration manifest
Test kms_flip:
Subgroup basic-flip-vs-dpms:
dmesg-warn -> PASS (ilk-hp8440p)
Subgroup basic-flip-vs-modeset:
On Thu, Dec 31, 2015 at 08:31:45AM +0530, Kannan, Vandana wrote:
> When I submitted the PPS patch in April, I got an input from Jani to
> not make changes in i915_suspend.c as it was to become obsolete.
> Below mail for your reference.
>
> Jani,
> Does your initial comment still hold good?
I don'
On 12/30/2015 4:20 PM, Chris Wilson wrote:
On Wed, Dec 30, 2015 at 04:09:46PM +0530, Kamble, Sagar A wrote:
Turbo frequency range is Rpe to Rp0 when GPU is active as, on workload
submission frequency is taken to Rpe.
Does the HW require us to drop to RPn before entering RC6?
I
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