On Tue, Nov 24, 2015 at 03:15:57PM +, Chris Wilson wrote:
> On Tue, Nov 24, 2015 at 03:58:13PM +0100, Daniel Vetter wrote:
> > On Fri, Nov 20, 2015 at 12:43:48PM +, Chris Wilson wrote:
> > > Having ringbuf->ring point to an engine is confusing, so rename it once
> > > again to ring->engine.
On 10/11/15 23:27, yu@intel.com wrote:
From: Alex Dai
We keep a copy of GuC fw in a GEM obj. However its content is lost
if the GEM obj is swapped (igt/gem_evict_*). Therefore, the later
fw loading during GPU reset will fail. Mark the obj dirty after
copying data into the pages. So its cont
On Tue, Nov 24, 2015 at 03:47:02PM +, Dave Gordon wrote:
> On 10/11/15 23:27, yu@intel.com wrote:
> >From: Alex Dai
> >
> >We keep a copy of GuC fw in a GEM obj. However its content is lost
> >if the GEM obj is swapped (igt/gem_evict_*). Therefore, the later
> >fw loading during GPU reset
Use the first retired request on a new context to unpin
the old context. This ensures that the hw context remains
bound until it has been saved.
Now that the context is pinned until later in the request/context
lifecycle, it no longer needs to be pinned from context_queue to
retire_requests.
This i
Please make sure your patch is tagged with "i-g-t" so it is correctly
identified by patchwork, as described in:
http://lists.freedesktop.org/archives/intel-gfx/2015-November/079712.html
It would also be helpful if the subject line briefly mentions what the
patch does.
On 20 November 2015 at 10:
Hello,
is it known problem that running remote java application (over ssh + x11
forwarding) causes text corruption? Images attached. Using latest git X11
driver + 4.2.0 kernel. HW is broadwell Lenovo thinkpad X1 Carbon 3rd gen
(2015).
--
Lukáš Hejtmánek
__
Hi Nick,
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on v4.4-rc2 next-20151124]
url:
https://github.com/0day-ci/linux/commits/Nick-Hoath/drm-i915-Change-context-lifecycle/20151125-002840
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config
On Fri, Nov 20, 2015 at 12:43:52PM +, Chris Wilson wrote:
> Instead of querying the reset counter before every access to the ring,
> query it the first time we touch the ring, and do a final compare when
> submitting the request. For correctness, we need to then sanitize how
> the reset_counter
On Sat, Nov 21, 2015 at 02:01:55AM +0800, kbuild test robot wrote:
> Hi Chris,
>
> [auto build test WARNING on drm-intel/for-linux-next]
> [cannot apply to v4.4-rc1 next-20151120]
>
> url:
> https://github.com/0day-ci/linux/commits/Chris-Wilson/drm-i915-Pin-the-ifbdev-for-the-info-system_base
commit b04c5bd6fda54703e56f29569e4bca489d6c5a5c
Author: Borun Fu
Date: Sat Jul 12 10:02:27 2014 +0530
drm/i915: Power gating display wells during i915_pm_suspend
moved for_each_power_domain from intel_display.c to i915_drv.h but we
still have the definition around in intel_display.c, presu
On 11/24/2015 05:26 AM, Imre Deak wrote:
On ti, 2015-11-24 at 14:04 +0100, Daniel Vetter wrote:
> On Mon, Nov 23, 2015 at 03:02:58PM -0800, yu@intel.com wrote:
> > From: Alex Dai
> >
> > When GuC Work Queue is full, driver will wait GuC for avaliable
> > space by delaying 1ms. The wait nee
On ti, 2015-11-24 at 09:00 -0800, Yu Dai wrote:
>
> On 11/24/2015 05:26 AM, Imre Deak wrote:
> > On ti, 2015-11-24 at 14:04 +0100, Daniel Vetter wrote:
> > > On Mon, Nov 23, 2015 at 03:02:58PM -0800, yu@intel.com wrote:
> > > > From: Alex Dai
> > > >
> > > > When GuC Work Queue is full, driv
On Fri, Nov 20, 2015 at 03:57:24PM +0530, Dhanya Pillai wrote:
> From: Dhanya
>
> This patch will verify color correction capability of a display driver.
> Gamma/CSC/De-gamma verifications are supported.
>
> Signed-off-by: Dhanya
Fundamental problem with this test is that pretty much all valid
Hi Rodrigo,
On 21 November 2015 at 00:46, Rodrigo Vivi wrote:
> The goal of this series is to remove many different retries we have
> for aux communication and offload them to drm.
>
> However on first attempt I was only returning EBUSY to use drm retries
> but there was no waiting there. So this
Hi Rodrigo,
On 11 November 2015 at 21:19, Rodrigo Vivi wrote:
> Proceeding with the big series split here goes the general PSR
> improvements and stabilization work.
>
> There is no critical fix on this series although I believe it is
> good to have all of them before we can enable PSR back by de
On Mon, Nov 23, 2015 at 09:20:24AM +, Chris Wilson wrote:
> If the system has no available swap pages, we cannot make forward
> progress in the shrinker by releasing active pages, only by releasing
> purgeable pages which are immediately reaped. Take total_swap_pages into
> account when countin
We have serious dangling else bugs waiting to happen in our for_each_
style macros with ifs. Consider, for example,
#define for_each_power_domain(domain, mask) \
for ((domain) = 0; (domain) < POWER_DOMAIN_NUM; (domain)++) \
for_each_if ((1 << (dom
On Tue, 24 Nov 2015, Jani Nikula wrote:
> We have serious dangling else bugs waiting to happen in our for_each_
> style macros with ifs. Consider, for example,
>
> #define for_each_power_domain(domain, mask) \
> for ((domain) = 0; (domain) < POWER_DOMAIN_NUM; (dom
From: Marius Vlad
Signed-off-by: Marius Vlad
---
tests/pm_rpm.c | 90 ++
1 file changed, 90 insertions(+)
diff --git a/tests/pm_rpm.c b/tests/pm_rpm.c
index c4fb19c..86d16ad 100644
--- a/tests/pm_rpm.c
+++ b/tests/pm_rpm.c
@@ -1729,6 +172
On 24/11/15 16:04, Daniel Vetter wrote:
On Tue, Nov 24, 2015 at 03:47:02PM +, Dave Gordon wrote:
On 10/11/15 23:27, yu@intel.com wrote:
From: Alex Dai
We keep a copy of GuC fw in a GEM obj. However its content is lost
if the GEM obj is swapped (igt/gem_evict_*). Therefore, the later
f
On Mon, Nov 23, 2015 at 03:12:35PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Current code moves _any_ VMA to the inactive list only when
> _all_ rendering on an object (so from any context or VM) has
> been completed.
>
> This creates an un-natural situation where the context (and
On Mon, Nov 23, 2015 at 06:06:15PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> No reason why ibx_{enable,disable}_display_interrupt() couldn't be
> static inlines instead of cpp macros.
>
> Signed-off-by: Ville Syrjälä
Not really an opinion on this, but we have this s
On Mon, Nov 23, 2015 at 06:06:16PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> ironlake_{enable,disable}_display_irq() each just call
> ilk_update_display_irq() so let's make them static inlines.
>
> While at it s/ironlake/ilk/ to make things shorter, and a bit more
> c
On Mon, Nov 23, 2015 at 06:06:17PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Pull the BDW+ DE pipe interrupt mask frobbing into a central place,
> like we have for other platforms.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/i915_drv.h|
On Tue, 24 Nov 2015, Maarten Lankhorst
wrote:
> +#define drm_for_each_encoder_mask(encoder, dev, encoder_mask) \
> + list_for_each_entry((encoder), &(dev)->mode_config.encoder_list, head) \
> + if ((encoder_mask) & (1 << drm_encoder_index(encoder)))
How about
if (!((enco
On Tue, Nov 24, 2015 at 05:47:08PM +, Dave Gordon wrote:
> On 24/11/15 16:04, Daniel Vetter wrote:
> >On Tue, Nov 24, 2015 at 03:47:02PM +, Dave Gordon wrote:
> >>On 10/11/15 23:27, yu@intel.com wrote:
> >>>From: Alex Dai
> >>>
> >>>We keep a copy of GuC fw in a GEM obj. However its co
Hi
On Tue, Nov 24, 2015 at 7:00 PM, Jani Nikula
wrote:
> On Tue, 24 Nov 2015, Maarten Lankhorst
> wrote:
>> +#define drm_for_each_encoder_mask(encoder, dev, encoder_mask) \
>> + list_for_each_entry((encoder), &(dev)->mode_config.encoder_list, head)
>> \
>> + if ((encoder_mask)
On Tue, Nov 24, 2015 at 07:05:47PM +0200, Imre Deak wrote:
> On ti, 2015-11-24 at 09:00 -0800, Yu Dai wrote:
> >
> > On 11/24/2015 05:26 AM, Imre Deak wrote:
> > > On ti, 2015-11-24 at 14:04 +0100, Daniel Vetter wrote:
> > > > On Mon, Nov 23, 2015 at 03:02:58PM -0800, yu@intel.com wrote:
> > >
On Tue, Nov 24, 2015 at 12:04:06PM +0200, Ville Syrjälä wrote:
> On Tue, Nov 24, 2015 at 03:35:24PM +0530, akash.g...@intel.com wrote:
> > From: Akash Goel
> >
> > When the object is moved out of CPU read domain, the cachelines
> > are not invalidated immediately. The invalidation is deferred til
On Tue, Nov 24, 2015 at 06:47:25PM +0200, Jani Nikula wrote:
> commit b04c5bd6fda54703e56f29569e4bca489d6c5a5c
> Author: Borun Fu
> Date: Sat Jul 12 10:02:27 2014 +0530
>
> drm/i915: Power gating display wells during i915_pm_suspend
>
> moved for_each_power_domain from intel_display.c to i
On Tue, Nov 24, 2015 at 07:36:25PM +0200, Jani Nikula wrote:
> We have serious dangling else bugs waiting to happen in our for_each_
> style macros with ifs. Consider, for example,
>
> #define for_each_power_domain(domain, mask) \
> for ((domain) = 0; (domain) < P
On 11/24/2015 10:08 AM, Daniel Vetter wrote:
On Tue, Nov 24, 2015 at 07:05:47PM +0200, Imre Deak wrote:
> On ti, 2015-11-24 at 09:00 -0800, Yu Dai wrote:
> >
> > On 11/24/2015 05:26 AM, Imre Deak wrote:
> > > On ti, 2015-11-24 at 14:04 +0100, Daniel Vetter wrote:
> > > > On Mon, Nov 23, 2015 at
Hi Ander&Sivakumar,
Dave&I had a short discussion about reprobing DP (and MST) state on
resume. I think this is something we've missed in our dp hpd handling
rework thus far. And at least for SST we need to take it into account
since it would be a regression.
Currently it's done through ->detect
On Tue, Nov 24, 2015 at 10:36:54AM -0800, Yu Dai wrote:
>
>
> On 11/24/2015 10:08 AM, Daniel Vetter wrote:
> >On Tue, Nov 24, 2015 at 07:05:47PM +0200, Imre Deak wrote:
> >> On ti, 2015-11-24 at 09:00 -0800, Yu Dai wrote:
> >> >
> >> > On 11/24/2015 05:26 AM, Imre Deak wrote:
> >> > > On ti, 2015
We have serious dangling else bugs waiting to happen in our for_each_
style macros with ifs. Consider, for example,
#define for_each_power_domain(domain, mask) \
for ((domain) = 0; (domain) < POWER_DOMAIN_NUM; (domain)++) \
if ((1 << (domain)) & (
We have serious dangling else bugs waiting to happen in our for_each_
style macros with ifs. Consider, for example,
#define drm_for_each_plane_mask(plane, dev, plane_mask) \
list_for_each_entry((plane), &(dev)->mode_config.plane_list, head) \
if ((plane_mask) & (1 << drm
On Tue, 24 Nov 2015, Daniel Vetter wrote:
> On Tue, Nov 24, 2015 at 06:47:25PM +0200, Jani Nikula wrote:
>> commit b04c5bd6fda54703e56f29569e4bca489d6c5a5c
>> Author: Borun Fu
>> Date: Sat Jul 12 10:02:27 2014 +0530
>>
>> drm/i915: Power gating display wells during i915_pm_suspend
>>
>> m
On Mon, Nov 02, 2015 at 12:33:47PM -0800, Rafael Antognolli wrote:
> This module is heavily based on i2c-dev. Once loaded, it provides one
> dev node per DP AUX channel, named drm_dp_auxN, where N is an integer.
>
> It's possible to know which connector owns this aux channel by looking
> at the re
On Mon, Nov 02, 2015 at 12:33:48PM -0800, Rafael Antognolli wrote:
> So far, the i915 driver and some other drivers set it to the drm_device,
> which doesn't allow one to know which DP a given aux channel is related
> to. Changing this to be the drm_connector provides proper nesting, still
> allowi
On Tue, 2015-11-24 at 17:12 +, Daniel Stone wrote:
> Hi Rodrigo,
>
> On 11 November 2015 at 21:19, Rodrigo Vivi
> wrote:
> > Proceeding with the big series split here goes the general PSR
> > improvements and stabilization work.
> >
> > There is no critical fix on this series although I bel
Hi Chris,
On Fri, Nov 20, 2015 at 04:29:52PM +, Chris Wilson wrote:
> A long time ago (before 3.14) we relied on a permanent pinning of the
> ifbdev to lock the fb in place inside the GGTT. However, the
> introduction of stealing the BIOS framebuffer and reusing its address in
> the GGTT for t
On Tue, Nov 24, 2015 at 05:43:22PM +0100, Daniel Vetter wrote:
> On Fri, Nov 20, 2015 at 12:43:52PM +, Chris Wilson wrote:
> > Instead of querying the reset counter before every access to the ring,
> > query it the first time we touch the ring, and do a final compare when
> > submitting the req
On Tue, Nov 24, 2015 at 07:36:25PM +0200, Jani Nikula wrote:
> /* Iterate over initialised rings */
> #define for_each_ring(ring__, dev_priv__, i__) \
> for ((i__) = 0; (i__) < I915_NUM_RINGS; (i__)++) \
> - if (((ring__) = &(dev_priv__)->ring[(i__)]),
> intel_ring_initialized(
On 11/24/2015 11:13 AM, Daniel Vetter wrote:
On Tue, Nov 24, 2015 at 10:36:54AM -0800, Yu Dai wrote:
>
>
> On 11/24/2015 10:08 AM, Daniel Vetter wrote:
> >On Tue, Nov 24, 2015 at 07:05:47PM +0200, Imre Deak wrote:
> >> On ti, 2015-11-24 at 09:00 -0800, Yu Dai wrote:
> >> >
> >> > On 11/24/2015
On Tue, Nov 24, 2015 at 07:14:31PM +0100, Daniel Vetter wrote:
> On Tue, Nov 24, 2015 at 12:04:06PM +0200, Ville Syrjälä wrote:
> > On Tue, Nov 24, 2015 at 03:35:24PM +0530, akash.g...@intel.com wrote:
> > > From: Akash Goel
> > >
> > > When the object is moved out of CPU read domain, the cacheli
Hi,
thanks for the patch. Looks ok in general, I have a few comments below.
On Tue, 2015-11-24 at 19:42 +0200, marius.c.v...@intel.com wrote:
> From: Marius Vlad
>
> Signed-off-by: Marius Vlad
> ---
> tests/pm_rpm.c | 90
> ++
> 1 file
On Tue, Nov 24, 2015 at 07:06:21PM +0100, Daniel Vetter wrote:
> Just setting obj->dirty only works if you also have the pages.
Exactly. The CPU access has historically always been page-by-page. The
style here more or less to emulate the CPU mmap.
> But it's also not awesome that set_to_gtt_doma
On Tue, Nov 24, 2015 at 06:15:47PM +0100, Daniel Vetter wrote:
> On Mon, Nov 23, 2015 at 09:20:24AM +, Chris Wilson wrote:
> > If the system has no available swap pages, we cannot make forward
> > progress in the shrinker by releasing active pages, only by releasing
> > purgeable pages which ar
On Tue, Nov 24, 2015 at 10:26:01PM +, Chris Wilson wrote:
> On Tue, Nov 24, 2015 at 07:36:25PM +0200, Jani Nikula wrote:
> > /* Iterate over initialised rings */
> > #define for_each_ring(ring__, dev_priv__, i__) \
> > for ((i__) = 0; (i__) < I915_NUM_RINGS; (i__)++) \
> > - if
On 11/24/2015 08:23 AM, Nick Hoath wrote:
Use the first retired request on a new context to unpin
the old context. This ensures that the hw context remains
bound until it has been saved.
Now that the context is pinned until later in the request/context
lifecycle, it no longer needs to be pinned
From: Akash Goel
When the object is moved out of CPU read domain, the cachelines
are not invalidated immediately. The invalidation is deferred till
next time the object is brought back into CPU read domain.
But the invalidation is done unconditionally, i.e. even for the case
where the cachelines
From: Libin Yang
This adds code to initialise the SDP streams
for a sink in the simplest ordering.
I've no idea how you'd want to control the
ordering at this level, so don't bother
until someone comes up with a use case.
Signed-off-by: Libin Yang
Signed-off-by: Dave Airlie
---
drivers/gpu/d
From: Libin Yang
This patch adds support for DP MST audio in i915.
Enable audio codec when DP MST is enabled if has_audio flag is set.
Disable audio codec when DP MST is disabled if has_audio flag is set.
Signed-off-by: Libin Yang
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/i915/i915_debu
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