From: Libin Yang
When modeset occurs and the TMDS frequency is set to some
speical values, the N/CTS need to be set manually if audio
is playing.
Signed-off-by: Libin Yang
---
drivers/gpu/drm/i915/intel_audio.c | 56 --
include/drm/i915_component.h | 1
On 09/09/2015 08:06 PM, Daniel Vetter wrote:
On Wed, Sep 9, 2015 at 6:36 PM, Tvrtko Ursulin
wrote:
I am not even going that far, just talking about last frame stuck on screen.
For me making that easier is a regression.
So let's look at various systems:
- super-modern fbdev less system: login
On Wed, 09 Sep 2015, Animesh Manna wrote:
> On 9/9/2015 9:00 PM, Daniel Vetter wrote:
>> On Wed, Sep 09, 2015 at 04:52:09PM +0200, Takashi Iwai wrote:
>>> Fix a wrong logical AND (&&) used for the range check of CSR MMIO.
>>>
>>> Spotted nicely by gcc -Wlogical-op flag:
>>>drivers/gpu/drm/i915
On 09/09/2015 04:03 PM, Chris Wilson wrote:
On Wed, Sep 09, 2015 at 02:56:16PM +0100, Tvrtko Ursulin wrote:
Hi,
On 08/10/2015 09:51 AM, Chris Wilson wrote:
+out:
drm_free_large(pvec);
return ret;
+
+err:
+ /* No pages here, no need for the mmu-notifier to wake us */
+
On 09/09/2015 04:42 PM, Chris Wilson wrote:
On Wed, Sep 09, 2015 at 04:20:08PM +0100, Tvrtko Ursulin wrote:
On 09/09/2015 04:08 PM, Chris Wilson wrote:
On Wed, Sep 09, 2015 at 03:45:40PM +0100, Tvrtko Ursulin wrote:
On 08/10/2015 09:51 AM, Chris Wilson wrote:
Whilst discussing possible ways
On Thu, Sep 10, 2015 at 10:44:14AM +0100, Tvrtko Ursulin wrote:
>
> On 09/09/2015 04:03 PM, Chris Wilson wrote:
> >On Wed, Sep 09, 2015 at 02:56:16PM +0100, Tvrtko Ursulin wrote:
> >>
> >>Hi,
> >>
> >>On 08/10/2015 09:51 AM, Chris Wilson wrote:
> >>>+out:
> >>> drm_free_large(pvec);
> >>
The userptr worker allows for a slight race condition where upon there
may two or more threads calling get_user_pages for the same object. When
we have the array of pages, then we serialise the update of the object.
However, the worker should only overwrite the obj->userptr.work pointer
if and only
Whilst discussing possible ways to trigger an invalidate_range on a
userptr with an aliased GGTT mmapping (and so cause a struct_mutex
deadlock), the conclusion is that we can, and we must, prevent any
possible deadlock by avoiding taking the mutex at all during
invalidate_range. This has numerous
Michał Winiarski found a really evil way to trigger a struct_mutex
deadlock with userptr. He found that if he allocated a userptr bo and
then GTT mmaped another bo, or even itself, at the same address as the
userptr using MAP_FIXED, he could then cause a deadlock any time we then
had to invalidate
On Thu, Sep 10, 2015 at 10:07:41AM +0100, Tvrtko Ursulin wrote:
>
> On 09/09/2015 08:06 PM, Daniel Vetter wrote:
> >On Wed, Sep 9, 2015 at 6:36 PM, Tvrtko Ursulin
> > wrote:
> >>I am not even going that far, just talking about last frame stuck on screen.
> >>For me making that easier is a regressi
On Wed, 09 Sep 2015, Ville Syrjälä wrote:
> On Wed, Sep 09, 2015 at 04:41:04PM +0100, Chris Wilson wrote:
>> On Wed, Sep 09, 2015 at 06:28:50PM +0300, Ville Syrjälä wrote:
>> > On Tue, Sep 08, 2015 at 09:16:11PM +0100, Chris Wilson wrote:
>> > > Would it make sense to disable dvfs after a failure
On 09/10/2015 10:56 AM, Daniel Vetter wrote:
On Thu, Sep 10, 2015 at 10:07:41AM +0100, Tvrtko Ursulin wrote:
On 09/09/2015 08:06 PM, Daniel Vetter wrote:
On Wed, Sep 9, 2015 at 6:36 PM, Tvrtko Ursulin
wrote:
I am not even going that far, just talking about last frame stuck on screen.
For me
On Wed, 09 Sep 2015, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Signed-off-by: Ville Syrjälä
Both LGTM, though I'd apply this paint on the 2nd patch:
diff --git a/tools/intel_reg.c b/tools/intel_reg.c
index 26f908fa5c01..e4c0fcdc109f 100644
--- a/tools/intel_reg.c
+++ b/too
On 09/10/2015 10:51 AM, Chris Wilson wrote:
Michał Winiarski found a really evil way to trigger a struct_mutex
deadlock with userptr. He found that if he allocated a userptr bo and
then GTT mmaped another bo, or even itself, at the same address as the
userptr using MAP_FIXED, he could then cause
On 09/10/2015 11:25 AM, Tvrtko Ursulin wrote:
+
+active = false;
+if (pinned < 0)
+ret = pinned;
+else if (pinned < num_pages)
+ret = __i915_gem_userptr_get_pages_schedule(obj, &active);
+else
ret = __i915_gem_userptr_set_pages(obj, pvec, num_pages);
-
All this is because of the BXT A0/A1 workaround for HPD pins.
As you can see, this is only done for BXT A0/A1 and can be removed when we have
newer stable steppings.
Durga can add more..
Regards,
Sonika
From: Rodrigo Vivi [mailto:rodrigo.v...@gmail.com]
Sent: Thursday, September 10, 2015 12:54 A
igt_wan and other log functions are not async-signal safe, so should not
be used in signal handlers.
Reported-by: Paulo Zanoni
Signed-off-by: Thomas Wood
---
lib/igt_aux.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/lib/igt_aux.c b/lib/igt_aux.c
index e77392c
On 10 September 2015 at 07:06, Daniel Stone wrote:
> Hi,
>
> On 10 September 2015 at 06:57, Daniel Stone wrote:
>> Exercises the new blob-creation ioctl, testing lifetimes and behaviour
>> of user-created blobs, as well as exercising all the invariant
>> conditions we guarantee from modes exposed
On Tue, 08 Sep 2015, Clint Taylor wrote:
> On 09/08/2015 11:05 AM, ville.syrj...@linux.intel.com wrote:
>> From: Ville Syrjälä
>>
>> If one disables DDR DVFS in the BIOS, Punit will apparently ignores
>> all DDR DVFS request. Currently we assume that DDR DVFS is always
>> operational, which leads
On Mon, Aug 03, 2015 at 03:45:32PM +0530, Gaurav K Singh wrote:
> Just like single link MIPI panels, similarly for dual link panels, pipe to be
> configured is based on the DVO port from VBT Block 2. In hardware,
> Port A is mapped with Pipe A and Port C is mapped with Pipe B.
>
> This issue got i
From: Ville Syrjälä
Some DSI bits are present only in one port A register, and not present
in a port C register. Currently we write such bits multiple times
while looping over the ports. This doesn't seem entirely sane as the
effect of the bit has already occurred by the time we've written it for
From: Ville Syrjälä
Everywhere else we check for intel_dsi->dual_link instead of the
port mask. So do the same when setting up the lane configuration
in MIPI_PORT_CTRL.
Cc: Gaurav K Singh
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_dsi.c | 2 +-
1 file changed, 1 insertion(+),
Hi Thomas,
On 10 September 2015 at 13:31, Thomas Wood wrote:
> On 10 September 2015 at 07:06, Daniel Stone wrote:
>> On 10 September 2015 at 06:57, Daniel Stone wrote:
>>> Exercises the new blob-creation ioctl, testing lifetimes and behaviour
>>> of user-created blobs, as well as exercising all
Hi Rodrigo,
I had to add this to get HDMI hotplug working on BXT.
As you might already know, we have the HPD pins A & B
swapped in BXT. And, we are using HPD_PORT_A as
'intel_encoder->hpd_pin' for HDMI on port B.
Without this, When an HPD on HDMI (port B) happens, the interrupt
is handled as an e
On Thu, 10 Sep 2015, Ville Syrjälä wrote:
> On Mon, Aug 03, 2015 at 03:45:32PM +0530, Gaurav K Singh wrote:
>> Just like single link MIPI panels, similarly for dual link panels, pipe to be
>> configured is based on the DVO port from VBT Block 2. In hardware,
>> Port A is mapped with Pipe A and Por
On Thu, 10 Sep 2015, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Everywhere else we check for intel_dsi->dual_link instead of the
> port mask. So do the same when setting up the lane configuration
> in MIPI_PORT_CTRL.
>
> Cc: Gaurav K Singh
> Signed-off-by: Ville Syrjälä
> ---
Extend init/init_hw split to context init.
- Move context initialisation in to i915_gem_init_hw
- Move one off initialisation for render ring to
i915_gem_validate_context
- Move default context initialisation to logical_ring_init
Rename intel_lr_context_deferred_create to
intel_lr
On Thu, Sep 10, 2015 at 04:35:12PM +0300, Jani Nikula wrote:
> On Thu, 10 Sep 2015, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > Everywhere else we check for intel_dsi->dual_link instead of the
> > port mask. So do the same when setting up the lane configuration
> > in MIPI
On 10 September 2015 at 14:02, Daniel Stone wrote:
> Hi Thomas,
>
> On 10 September 2015 at 13:31, Thomas Wood wrote:
>> On 10 September 2015 at 07:06, Daniel Stone wrote:
>>> On 10 September 2015 at 06:57, Daniel Stone wrote:
Exercises the new blob-creation ioctl, testing lifetimes and be
Hi Dave -
Fixes headed for v4.3-rc1, including Maarten's DP MST state checker fix
you requested.
BR,
Jani.
The following changes since commit 6fa2d197936ba0b8936e813d0adecefac160062b:
i915: Set ddi_pll_sel in DP MST path (2015-09-01 12:42:27 +0300)
are available in the git repository at:
On Thu, Sep 10, 2015 at 01:07:30PM +, R, Durgadoss wrote:
> Hi Rodrigo,
>
> I had to add this to get HDMI hotplug working on BXT.
> As you might already know, we have the HPD pins A & B
> swapped in BXT. And, we are using HPD_PORT_A as
> 'intel_encoder->hpd_pin' for HDMI on port B.
People kee
On Wed, Aug 05, 2015 at 04:46:38PM +0200, Daniel Vetter wrote:
> If we shut down the crtc we might run into WM consistency checks which
> fail because we haven't yet read out the WM state. So do that before
> we sanitized the state.
>
> This fixes a WARNING in the ilk wm code which assumes that le
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index b68aa95c5460..bad22cb828c0 100644
--- a/drivers/gpu/drm/i9
This function was still using the legacy state, convert it to atomic.
While we're at it, fix the FIXME too and disable the primary plane.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 26 --
1 file changed, 12 insertions(+), 14 deletions(-)
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 80a98bffd5ba..33200403a5db 100644
--- a/drivers/gpu/drm/i915/intel_di
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index b809ee2a8678..f41ca558ba3b 100644
--- a/drivers/gpu/drm/i915/intel_d
The crtc->active guards are no longer needed now that all state
updates are outside the commit.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 16 ++--
drivers/gpu/drm/i915/intel_sprite.c | 3 ---
2 files changed, 6 insertions(+), 13 deletions(-)
diff
This should allow not running plane commit when the crtc is off.
While the atomic helpers update those, crtc->x/y is only updated
during modesets, and primary plane is updated after this function
returns.
Unfortunately non-atomic watermarks and fbc still depend on this
state inside i915, so it has
Unfortunately fbc still depends on legacy primary state, so
it can't be killed off completely yet.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 4
drivers/gpu/drm/i915/intel_sprite.c | 2 --
2 files changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i
With the conversion to atomic this cannot happen any more.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_atomic_plane.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c
b/drivers/gpu/drm/i915/intel_atomic_plane.
Legacy state might not be updated any more.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/i915_debugfs.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 41629faaf939..72ae3472
In async mode crtc->config can be updated after the locks are released,
resulting in the wrong state being duplicated.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_atomic.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_a
This series reduces the dependency on legacy state, and replaces it
with atomic state where possible.
Maarten Lankhorst (10):
drm/i915: Use atomic plane state in the primary plane update.
drm/i915: Use the plane state in intel_crtc_info.
drm/i915: Use the atomic state in intel_update_primary
This patch adds support for Backlight Control over the AUX channel for
DP and eDP connectors. It allows the backlight of DP and eDP connected
displays to be controlled from software using sysfs interface.
The code first checks if the DP/eDP display has the capability for
backlight control by readi
On Thu, Sep 10, 2015 at 01:58:54AM +0530, Animesh Manna wrote:
>
>
> On 9/2/2015 2:24 PM, Daniel Vetter wrote:
> >On Wed, Aug 26, 2015 at 07:40:54PM +0530, Animesh Manna wrote:
> >>
> >>On 8/26/2015 6:40 PM, Daniel Vetter wrote:
> >>>On Wed, Aug 26, 2015 at 01:36:05AM +0530, Animesh Manna wrote:
On Thu, Sep 10, 2015 at 01:07:18AM +, Jindal, Sonika wrote:
>
>
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
> Sent: Wednesday, September 9, 2015 8:48 PM
> To: Jindal, Sonika
> Cc: Daniel Vetter; intel-gfx@lists.freedesktop.org;
On Thu, Sep 10, 2015 at 04:35:57PM +0300, Ville Syrjälä wrote:
> On Thu, Sep 10, 2015 at 01:07:30PM +, R, Durgadoss wrote:
> > Hi Rodrigo,
> >
> > I had to add this to get HDMI hotplug working on BXT.
> > As you might already know, we have the HPD pins A & B
> > swapped in BXT. And, we are usi
On Wed, Sep 09, 2015 at 10:04:23AM -0700, Jesse Barnes wrote:
> [Adding Rob & Thierry]
>
> On 09/09/2015 09:36 AM, Smith, Gary K wrote:
> > I don't understand why this is an issue. Surely the fb is to describe
> > static state about the buffer, not dynamic state. The fb should be
> > created with
On Wed, Sep 09, 2015 at 06:54:17PM +, Rodrigo Vivi wrote:
> Reviewed-by: Rodrigo Vivi
>
> On Fri, Sep 4, 2015 at 6:37 AM Sonika Jindal
> wrote:
>
> > From: Shashank Sharma
> >
> > This patch adds the intel_connector initialized to intel_hdmi
> > display, during the init phase, just like th
Use WARN_ONCE in a bunch of places and demote a message that would
continually spam us.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_csr.c| 12 +--
drivers/gpu/drm/i915/intel_runtime_pm.c | 36 -
2 files changed, 24 insertions(+), 24
Thomas,
Sure thing. Here you go:
https://git.collabora.com/cgit/user/fedke.m/intel-gpu-tools.git/log/?h=drm_open_parameter_review05
-mf
On 09/09/2015 09:54 AM, Thomas Wood wrote:
On 14 August 2015 at 16:22, Micah Fedke wrote:
Changes since last version of patch:
Now using the core_* tes
On Thu, Sep 10, 2015 at 03:11:42PM +0100, Yetunde Adebisi wrote:
> This patch adds support for Backlight Control over the AUX channel for
> DP and eDP connectors. It allows the backlight of DP and eDP connected
> displays to be controlled from software using sysfs interface.
>
> The code first che
On Thu, Sep 10, 2015 at 08:20:28AM -0700, Jesse Barnes wrote:
> Use WARN_ONCE in a bunch of places and demote a message that would
> continually spam us.
>
> Signed-off-by: Jesse Barnes
I had something that could very well address the same problem(s):
http://lists.freedesktop.org/archives/int
I used these additional fields to track down the issue I saw on HSW.
References: https://bugs.freedesktop.org/show_bug.cgi?id=91579
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_drv.h| 2 ++
drivers/gpu/drm/i915/intel_sprite.c | 16
2 files changed, 14 insertio
On Thu, Sep 10, 2015 at 04:08:00PM +0200, Maarten Lankhorst wrote:
> Unfortunately fbc still depends on legacy primary state, so
> it can't be killed off completely yet.
>
> Signed-off-by: Maarten Lankhorst
Wont it be enough that the helpers will update these legacy states for us?
And I didn't s
On Thu, Sep 10, 2015 at 04:07:58PM +0200, Maarten Lankhorst wrote:
> This function was still using the legacy state, convert it to atomic.
> While we're at it, fix the FIXME too and disable the primary plane.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/intel_display.c | 26
On Thu, Sep 10, 2015 at 04:08:01PM +0200, Maarten Lankhorst wrote:
> This should allow not running plane commit when the crtc is off.
> While the atomic helpers update those, crtc->x/y is only updated
> during modesets, and primary plane is updated after this function
> returns.
>
> Unfortunately
On HSW at least (still testing other platforms, but should be harmless
elsewhere), the DSL reg reads back as 0 when read around vblank start
time. This ends up confusing the atomic start/end checking code, since
it causes the update to appear as if it crossed a frame count boundary.
Workaround tha
On Thu, Sep 10, 2015 at 04:08:03PM +0200, Maarten Lankhorst wrote:
> In async mode crtc->config can be updated after the locks are released,
> resulting in the wrong state being duplicated.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/intel_atomic.c | 9 +
> 1 file c
On Thu, Sep 10, 2015 at 04:07:59PM +0200, Maarten Lankhorst wrote:
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/intel_display.c | 13 +++--
> 1 file changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915
On Thu, Sep 10, 2015 at 04:07:58PM +0200, Maarten Lankhorst wrote:
> This function was still using the legacy state, convert it to atomic.
> While we're at it, fix the FIXME too and disable the primary plane.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/intel_display.c | 26
On Thu, Sep 10, 2015 at 05:46:12PM +0200, Daniel Vetter wrote:
> On Thu, Sep 10, 2015 at 04:08:03PM +0200, Maarten Lankhorst wrote:
> > In async mode crtc->config can be updated after the locks are released,
> > resulting in the wrong state being duplicated.
> >
> > Signed-off-by: Maarten Lankhors
On Thu, Sep 10, 2015 at 04:08:04PM +0200, Maarten Lankhorst wrote:
> Signed-off-by: Maarten Lankhorst
Not sure this is worth it ... I'll punt for now. But if you add a bit of
justification that we could get rid of update_state_fb entirely it would
look better ;-)
-Daniel
> ---
> drivers/gpu/drm/
On Thu, Sep 10, 2015 at 04:08:05PM +0200, Maarten Lankhorst wrote:
> The crtc->active guards are no longer needed now that all state
> updates are outside the commit.
>
> Signed-off-by: Maarten Lankhorst
This looks actually complicated, so I'll punt. Merged most of the other
patches from your se
From: Ville Syrjälä
intel_modeset_readout_hw_state() seems like the more appropriate place
for populating the scanline_offset and timestamping constants than
intel_sanitize_crtc() since they are basically part of the state we
read out.
Cc: Maarten Lankhorst
Cc: Patrik Jakobsson
Signed-off-by:
From: Ville Syrjälä
Add a .get_hw_state() method for planes, returning true or false
depending on whether the plane is enabled. Use it to populate the
plane state 'visible' during state readout.
Cc: Maarten Lankhorst
Cc: Patrik Jakobsson
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/
From: Ville Syrjälä
Move the sprite/cursor plane disabling to occur in intel_sanitize_crtc()
where it belongs instead of doing it in intel_modeset_readout_hw_state().
The plane disabling was first added in
4cf0ebbd4fafbdf8e6431dbb315e5511c3efdc3b drm/i915: Rework plane readout.
I got the idea f
From: Ville Syrjälä
The dotclock is often calculated in encoder .get_config(), so we
shouldn't copy the adjusted_mode to hwmode until we have read out the
dotclock.
Gets rid of some warnings like these:
[drm:drm_calc_timestamping_constants [drm]] *ERROR* crtc 21: Can't calculate
constants, dotc
On Thu, Sep 10, 2015 at 06:59:09PM +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Add a .get_hw_state() method for planes, returning true or false
> depending on whether the plane is enabled. Use it to populate the
> plane state 'visible' during state readout.
>
> Cc: Maar
On Thu, Sep 10, 2015 at 08:34:23AM -0700, Jesse Barnes wrote:
> I used these additional fields to track down the issue I saw on HSW.
We already have the tracepoints with the scanline information. Not sure
what extra this would give.
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=91
On Thu, Sep 10, 2015 at 08:34:22AM -0700, Jesse Barnes wrote:
> On HSW at least (still testing other platforms, but should be harmless
> elsewhere), the DSL reg reads back as 0 when read around vblank start
> time. This ends up confusing the atomic start/end checking code, since
> it causes the up
On Thu, Sep 10, 2015 at 06:07:34PM +0200, Daniel Vetter wrote:
> On Thu, Sep 10, 2015 at 06:59:09PM +0300, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > Add a .get_hw_state() method for planes, returning true or false
> > depending on whether the plane is enabled. Use it to
On 09/10/2015 09:05 AM, Ville Syrjälä wrote:
> On Thu, Sep 10, 2015 at 08:34:23AM -0700, Jesse Barnes wrote:
>> I used these additional fields to track down the issue I saw on HSW.
>
> We already have the tracepoints with the scanline information. Not sure
> what extra this would give.
Saves the
On 09/10/2015 09:11 AM, Ville Syrjälä wrote:
> On Thu, Sep 10, 2015 at 08:34:22AM -0700, Jesse Barnes wrote:
>> On HSW at least (still testing other platforms, but should be harmless
>> elsewhere), the DSL reg reads back as 0 when read around vblank start
>> time. This ends up confusing the atomic
On Thu, Sep 10, 2015 at 07:13:46PM +0300, Ville Syrjälä wrote:
> On Thu, Sep 10, 2015 at 06:07:34PM +0200, Daniel Vetter wrote:
> > On Thu, Sep 10, 2015 at 06:59:09PM +0300, ville.syrj...@linux.intel.com
> > wrote:
> > > From: Ville Syrjälä
> > >
> > > Add a .get_hw_state() method for planes, re
On Tue, Sep 08, 2015 at 12:52:48PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Comment disagrees with the code which has changed a lot since
> it was documented.
>
> Signed-off-by: Tvrtko Ursulin
Applied, with the commit citation added for the patch which made this
comment obsolete
On Thu, Sep 10, 2015 at 07:20:11PM +0300, Ville Syrjälä wrote:
> On Thu, Sep 10, 2015 at 07:13:46PM +0300, Ville Syrjälä wrote:
> > On Thu, Sep 10, 2015 at 06:07:34PM +0200, Daniel Vetter wrote:
> > > On Thu, Sep 10, 2015 at 06:59:09PM +0300, ville.syrj...@linux.intel.com
> > > wrote:
> > > > From
On Thu, Sep 10, 2015 at 09:17:23AM -0700, Jesse Barnes wrote:
> On 09/10/2015 09:11 AM, Ville Syrjälä wrote:
> > On Thu, Sep 10, 2015 at 08:34:22AM -0700, Jesse Barnes wrote:
> >> On HSW at least (still testing other platforms, but should be harmless
> >> elsewhere), the DSL reg reads back as 0 whe
On Thu, Sep 10, 2015 at 06:43:26PM +0300, Ville Syrjälä wrote:
> On Thu, Sep 10, 2015 at 04:07:58PM +0200, Maarten Lankhorst wrote:
> > This function was still using the legacy state, convert it to atomic.
> > While we're at it, fix the FIXME too and disable the primary plane.
> >
> > Signed-off-b
On Thu, Sep 10, 2015 at 06:31:02PM +0200, Daniel Vetter wrote:
> On Thu, Sep 10, 2015 at 06:43:26PM +0300, Ville Syrjälä wrote:
> > On Thu, Sep 10, 2015 at 04:07:58PM +0200, Maarten Lankhorst wrote:
> > > This function was still using the legacy state, convert it to atomic.
> > > While we're at it,
On Thu, Sep 10, 2015 at 06:30:20PM +0200, Daniel Vetter wrote:
> On Thu, Sep 10, 2015 at 07:20:11PM +0300, Ville Syrjälä wrote:
> > On Thu, Sep 10, 2015 at 07:13:46PM +0300, Ville Syrjälä wrote:
> > > On Thu, Sep 10, 2015 at 06:07:34PM +0200, Daniel Vetter wrote:
> > > > On Thu, Sep 10, 2015 at 06:
On 04/09/2015 12:59, Michel Thierry wrote:
Also check for correct revision id in each Gen9 platform (SKL until B0
and BXT until A0).
Cc: Nick Hoath
Signed-off-by: Michel Thierry
---
drivers/gpu/drm/i915/intel_lrc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/
On Fri, Sep 04, 2015 at 07:33:00PM -0700, Chandra Konduru wrote:
> This patch stages a scaler request when input format
> is NV12. The same scaler does both chroma-upsampling
> and resolution scaling as needed.
>
> v2:
> -Added helper function for need_scaling (Ville)
>
> v3:
> -Rebased to curren
On 04/09/2015 12:59, Michel Thierry wrote:
When WaEnableForceRestoreInCtxtDescForVCS is required, it is only
safe to send new contexts if the last reported event is "active to
idle". Otherwise the same context can fully preempt itself because
lite-restore is disabled.
Testcase: igt/gem_concurren
On Fri, Sep 04, 2015 at 07:33:03PM -0700, Chandra Konduru wrote:
> This patch adds NV12 to list of supported formats for
> primary plane.
>
> v2:
> -Rebased (me)
>
> Signed-off-by: Chandra Konduru
> Testcase: igt/kms_nv12
> ---
> drivers/gpu/drm/i915/intel_display.c | 22 -
On Fri, 2015-07-31 at 18:46 +0530, Goel, Akash wrote:
>
> On 7/22/2015 8:09 PM, Chris Wilson wrote:
> > On Wed, Jul 22, 2015 at 07:21:49PM +0530, ankitprasad.r.sha...@intel.com
> > wrote:
> >> static int
> >> i915_gem_shmem_pread(struct drm_device *dev,
> >> struct drm_i915_ge
On Wed, Sep 09, 2015 at 03:59:03PM -0700, Chandra Konduru wrote:
> This patch adds NV12 as supported format to
> intel_framebuffer_init and performs various checks.
>
> v2:
> -Fix an issue in checks added (me)
>
> v3:
> -cosmetic update, split checks into two (Ville)
>
> v4:
> -Add stride alignm
> > +static bool skl_need_scaling(int src_w, int src_h, int dst_w, int dst_h,
> > + unsigned int rotation, uint32_t pixel_format)
> > +{
> > + /* need a scaler when sizes doesn't match */
> > + if (src_w != dst_w || src_h != dst_h)
> > + return true;
> > +
> > + /* in case of 90/2
On 9/10/2015 8:15 PM, Daniel Vetter wrote:
On Thu, Sep 10, 2015 at 01:58:54AM +0530, Animesh Manna wrote:
On 9/2/2015 2:24 PM, Daniel Vetter wrote:
On Wed, Aug 26, 2015 at 07:40:54PM +0530, Animesh Manna wrote:
On 8/26/2015 6:40 PM, Daniel Vetter wrote:
On Wed, Aug 26, 2015 at 01:36:05AM +
On 9/10/2015 8:15 PM, Daniel Vetter wrote:
On Thu, Sep 10, 2015 at 01:58:54AM +0530, Animesh Manna wrote:
On 9/2/2015 2:24 PM, Daniel Vetter wrote:
On Wed, Aug 26, 2015 at 07:40:54PM +0530, Animesh Manna wrote:
On 8/26/2015 6:40 PM, Daniel Vetter wrote:
On Wed, Aug 26, 2015 at 01:36:05AM +
> > + if (obj->tiling_mode == I915_TILING_X &&
> > + !(mode_cmd->flags & DRM_MODE_FB_MODIFIERS)) {
>
> Your editor still seems to mess up the indentation in these cases. Can
> you try to fix that?
If condition isn't fitting in a single line, so continued in next line l
On 08/27/2015 06:44 AM, Maarten Lankhorst wrote:
> This might not have been set during boot, and when we preserve
> the initial mode this can result in a black screen.
>
> Cc: Daniel Stone
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/intel_display.c | 3 +++
> 1 file changed,
On 08/27/2015 06:44 AM, Maarten Lankhorst wrote:
> It should really use the atomic state.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/intel_fbdev.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_fbdev.c
> b/driver
On 08/27/2015 06:44 AM, Maarten Lankhorst wrote:
> The initial state is read out correctly and the state is atomic,
> so it's safe to preserve the fb without any hacks if it's suitable.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/intel_fbdev.c | 3 ---
> 1 file changed, 3 d
On 09/10/2015 12:25 PM, Jesse Barnes wrote:
> On 08/27/2015 06:44 AM, Maarten Lankhorst wrote:
>> This might not have been set during boot, and when we preserve
>> the initial mode this can result in a black screen.
>>
>> Cc: Daniel Stone
>> Signed-off-by: Maarten Lankhorst
>> ---
>> drivers/gpu
On 08/27/2015 06:44 AM, Maarten Lankhorst wrote:
> This is done as a separate commit, to make it easier to revert
> when things break.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 -
> drivers/gpu/drm/i915/i915_params.c | 5 -
> drivers/gpu/drm/i915
On 08/27/2015 06:44 AM, Maarten Lankhorst wrote:
> + /* on skylake this is done by detaching scalers */
> + if (INTEL_INFO(dev)->gen == 9) {
> + skl_detach_scalers(crtc);
> +
> + if (pipe_config->pch_pfit.enabled)
> + skylake_pfit_enable(crtc);
>
On Thu, Sep 10, 2015 at 07:14:58PM +, Konduru, Chandra wrote:
> > > + if (obj->tiling_mode == I915_TILING_X &&
> > > + !(mode_cmd->flags & DRM_MODE_FB_MODIFIERS)) {
> >
> > Your editor still seems to mess up the indentation in these cases. Can
> > you try to fix that?
>
On Thu, Sep 10, 2015 at 09:34:59PM +0300, Ville Syrjälä wrote:
> On Wed, Sep 09, 2015 at 03:59:03PM -0700, Chandra Konduru wrote:
> > This patch adds NV12 as supported format to
> > intel_framebuffer_init and performs various checks.
> >
> > v2:
> > -Fix an issue in checks added (me)
> >
> > v3:
On 09/10/2015 09:05 AM, Ville Syrjälä wrote:
> On Thu, Sep 10, 2015 at 08:34:23AM -0700, Jesse Barnes wrote:
>> I used these additional fields to track down the issue I saw on HSW.
>
> We already have the tracepoints with the scanline information. Not sure
> what extra this would give.
Also when
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