Hi Dave,
First pull request for 4.3! Random things all over, most of it more atomic
polish. Plus trying to reject more dri1 crap (the final bits afaik!), but
this time around with nouveau whitelisted to avoid breaking old userspace.
Aside: 4.2 vs 4.3 is a terrible conflict mess so I need you to r
On 7/13/2015 12:01 PM, Sivakumar Thulasimani wrote:
On 7/13/2015 9:47 AM, Sonika Jindal wrote:
As per bspec, on BXT A0/A1, sw needs to activate DDIA HPD logic
and interrupts to check the external panel connection.
And remove the redundant comment.
v2: Remove redundant IS_BROXTON check, Add
tree: git://anongit.freedesktop.org/drm-intel topic/drm-misc
head: 6198447760ed3c684fbcc93b5f91b4e84861e8f3
commit: fd6ab591ce1544e923c4ba0467dfb7869753830b [18/36] drm/cirrus: Use new
drm_fb_helper functions
config: x86_64-randconfig-i0-201528 (attached as .config)
reproduce:
git checkout f
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 6777
-Summary-
Platform Delta drm-intel-nightly Series Applied
ILK
tree: git://anongit.freedesktop.org/drm-intel topic/drm-misc
head: 6198447760ed3c684fbcc93b5f91b4e84861e8f3
commit: 6f4900cd28c95db2c6975274672a5f1d06ab9a67 [21/36] drm/ast: Use new
drm_fb_helper functions
config: x86_64-randconfig-i0-201528 (attached as .config)
reproduce:
git checkout 6f49
On 06/15/2015 08:53 AM, Daniel Vetter wrote:
> On Tue, Jun 09, 2015 at 01:50:48PM +0100, Damien Lespiau wrote:
>> On Thu, Jun 04, 2015 at 07:12:31PM +0530, Kausal Malladi wrote:
>>> From: Kausal Malladi
>>>
>>> This patch set adds color manager implementation in drm/i915 layer.
>>> Color Manager i
On Mon, Jun 29, 2015 at 02:50:22PM +0530, akash.g...@intel.com wrote:
> From: Akash Goel
>
> Updated the i915_ring_freq_table debugfs function to support the read
> of ring frequency table, through Punit interface, for SKL also.
>
> Issue: VIZ-5144
> Signed-off-by: Akash Goel
> Reviewed-by: Rod
tree: git://anongit.freedesktop.org/drm-intel topic/drm-misc
head: 6198447760ed3c684fbcc93b5f91b4e84861e8f3
commit: 3b9a13e85365c441dc7335d81afc0a3a344766e6 [26/36] drm/gma500: Use new
drm_fb_helper functions
config: x86_64-randconfig-i0-201528 (attached as .config)
reproduce:
git checkout 3
On Fri, Jul 10, 2015 at 05:37:07PM +0530, Sivakumar Thulasimani wrote:
>
>
> On 7/1/2015 6:12 PM, Daniel Vetter wrote:
> >On Tue, Jun 30, 2015 at 02:50:33PM +0300, Ville Syrjälä wrote:
> >>On Tue, Jun 30, 2015 at 12:13:37PM +0200, Daniel Vetter wrote:
> >>>On Mon, Jun 29, 2015 at 08:08:27PM +0300
As per bspec, on BXT A0/A1, sw needs to activate DDIA HPD logic
and interrupts to check the external panel connection.
And remove the redundant comment.
v2: Remove redundant IS_BROXTON check, Add comment about port C not
connected, and rephrase the commit message to include only what we
are doing
tree: git://anongit.freedesktop.org/drm-intel topic/drm-misc
head: 6198447760ed3c684fbcc93b5f91b4e84861e8f3
commit: 53ebb642ccba1212b7b97a5dccb358eb791b85f6 [27/36] drm/mgag200: Use new
drm_fb_helper functions
config: x86_64-randconfig-i0-201528 (attached as .config)
reproduce:
git checkout
Op 08-07-15 om 22:12 schreef Daniel Vetter:
> On Wed, Jul 08, 2015 at 08:25:07PM +0200, Maarten Lankhorst wrote:
>> Op 08-07-15 om 19:52 schreef Daniel Vetter:
>>> On Wed, Jul 08, 2015 at 06:35:47PM +0200, Maarten Lankhorst wrote:
Op 08-07-15 om 10:55 schreef Daniel Vetter:
> On Wed, Jul 0
On Fri, Jul 10, 2015 at 02:27:48PM +0100, Damien Lespiau wrote:
> On Fri, Jul 10, 2015 at 04:21:27PM +0300, Ville Syrjälä wrote:
> > On Fri, Jul 10, 2015 at 02:18:57PM +0100, Damien Lespiau wrote:
> > > On Fri, Jul 10, 2015 at 04:09:42PM +0300, Imre Deak wrote:
> > > > On ma, 2015-07-06 at 14:44 +0
Op 12-07-15 om 21:56 schreef Hans de Bruin:
> Daniel,
>
> commit dec4f799d0a4c9edae20512fa60b0a36f3299ca2 causes my laptop to hang or
> reboot at the moment the kernel swiches the vido mode at boot time. I also
> noticed a warning while compiling:
>
> CC drivers/gpu/drm/i915/i915_gem_gtt.o
>
On Fri, Jul 10, 2015 at 04:09:42PM +0300, Imre Deak wrote:
> On ma, 2015-07-06 at 14:44 +0300, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > Since
> > commit e62925567c7926e78bc8ca976cde5c28ea265a49
> > Author: Vandana Kannan
> > Date: Wed Jul 1 17:02:57 2015 +0530
>
Op 10-07-15 om 13:22 schreef Damien Lespiau:
> Hi Patrik,
>
> Please do Cc the patch author and reviewer when finding a regression,
> they are superb candidates for the review, especially when they are busy
> rewriting the display code.
>
> On Wed, Jul 08, 2015 at 03:31:52PM +0200, Patrik Jakobsson
On Mon, Jul 13, 2015 at 10:59:32AM +0200, Maarten Lankhorst wrote:
> Op 08-07-15 om 22:12 schreef Daniel Vetter:
> > On Wed, Jul 08, 2015 at 08:25:07PM +0200, Maarten Lankhorst wrote:
> >> Op 08-07-15 om 19:52 schreef Daniel Vetter:
> >>> On Wed, Jul 08, 2015 at 06:35:47PM +0200, Maarten Lankhorst
tree: git://anongit.freedesktop.org/drm-intel topic/drm-misc
head: 6198447760ed3c684fbcc93b5f91b4e84861e8f3
commit: 237fc6452ca562188349a9abe0f9e579fd260276 [31/36] drm/nouveau: Use new
drm_fb_helper functions
config: x86_64-randconfig-i0-201528 (attached as .config)
reproduce:
git checkout
On Mon, Jul 13, 2015 at 10:29:32AM +0200, Hans Verkuil wrote:
> On 06/15/2015 08:53 AM, Daniel Vetter wrote:
> > On Tue, Jun 09, 2015 at 01:50:48PM +0100, Damien Lespiau wrote:
> >> On Thu, Jun 04, 2015 at 07:12:31PM +0530, Kausal Malladi wrote:
> >>> From: Kausal Malladi
> >>>
> >>> This patch se
tree: git://anongit.freedesktop.org/drm-intel topic/drm-misc
head: 6198447760ed3c684fbcc93b5f91b4e84861e8f3
commit: 394111a2b303c49b3a6c123320d08173588a1b37 [33/36] drm/boschs: Use new
drm_fb_helper functions
config: x86_64-randconfig-i0-201528 (attached as .config)
reproduce:
git checkout 3
On Fri, Jul 10, 2015 at 12:30:43PM +0530, Sivakumar Thulasimani wrote:
> From: "Thulasimani,Sivakumar"
>
> Update the hotplug documentation to explain that hotplug storm
> is not expected for Display port panels and hence is not handled
> in current code.
>
> v2: update the statements as recomme
On Fri, Jul 10, 2015 at 02:10:54PM +0300, Antti Koskipaa wrote:
> VBT version 196 increased the size of common_child_dev_config. The parser
> code assumed that the size of this structure would not change.
>
> So now, instead of checking for smaller size, check that the VBT entry is
> not too large
On Fri, Jul 10, 2015 at 04:45:12PM +0530, Vandana Kannan wrote:
> From gen7, the platform can support fb of size < 3x3.
> Adding this check for gen along with fb width & height.
> Note: IVB is gen7 but its not clear if it can support width < 3 and
> height < 3.
>
> This patch has been tested in An
Op 13-07-15 om 11:13 schreef Daniel Vetter:
> On Mon, Jul 13, 2015 at 10:59:32AM +0200, Maarten Lankhorst wrote:
>> Op 08-07-15 om 22:12 schreef Daniel Vetter:
>>> On Wed, Jul 08, 2015 at 08:25:07PM +0200, Maarten Lankhorst wrote:
Op 08-07-15 om 19:52 schreef Daniel Vetter:
> On Wed, Jul 0
drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c:205:5-11: inconsistent IS_ERR and
PTR_ERR, PTR_ERR on line 206
PTR_ERR should access the value just tested by IS_ERR
Semantic patch information:
There can be false positives in the patch case, where it is the call
IS_ERR that is wrong.
Generated by: scr
tree: git://anongit.freedesktop.org/drm-intel topic/drm-misc
head: 6198447760ed3c684fbcc93b5f91b4e84861e8f3
commit: 9d70561ba3b129ae7bc052a9f73812bc3b7ad91a [34/36] drm/amdgpu: Use new
drm_fb_helper functions
coccinelle warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/amd/amdgpu/amdgp
On Sat, Jul 11, 2015 at 05:46:37PM +0100, Chris Wilson wrote:
> On Fri, Jul 10, 2015 at 06:31:40PM +0530, Praveen Paneri wrote:
> > From: Deepak S
> >
> > Currently we update the freq before masking the interrupts, which can
> > allow new interrupts to occur before the frequency has changed. Thes
On Fri, Jul 10, 2015 at 02:06:06PM +0100, tim.g...@intel.com wrote:
> From: Tim Gore
>
> In function igt_set_stop_rings, the test
> igt_assert_f(flags == 0 || current == 0, ..
>
> will fail if we are trying to force a hang but the
> STOP_RINGS_ALLOW_BAN or STOP_RINGS_ALLOW_ERROR bit is set.
>
Op 07-07-15 om 12:28 schreef Daniel Vetter:
> On Tue, Jul 07, 2015 at 09:08:20AM +0200, Maarten Lankhorst wrote:
>> Perform a full readout of the state by making sure the mode is set
>> up correctly atomically.
>>
>> Also there was a small memory leak by doing the memset, fix this
>> by calling __d
On Fri, Jul 10, 2015 at 02:26:59PM +0100, tim.g...@intel.com wrote:
> From: Tim Gore
>
> The tests for context banning fail when the gpu scheduler
> is enabled. The test causes a hang (using an infinite loop
> batch) and then queues up some work behind it on both the
> hanging context and also on
On Mon, Jul 13, 2015 at 02:10:09PM +0530, Sonika Jindal wrote:
> As per bspec, on BXT A0/A1, sw needs to activate DDIA HPD logic
> and interrupts to check the external panel connection.
> And remove the redundant comment.
>
> v2: Remove redundant IS_BROXTON check, Add comment about port C not
> co
On Mon, Jul 13, 2015 at 11:23:45AM +0200, Maarten Lankhorst wrote:
> Op 13-07-15 om 11:13 schreef Daniel Vetter:
> > On Mon, Jul 13, 2015 at 10:59:32AM +0200, Maarten Lankhorst wrote:
> >> Op 08-07-15 om 22:12 schreef Daniel Vetter:
> >>> On Wed, Jul 08, 2015 at 08:25:07PM +0200, Maarten Lankhorst
On 07/13/2015 11:18 AM, Daniel Vetter wrote:
> On Mon, Jul 13, 2015 at 10:29:32AM +0200, Hans Verkuil wrote:
>> On 06/15/2015 08:53 AM, Daniel Vetter wrote:
>>> On Tue, Jun 09, 2015 at 01:50:48PM +0100, Damien Lespiau wrote:
On Thu, Jun 04, 2015 at 07:12:31PM +0530, Kausal Malladi wrote:
>
On Mon, Jul 13, 2015 at 11:32:09AM +0200, Maarten Lankhorst wrote:
> Op 07-07-15 om 12:28 schreef Daniel Vetter:
> > On Tue, Jul 07, 2015 at 09:08:20AM +0200, Maarten Lankhorst wrote:
> >> Perform a full readout of the state by making sure the mode is set
> >> up correctly atomically.
> >>
> >> Als
On Mon, Jul 13, 2015 at 11:10:51AM +0200, Maarten Lankhorst wrote:
> Op 10-07-15 om 13:22 schreef Damien Lespiau:
> > Hi Patrik,
> >
> > Please do Cc the patch author and reviewer when finding a regression,
> > they are superb candidates for the review, especially when they are busy
> > rewriting t
Op 13-07-15 om 11:45 schreef Daniel Vetter:
> On Mon, Jul 13, 2015 at 11:23:45AM +0200, Maarten Lankhorst wrote:
>> Op 13-07-15 om 11:13 schreef Daniel Vetter:
>>> On Mon, Jul 13, 2015 at 10:59:32AM +0200, Maarten Lankhorst wrote:
Op 08-07-15 om 22:12 schreef Daniel Vetter:
> On Wed, Jul 0
Tim Gore
Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Monday, July 13, 2015 10:30 AM
> To: Gore, Tim
> Cc: intel-gfx@lists.freedesktop.org; Wo
On Mon, Jul 13, 2015 at 11:43:31AM +0200, Hans Verkuil wrote:
> On 07/13/2015 11:18 AM, Daniel Vetter wrote:
> > On Mon, Jul 13, 2015 at 10:29:32AM +0200, Hans Verkuil wrote:
> >> On 06/15/2015 08:53 AM, Daniel Vetter wrote:
> >>> On Tue, Jun 09, 2015 at 01:50:48PM +0100, Damien Lespiau wrote:
> >>
This fixes the breakage caused by
commit eddfcbcdc27fbecb33bff098967bbdd7ca75bfa6
Author: Maarten Lankhorst
Date: Mon Jun 15 12:33:53 2015 +0200
drm/i915: Update less state during modeset.
No need to repeatedly call update_watermarks, or update_fbc.
Down to a single call to update
On Mon, Jul 13, 2015 at 11:49:01AM +0200, Maarten Lankhorst wrote:
> Op 13-07-15 om 11:45 schreef Daniel Vetter:
> > On Mon, Jul 13, 2015 at 11:23:45AM +0200, Maarten Lankhorst wrote:
> >> Op 13-07-15 om 11:13 schreef Daniel Vetter:
> >>> On Mon, Jul 13, 2015 at 10:59:32AM +0200, Maarten Lankhorst
Tim Gore
Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Monday, July 13, 2015 10:35 AM
> To: Gore, Tim
> Cc: intel-gfx@lists.freedesktop.org; W
On 07/13/2015 11:54 AM, Daniel Vetter wrote:
> On Mon, Jul 13, 2015 at 11:43:31AM +0200, Hans Verkuil wrote:
>> On 07/13/2015 11:18 AM, Daniel Vetter wrote:
>>> On Mon, Jul 13, 2015 at 10:29:32AM +0200, Hans Verkuil wrote:
On 06/15/2015 08:53 AM, Daniel Vetter wrote:
> On Tue, Jun 09, 2015
Arun Siluvery writes:
> These patches enabled Pooled EU support for BXT, they are implemented
> by Armin Reese. I am sending these patches in its current form for comments.
>
> These patches modify Golden batch to have a set of modification values
> where we can change the commands based on Gen.
On 7/13/2015 2:21 PM, Daniel Vetter wrote:
On Fri, Jul 10, 2015 at 05:37:07PM +0530, Sivakumar Thulasimani wrote:
On 7/1/2015 6:12 PM, Daniel Vetter wrote:
On Tue, Jun 30, 2015 at 02:50:33PM +0300, Ville Syrjälä wrote:
On Tue, Jun 30, 2015 at 12:13:37PM +0200, Daniel Vetter wrote:
On Mon,
On 7/8/2015 6:03 PM, Chris Wilson wrote:
On Wed, Jul 08, 2015 at 05:42:17PM +0100, Michel Thierry wrote:
WARN_ON(vma->node.size != obj->base.size) ? Feel free to get the casting
right - I suck at implicit C integer conversion rules ...
-Daniel
Thanks, if there's no objections, I'll change it t
In Indirect context w/a batch buffer,
+WaFlushCoherentL3CacheLinesAtContextSwitch:bdw
v2: address static checker warning where unsigned value was checked for
less than zero which is never true.
Reported-by: Dan Carpenter
Cc: Imre Deak
Signed-off-by: Arun Siluvery
---
drivers/gpu/drm/i915/inte
On Mon, Jul 13, 2015 at 11:49:49AM +0200, Daniel Vetter wrote:
> On Mon, Jul 13, 2015 at 11:10:51AM +0200, Maarten Lankhorst wrote:
> > Op 10-07-15 om 13:22 schreef Damien Lespiau:
> > > Hi Patrik,
> > >
> > > Please do Cc the patch author and reviewer when finding a regression,
> > > they are supe
On 7/13/2015 3:10 PM, Daniel Vetter wrote:
On Mon, Jul 13, 2015 at 02:10:09PM +0530, Sonika Jindal wrote:
As per bspec, on BXT A0/A1, sw needs to activate DDIA HPD logic
and interrupts to check the external panel connection.
And remove the redundant comment.
v2: Remove redundant IS_BROXTON ch
During init_connector set the edid, then edid will be set/unset only during
hotplug. For the sake of older platforms where HPD is not stable, let edid
read happen from detect as well only if it is forced to do so.
v2: Removing the 'force' check, instead let detect call read the edid for
platforms
Adding this for SKL onwards.
v2: Adding checks for VLV/CHV as well. Reusing old ibx and g4x functions
to check digital port status. Adding a separate function to get bxt live
status (Daniel)
Signed-off-by: Sonika Jindal
---
drivers/gpu/drm/i915/intel_dp.c |4 ++--
drivers/gpu/drm/i915/int
On Mon, Jul 13, 2015 at 04:19:15PM +0530, Sonika Jindal wrote:
> During init_connector set the edid, then edid will be set/unset only during
> hotplug. For the sake of older platforms where HPD is not stable, let edid
> read happen from detect as well only if it is forced to do so.
>
> v2: Removin
tree: git://anongit.freedesktop.org/drm-intel topic/drm-misc
head: 6198447760ed3c684fbcc93b5f91b4e84861e8f3
commit: 7bd870e7b1c8b4ff0b1624778d9ab17bfe6b903d [35/36] drm/virtio: Use new
drm_fb_helper functions
config: x86_64-randconfig-i0-201528 (attached as .config)
reproduce:
git checkout 7
On 7/13/2015 5:10 PM, Chris Wilson wrote:
On Mon, Jul 13, 2015 at 04:19:15PM +0530, Sonika Jindal wrote:
During init_connector set the edid, then edid will be set/unset only during
hotplug. For the sake of older platforms where HPD is not stable, let edid
read happen from detect as well only i
On la, 2015-07-11 at 21:54 +0100, Chris Wilson wrote:
> On Thu, Jul 09, 2015 at 12:59:05PM +0300, Imre Deak wrote:
> > +static int
> > +__i915_gem_userptr_set_pages(struct drm_i915_gem_object *obj,
> > +struct page **pvec, int num_pages)
> > +{
> > + int ret;
> > +
> > +
Arun Siluvery writes:
> In Indirect and Per context w/a batch buffer,
> +WaDisableCtxRestoreArbitration
>
> v2: SKL revision id was used for BXT, copy paste error found during
> internal review (Bob Beckett).
>
> Cc: Robert Beckett
> Cc: Imre Deak
> Signed-off-by: Arun Siluvery
Reviewed-by: M
4.2.0-rc2-next-20150713
[ 1239.783862] [ cut here ]
[ 1239.783892] WARNING: CPU: 0 PID: 364 at drivers/gpu/drm/i915/i915_gem.c:5368
i915_gem_track_fb+0xdc/0x106 [i915]()
[ 1239.783894] WARN_ON(new->frontbuffer_bits & frontbuffer_bits)
[ 1239.783895] Modules li
Arun Siluvery writes:
> In Indirect context w/a batch buffer,
> +WaFlushCoherentL3CacheLinesAtContextSwitch:bdw
s/bdw/skl ?
>
> v2: address static checker warning where unsigned value was checked for
> less than zero which is never true.
>
Add ^^ (Dan Carpenter
Arun Siluvery writes:
> In Indirect context w/a batch buffer,
> +WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken
>
> v2: SKL revision id was used for BXT, copy paste error found during
> internal review (Bob Beckett).
>
> Cc: Robert Beckett
> Cc: Imre Deak
> Signed-off-by: Arun Siluvery
On Mon, Jul 13, 2015 at 12:11:08PM +0200, Hans Verkuil wrote:
> On 07/13/2015 11:54 AM, Daniel Vetter wrote:
> > On Mon, Jul 13, 2015 at 11:43:31AM +0200, Hans Verkuil wrote:
> >> On 07/13/2015 11:18 AM, Daniel Vetter wrote:
> >>> On Mon, Jul 13, 2015 at 10:29:32AM +0200, Hans Verkuil wrote:
>
This is probably hard to hit right now because in most cases all
atomic locks are taken, but after conversion to atomic this will make
it more likely to corrupt the crtc->config pointer, resulting in hard
to find bugs.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 3
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 118187dc76be..d37f6a93b094 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/
There's not much point for calculating the changes for the old
state. Instead just disable all scalers when disabling. It's
probably good enough to just disable the crtc_scaler, but just in
case there's a bug disable all scalers.
This means intel_atomic_setup_scalers is only called in the crtc
che
Atomic requires a mode blob when crtc_state->enable is true.
With a few tweaks the mode we read out from hardware could be used
as the real mode without a modeset, but this requires too much
testing, so force a modeset the first time the mode blob's updated.
This preserves the old behavior, becau
Instead of doing ad-hoc checks we already have a way of checking
if the state is compatible or not. Use this to force a modeset.
Only during modesets, or with PIPE_CONFIG_QUIRK_INHERITED_MODE
we should check if a full modeset is really needed.
Fastboot will allow the adjust parameter to ignore so
Nothing depends on this outside initial hw readout, so keep this
struct on the stack instead.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 25 +++--
drivers/gpu/drm/i915/intel_drv.h | 1 -
2 files changed, 15 insertions(+), 11 deletions(-)
This allows us to get rid of the set_init_power in
modeset_update_crtc_domains. The state should be sanitized enough
after setup_hw_state to not need the init power.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 76
1 file change
Atomic suspend/resume, full hardware readout and atomic ioctl support.
Changes from the previous version:
- The fastboot changes from the previous patch have been removed,
fastboot will have to be a separate patch because of the testing it needs.
- I've cleaned up the changes to planes and split
This might not have been set during boot, and when we preserve
the initial mode this can result in a black screen.
Cc: Daniel Stone
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display
The previous commit converted hw readout to atomic, all the new_*
members were used for restoring the old state, but with the
conversion of suspend to atomic there's no use left for them.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 80 -
This can only fail because of a bug in the code.
Suggested-by: Daniel Vetter
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 15 +--
drivers/gpu/drm/i915/intel_drv.h | 2 +-
drivers/gpu/drm/i915/intel_sprite.c | 17 +++--
3 files changed
The src and crtc rectangles were never set, resulting in the primary
plane being made invisible on first atomic update.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i91
And get rid of things that are no longer true. This function is only
used for forcing a modeset when encoder properties are changed.
Because this is not yet done atomically, assume a full modeset is
needed and reset the crtc.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_displ
We needed this originally for updating pagetables in plane commit
functions. But that's extracted into prepare/cleanup now. The other
issue was running updates when the pipe was off. That's also now
fixed.
Suggested-by: Daniel Vetter
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/int
Instead of all the ad-hoc updating, duplicate the old state first
before reading out the hw state, then restore it.
intel_display_resume is a new function that duplicates the sw state,
then reads out the hw state, and commits the old state.
intel_display_setup_hw_state now only reads out the atom
There is a small memory leak in intel_modeset_readout_hw_state,
plug it.
intel_sanitize_crtc should set a null mode when disabling the crtc,
this updates crtc_state->enable too.
intel_sanitize_crtc also needs to update the vblank timestamps before
enabling vblank to make it work right.
Changes s
Now that there's only a single path for all atomic updates we can call
intel_(pre/post)_plane_update from intel_atomic_commit directly. This
makes the intention more clear.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 14 --
1 file changed, 8 insertions
Calculate all state using a normal transition, but afterwards fudge
crtc->state->active back to its old value. This should still allow
state restore in setup_hw_state to work properly.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 52
Use the atomic state instead, this allows removing plane_config
from the crtc after the full hw readout is completed.
The size can be found in the fb, no need for the plane_config.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_fbdev.c | 14 ++
1 file changed, 6 ins
All non-primary planes get disabled during hw readout,
this reduces complexity and means not having to do some plane
visibility checks during the first commit.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_atomic.c | 7 ---
drivers/gpu/drm/i915/intel_display.c | 86 --
On Mon, Jul 13, 2015 at 09:51:39PM +0900, Sergey Senozhatsky wrote:
> 4.2.0-rc2-next-20150713
Is this also an issue in the 4.2-rc series or only in -next?
-Daniel
>
> [ 1239.783862] [ cut here ]
> [ 1239.783892] WARNING: CPU: 0 PID: 364 at
> drive
Huzzah! \o/
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 1 -
drivers/gpu/drm/i915/i915_params.c | 5 -
drivers/gpu/drm/i915/intel_atomic.c | 123 ---
drivers/gpu/drm/i915/intel_display.c | 279 +
On Mon, Jul 13, 2015 at 03:49:44PM +0530, Sivakumar Thulasimani wrote:
>
>
> On 7/13/2015 2:21 PM, Daniel Vetter wrote:
> >On Fri, Jul 10, 2015 at 05:37:07PM +0530, Sivakumar Thulasimani wrote:
> >>
> >>On 7/1/2015 6:12 PM, Daniel Vetter wrote:
> >>>On Tue, Jun 30, 2015 at 02:50:33PM +0300, Ville
On 7/11/2015 9:02 PM, Chris Wilson wrote:
On Tue, Jul 07, 2015 at 04:14:48PM +0100, Michel Thierry wrote:
Introduces the Page Map Level 4 (PML4), ie. the new top level structure
of the page tables.
To facilitate testing, 48b mode will be available on Broadwell and
GEN9+, when i915.enable_ppgtt
On Wed, Jul 08, 2015 at 06:43:23PM +0100, Chris Wilson wrote:
> On Wed, Jul 08, 2015 at 07:18:59PM +0300, Imre Deak wrote:
> > After the previous patch this flag will check always clear, as it's
> > never set for shmem backed and userptr objects, so we can remove it.
> >
> > Signed-off-by: Imre De
On (07/13/15 16:35), Daniel Vetter wrote:
> On Mon, Jul 13, 2015 at 09:51:39PM +0900, Sergey Senozhatsky wrote:
> > 4.2.0-rc2-next-20150713
>
> Is this also an issue in the 4.2-rc series or only in -next?
don't know how to reproduce this, but I'll check.
-s
Op 13-07-15 om 14:51 schreef Sergey Senozhatsky:
> 4.2.0-rc2-next-20150713
>
> [ 1239.783862] [ cut here ]
> [ 1239.783892] WARNING: CPU: 0 PID: 364 at
> drivers/gpu/drm/i915/i915_gem.c:5368 i915_gem_track_fb+0xdc/0x106 [i915]()
> [ 1239.7
On Mon, Jul 13, 2015 at 03:31:45PM +0300, Mika Kuoppala wrote:
> Arun Siluvery writes:
>
> > In Indirect and Per context w/a batch buffer,
> > +WaDisableCtxRestoreArbitration
> >
> > v2: SKL revision id was used for BXT, copy paste error found during
> > internal review (Bob Beckett).
> >
> > Cc:
On Mon, Jul 13, 2015 at 04:49:37PM +0200, Daniel Vetter wrote:
> On Mon, Jul 13, 2015 at 03:31:45PM +0300, Mika Kuoppala wrote:
> > Arun Siluvery writes:
> >
> > > In Indirect and Per context w/a batch buffer,
> > > +WaDisableCtxRestoreArbitration
> > >
> > > v2: SKL revision id was used for BXT,
On Mon, Jul 13, 2015 at 11:42:34AM +0100, Damien Lespiau wrote:
> On Mon, Jul 13, 2015 at 11:49:49AM +0200, Daniel Vetter wrote:
> > On Mon, Jul 13, 2015 at 11:10:51AM +0200, Maarten Lankhorst wrote:
> > > Op 10-07-15 om 13:22 schreef Damien Lespiau:
> > > > Hi Patrik,
> > > >
> > > > Please do Cc
On Mon, Jul 13, 2015 at 04:35:00PM +0530, Sonika Jindal wrote:
> Adding this for SKL onwards.
>
> v2: Adding checks for VLV/CHV as well. Reusing old ibx and g4x functions
> to check digital port status. Adding a separate function to get bxt live
> status (Daniel)
>
> Signed-off-by: Sonika Jindal
On Mon, Jul 13, 2015 at 05:29:12PM +0530, Jindal, Sonika wrote:
>
>
> On 7/13/2015 5:10 PM, Chris Wilson wrote:
> >On Mon, Jul 13, 2015 at 04:19:15PM +0530, Sonika Jindal wrote:
> >>During init_connector set the edid, then edid will be set/unset only during
> >>hotplug. For the sake of older plat
On Mon, Jul 13, 2015 at 09:43:11AM +, Gore, Tim wrote:
>
>
> Tim Gore
> Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ
>
> > -Original Message-
> > From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> > Vetter
> > Sent: Monday, Jul
On Mon, Jul 13, 2015 at 10:09:59AM +, Gore, Tim wrote:
>
>
> Tim Gore
> Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ
>
>
> > -Original Message-
> > From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> > Vetter
> > Sent: Monday,
On (07/13/15 16:46), Maarten Lankhorst wrote:
> > [ 1239.783961] [] dump_stack+0x4c/0x65
> > [ 1239.783965] [] ? up+0x39/0x3e
> > [ 1239.783968] [] warn_slowpath_common+0x9b/0xb5
> > [ 1239.783986] [] ? i915_gem_track_fb+0xdc/0x106 [i915]
> > [ 1239.783987] [] warn_slowpath_fmt+0x46/0x48
> > [
On 11/07/2015 20:09, Chris Wilson wrote:
On Sat, Jul 11, 2015 at 08:05:05PM +0100, Chris Wilson wrote:
On Fri, Jul 10, 2015 at 06:35:18PM +0100, Arun Siluvery wrote:
These patches enabled Pooled EU support for BXT, they are implemented
by Armin Reese. I am sending these patches in its current f
On Mon, Jul 13, 2015 at 11:44:15PM +0900, Sergey Senozhatsky wrote:
> On (07/13/15 16:35), Daniel Vetter wrote:
> > On Mon, Jul 13, 2015 at 09:51:39PM +0900, Sergey Senozhatsky wrote:
> > > 4.2.0-rc2-next-20150713
> >
> > Is this also an issue in the 4.2-rc serie
On Thu, Jul 09, 2015 at 07:29:05PM +0100, Dave Gordon wrote:
> From: Alex Dai
>
> This fetches the required firmware image from the filesystem,
> then loads it into the GuC's memory via a dedicated DMA engine.
>
> This patch is derived from GuC loading work originally done by
> Vinit Azad and Be
From: Tvrtko Ursulin
Previously only core DRM ioctls under the DRM_COMMAND_BASE were being
forwarded, but the drm.h header suggests (and reality confirms) ones
after (and including) DRM_COMMAND_END should be forwarded as well.
Signed-off-by: Tvrtko Ursulin
Cc: Daniel Vetter
---
drivers/gpu/dr
From: Tvrtko Ursulin
Frame buffer modifiers extensions provided in;
commit e3eb3250d84ef97b766312345774367b6a310db8
Author: Rob Clark
Date: Thu Feb 5 14:41:52 2015 +
drm: add support for tiled/compressed/etc modifier in addfb2
Missed the structure packing/alignment problem w
Tim Gore
Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Monday, July 13, 2015 3:59 PM
> To: Gore, Tim
> Cc: Daniel Vetter; intel-gfx@lists.free
1 - 100 of 120 matches
Mail list logo
