On Fri, Feb 13, 2015 at 10:34:51AM +, Chris Wilson wrote:
> On Fri, Feb 13, 2015 at 10:55:46AM +0100, Daniel Vetter wrote:
> > On Thu, Feb 12, 2015 at 09:03:06PM +, Chris Wilson wrote:
> > > On Thu, Feb 12, 2015 at 08:05:02PM +, rafael.barba...@intel.com wrote:
> > > > From: Rafael Barb
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Monday, February 23, 2015 4:50 PM
> To: Daniel Vetter
> Cc: Barbalho, Rafael; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [RFC 2/2] drm/i915: Clean-up PPGTT on context
> destruction
>
> On
On Mon, Feb 23, 2015 at 05:41:51PM +0100, Daniel Vetter wrote:
> On Fri, Feb 13, 2015 at 10:34:51AM +, Chris Wilson wrote:
> > On Fri, Feb 13, 2015 at 10:55:46AM +0100, Daniel Vetter wrote:
> > > Well except that our unbind code is too dense to do that correctly for
> > > shared buffers, so we
On Mon, Feb 23, 2015 at 05:05:16PM +0100, Daniel Vetter wrote:
> On Wed, Jan 07, 2015 at 09:40:50PM +, Chris Wilson wrote:
> > On Wed, Jan 07, 2015 at 02:38:46PM +0100, Daniel Vetter wrote:
> > > It is platform/output depenedent when exactly the pipe will start
> > > running. Sometimes we just
Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 5810
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV -3 281/281
On Mon, Feb 23, 2015 at 4:05 AM, Ramalingam C wrote:
> From: Vandana Kannan
>
> Adding a debugfs entry to determine if DRRS is supported or not
>
> V2: [By Ram]: Following details about the active crtc will be filled
> in seq-file of the debugfs
> 1. Encoder output type
>
Reviewed-by: Rodrigo Vivi
On Mon, Feb 23, 2015 at 4:08 AM, Ramalingam C wrote:
> When Downclock mode is not found, the same info is added to the
> corresponding debug log.
>
> Signed-off-by: Ramalingam C
> ---
> drivers/gpu/drm/i915/intel_dp.c |2 +-
> 1 file changed, 1 insertion(+), 1 del
On 11/24/2014 06:13 AM, Chris Wilson wrote:
> On Mon, Nov 24, 2014 at 03:10:05PM +0100, Daniel Vetter wrote:
>> On Mon, Nov 24, 2014 at 10:35:29AM +, Chris Wilson wrote:
>>> Pinning is a useful tool and it would also be useful to have again on
>>> gen6+.
>>
>> I think softpin or similar is doab
On Mon, Feb 16, 2015 at 09:44:42AM +0200, Jani Nikula wrote:
> On Fri, 13 Feb 2015, Paulo Zanoni wrote:
> > From: Paulo Zanoni
> >
> > With the current code we just reallocate the compressed FB at every
> > FBC update: we have X in one frame, then in the other frame we need X
> > again, but we ch
On Sat, Feb 14, 2015 at 06:30:29PM +, Damien Lespiau wrote:
> When one EU is disabled in a particular subslice, we can tune how the
> work is spread between subslices to improve EU utilization.
>
> v2: - Use a bitfield to record which subslice(s) has(have) 7 EUs. That
> will also make th
On Mon, Feb 16, 2015 at 06:25:11PM +, Damien Lespiau wrote:
> Gen9 bit to control whether the 3DSTATE_CONSTANT_* address should be an
> offset against the Dynamic State Base Address Vs an absolute address has
> moved to a different register.
>
> As no-one complained yet and I don't see any use
On Wed, Feb 18, 2015 at 06:19:08PM +, Damien Lespiau wrote:
> On Wed, Feb 18, 2015 at 03:16:06PM +, Nick Hoath wrote:
> > Signed-off-by: Nick Hoath
>
> That looks relly drastic and without explanations nor W/A
> documentation that looks wrong.
>
> Couldn't it be the virtual addresses
On Mon, Feb 23, 2015 at 01:29:57PM -0800, Jesse Barnes wrote:
> On 11/24/2014 06:13 AM, Chris Wilson wrote:
> > On Mon, Nov 24, 2014 at 03:10:05PM +0100, Daniel Vetter wrote:
> >> On Mon, Nov 24, 2014 at 10:35:29AM +, Chris Wilson wrote:
> >>> Pinning is a useful tool and it would also be usefu
On Mon, Feb 23, 2015 at 09:20:31PM +, Chris Wilson wrote:
> On Mon, Feb 23, 2015 at 11:12:39PM +0300, Andrey Skvortsov wrote:
> > Hi,
> >
> > This warning is moved from linux-next to v4.0-rc1 now. After system boot is
> > just a black screen.
> > I ssh'ed into the machine and saved the log.
On Mon, Feb 23, 2015 at 04:52:46PM +, Barbalho, Rafael wrote:
>
>
> > -Original Message-
> > From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> > Sent: Monday, February 23, 2015 4:50 PM
> > To: Daniel Vetter
> > Cc: Barbalho, Rafael; intel-gfx@lists.freedesktop.org
> > Subject: Re
Aside: reply-all seems to not work (or maybe you have reply-to-list as
default), dri-devel was lost. Readded.
On Fri, Feb 20, 2015 at 10:00:48AM -0700, Todd Previte wrote:
>
> On 2/20/2015 1:25 AM, Jani Nikula wrote:
> >On Thu, 19 Feb 2015, Todd Previte wrote:
> >>Just some formatting issues tha
On Thu, Feb 19, 2015 at 04:38:43PM -0800, Marc Herbert wrote:
> Required to run on any recent, freon-based and X11-free ChromeOS release.
>
> Signed-off-by: Marc Herbert
> ---
> lib/igt_kms.c | 20 +---
> 1 file changed, 17 insertions(+), 3 deletions(-)
>
> diff --git a/lib/igt_
On Mon, Feb 23, 2015 at 04:31:49PM +0200, Imre Deak wrote:
> Atm, it's possible that the interrupt handler is called when the device
> is in D3 or some other low-power state. It can be due to another device
> that is still in D0 state and shares the interrupt line with i915, or on
> some platforms
On Fri, Feb 20, 2015 at 04:11:33PM -0800, Chandra Konduru wrote:
> @@ -11660,6 +11700,7 @@ static const struct drm_crtc_funcs intel_crtc_funcs =
> {
> .page_flip = intel_crtc_page_flip,
> .atomic_duplicate_state = intel_crtc_duplicate_state,
> .atomic_destroy_state = intel_crtc_d
On Mon, Feb 23, 2015 at 05:35:54PM +0530, Ramalingam C wrote:
> From: Vandana Kannan
>
> Adding a debugfs entry to determine if DRRS is supported or not
>
> V2: [By Ram]: Following details about the active crtc will be filled
> in seq-file of the debugfs
> 1. Encoder output type
>
On Tuesday 24 February 2015 05:42 AM, Daniel Vetter wrote:
On Sat, Feb 21, 2015 at 11:10:51AM +0530, Sonika Jindal wrote:
Updating recommended DDI translation table for edp 1.4
as per bspec update
Signed-off-by: Sonika Jindal
Reviewed-by: Damien Lespiau
---
drivers/gpu/drm/i915/intel_ddi.c
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