On Tue, 10 Jun 2014 16:02:51 +0200
Daniel Vetter wrote:
> On Thu, Jun 05, 2014 at 11:24:28AM -0700, Jesse Barnes wrote:
> > Some machines (like MBAs) might use a tiled framebuffer but not enable
> > display swizzling at boot time. We want to preserve that configuration
> > if possible to prevent
On Tue, 10 Jun 2014 16:05:36 +0200
Daniel Vetter wrote:
> On Thu, Jun 05, 2014 at 11:24:30AM -0700, Jesse Barnes wrote:
> > From: Kristian Høgsberg
> >
> > The BIOS may set a native mode that doesn't quite match the preferred
> > mode timings. It should be ok to use however if it uses the same
On Tue, 10 Jun 2014 16:07:44 +0200
Daniel Vetter wrote:
> On Thu, Jun 05, 2014 at 11:24:31AM -0700, Jesse Barnes wrote:
> > Let them eat mincemeat pie.
> >
> > Signed-off-by: Jesse Barnes
> > ---
> > drivers/gpu/drm/i915/i915_params.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(
On Tue, 2014-06-10 at 15:43 +0300, Imre Deak wrote:
> On Tue, 2014-06-10 at 00:27 +0530, sagar.a.kam...@intel.com wrote:
> > From: Sagar Kamble
> >
> > To do a platform wide S0i3 transition, Gfx is required to go
> > to D3_hot state. pci_save_state and pci_restore_state needed to avoid ring
> > h
Some registers set during setup might not be persistent after suspend/resume,
and also on crtc off/on cycles.
This was causing bugs for some people that was unable to get PSR entry state
after suspend/resume cycle.
v2: Adding some comments and better commit message explaining why this is
needed.
Some registers set during setup might not be persistent after suspend/resume,
and also on crtc off/on cycles.
This was causing bugs for some people that was unable to get PSR entry state
after suspend/resume cycle.
v2: Adding some comments and better commit message explaining why this is
needed.
On Tue, 2014-06-10 at 23:05 +0530, Sagar Arun Kamble wrote:
> On Tue, 2014-06-10 at 15:43 +0300, Imre Deak wrote:
> > On Tue, 2014-06-10 at 00:27 +0530, sagar.a.kam...@intel.com wrote:
> > > From: Sagar Kamble
> > >
> > > To do a platform wide S0i3 transition, Gfx is required to go
> > > to D3_ho
On Tue, Jun 10, 2014 at 10:31 AM, Jesse Barnes wrote:
> On Tue, 10 Jun 2014 16:07:44 +0200
> Daniel Vetter wrote:
>
>> On Thu, Jun 05, 2014 at 11:24:31AM -0700, Jesse Barnes wrote:
>> > Let them eat mincemeat pie.
>> >
>> > Signed-off-by: Jesse Barnes
>> > ---
>> > drivers/gpu/drm/i915/i915_par
On Tue, 10 Jun 2014, Ville Syrjälä wrote:
> On Tue, Jun 10, 2014 at 06:34:18PM +0300, Jani Nikula wrote:
>> On Tue, 10 Jun 2014, Jani Nikula wrote:
>> > On Mon, 09 Jun 2014, Damien Lespiau wrote:
>> >> On Mon, Jun 09, 2014 at 10:06:49AM -0700, Tom.O'rou...@intel.com wrote:
>> >>> From: Tom O'Rou
On Tue, 10 Jun 2014 11:01:06 -0700
Stéphane Marchesin wrote:
> On Tue, Jun 10, 2014 at 10:31 AM, Jesse Barnes
> wrote:
> > On Tue, 10 Jun 2014 16:07:44 +0200
> > Daniel Vetter wrote:
> >
> >> On Thu, Jun 05, 2014 at 11:24:31AM -0700, Jesse Barnes wrote:
> >> > Let them eat mincemeat pie.
> >>
>> This is just a merge mishap in one the chv patches. Someone just needs
>> to send a patch that moves the misapplied stuff to the appropriate chv
>> function.
>
>Right. So my first comment was correct, and my elaboration total bullcrap. This
>is not present in 3.15, but we've queued the screwup f
On Tue, Jun 10, 2014 at 07:03:48PM +, O'Rourke, Tom wrote:
> >> This is just a merge mishap in one the chv patches. Someone just needs
> >> to send a patch that moves the misapplied stuff to the appropriate chv
> >> function.
> >
> >Right. So my first comment was correct, and my elaboration tot
On Tue, Jun 10, 2014 at 7:27 PM, Jesse Barnes wrote:
> Yes, that's what I do below... I even added it to the changelog:
> http://patchwork.freedesktop.org/patch/27223/
>
> Did you miss the later hunk in intel_display.c?
>
> What we try to do here is enable swizzling if possible, which we can do
>
On Wed, Apr 16, 2014 at 3:03 PM, Steven Noonan wrote:
> On Wed, Apr 16, 2014 at 2:46 PM, Jani Nikula
> wrote:
>> On Tue, 15 Apr 2014, Imre Deak wrote:
>>> On Tue, 2014-04-15 at 21:43 +0200, Daniel Vetter wrote:
On Mon, Apr 14, 2014 at 11:56:03AM -0700, Steven Noonan wrote:
> On Mon, Ap
On Tue, 10 Jun 2014 21:33:27 +0200
Daniel Vetter wrote:
> On Tue, Jun 10, 2014 at 7:27 PM, Jesse Barnes
> wrote:
> > Yes, that's what I do below... I even added it to the changelog:
> > http://patchwork.freedesktop.org/patch/27223/
> >
> > Did you miss the later hunk in intel_display.c?
> >
> >
On Tue, 2014-06-10 at 12:35 -0700, Steven Noonan wrote:
> On Wed, Apr 16, 2014 at 3:03 PM, Steven Noonan wrote:
> > On Wed, Apr 16, 2014 at 2:46 PM, Jani Nikula
> > wrote:
> >> On Tue, 15 Apr 2014, Imre Deak wrote:
> >>> On Tue, 2014-04-15 at 21:43 +0200, Daniel Vetter wrote:
> On Mon, Apr
Compute the smallest pitch required for a linear framebuffer and assert
that the user has declared a pitch that meets that minimum requirement.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_display.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i9
On Tue, Jun 10, 2014 at 08:59:32PM +0100, Lewis Toohey wrote:
> On 10 June 2014 17:58, Ben Widawsky wrote:
> > On Tue, Jun 10, 2014 at 01:33:51PM +0800, Aaron Lu wrote:
> >> +Ben Widawsky & Daniel Vetter
> >>
> >> On 06/09/2014 03:38 PM, Lewis Toohey wrote:
> >> > On 3 June 2014 02:22, Aaron Lu w
From: Tom O'Rourke
Correct a merge mishap in commit e4443e459ccf43f2c139358400365fd6a839d40d.
Wa*:chv belongs in cherryview_enable_rps, not gen8_enable_rps.
Signed-off-by: Tom O'Rourke
---
drivers/gpu/drm/i915/intel_pm.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
di
These PCI IDs are reserved on BSpec and can be used at any time in the future.
So let's add this now in order to avoid issues that we already faced on previous
platforms, like finding out about new ids when user reported accelaration
weren't
enabled.
Signed-off-by: Rodrigo Vivi
---
include/drm/
These PCI IDs are reserved on BSpec and can be used at any time in the future.
So let's add this now in order to avoid issues that we already faced on previous
platforms, like finding out about new ids when user reported accelaration
weren't
enabled.
Signed-off-by: Rodrigo Vivi
---
src/i915_pci
Even the unknown/reserved ones might stay with HD Graphics.
Signed-off-by: Rodrigo Vivi
---
man/intel.man | 7 +--
src/intel_module.c | 32 +---
2 files changed, 34 insertions(+), 5 deletions(-)
diff --git a/man/intel.man b/man/intel.man
index 9deac41..917f
On Tue, Jun 10, 2014 at 10:09:52AM -0700, Rodrigo Vivi wrote:
> These PCI IDs are reserved on BSpec and can be used at any time in the future.
> So let's add this now in order to avoid issues that we already faced on
> previous
> platforms, like finding out about new ids when user reported accelar
These PCI IDs are reserved on BSpec and can be used at any time in the future.
So let's add this now in order to avoid issues that we already faced on previous
platforms, like finding out about new ids when user reported accelaration
weren't
enabled.
v2: Reserved IDs doesn't have GT defined. So,
Added a property to enable user space to set aspect ratio.
This patch contains declaration of the property and code to create the
property.
v2: Thierry's review comments.
- Made aspect ratio enum generic instead of HDMI/CEA specfic
- Removed usage of temporary aspect_ratio variable
Create and attach the drm property to set aspect ratio. If there is no user
specified value, then PAR_NONE/Automatic option is set by default. User can
select aspect ratio 4:3 or 16:9. The aspect ratio selected by user would
come into effect with a mode set.
v2: Modified switch case to include asp
On Tue, Jun 10, 2014 at 10:15:38AM -0700, Rodrigo Vivi wrote:
> These PCI IDs are reserved on BSpec and can be used at any time in the future.
> So let's add this now in order to avoid issues that we already faced on
> previous
> platforms, like finding out about new ids when user reported accelar
Hey,
With regard to this commit:
http://lists.freedesktop.org/archives/intel-gfx/2012-December/023210.html
How can I get access to this B-Spec document?
Thanks,
Nick
--
[Intel-gfx] [PATCH 1/2] drm/i915: Implement
WaDisableHiZPlanesWhenMSAAEnabled
Quoting from Bspec, 3D_C
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