On Mon, Jun 09, 2014 at 07:47:10AM +0100, Chris Wilson wrote:
> Thomas found that his machine would deadlock reloading the i915.ko
> module after resume. He identified that this was caused by the
> reacquisition of the connection mutex inside intel_enable_pipe_a()
> during the CRTC sanitization rou
On Mon, Jun 09, 2014 at 11:30:26AM +0300, Ville Syrjälä wrote:
> On Mon, Jun 09, 2014 at 07:47:10AM +0100, Chris Wilson wrote:
> > Thomas found that his machine would deadlock reloading the i915.ko
> > module after resume. He identified that this was caused by the
> > reacquisition of the connectio
On Thu, Jun 05, 2014 at 02:28:17PM -0700, Rodrigo Vivi wrote:
> Adding missing Display mmio reg offset.
>
> Credits-to: Laws, Philip
> Cc: He, Shuang
> Signed-off-by: Rodrigo Vivi
Is there no bugzilla that pipe crc tests on DP/eDP ports aren't working on
byt? Can you please chase this down wit
On Mon, Jun 09, 2014 at 10:06:29PM +0300, Jani Nikula wrote:
> On Mon, 09 Jun 2014, Ville Syrjälä wrote:
> > On Mon, Jun 09, 2014 at 09:12:18PM +0300, Jani Nikula wrote:
> >> On Fri, 06 Jun 2014, Chris Wilson wrote:
> >> > It causes black screen on bootup and is approximately 100x slower than
> >
On Mon, Jun 09, 2014 at 04:20:46PM +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> On certain platforms pixel_multiplier is read out in
> .get_pipe_config(), but it also gets used to calculate the
> pixel clock in intel_sdvo_get_config(). If the pipe is disable
> but some SD
On Tue, Jun 10, 2014 at 08:59:42AM +0200, Daniel Vetter wrote:
> On Mon, Jun 09, 2014 at 07:47:10AM +0100, Chris Wilson wrote:
> > + } else {
> > + /* Switch crtc and encoder back off if necessary */
> > + if (old->dpms_mode != DRM_MODE_DPMS_ON)
> > + connect
Lately current git for xf86-video-intel broke for me.
Bisecting led me to "sna: Do not allow imported buffers to be cached"
and then reverting that on top(with one conflict) of current git
restored my X.
The symptom is that drawing starts with lots of random pixels and then
it clears after 1 secon
From: Akash Goel
Removed the unconditional cross engine/ring update of MBOX registers.
The MBox update will done only when needed when the actual inter ring
dependency has been ascertained. Although this late sync could affect
the Media performance slightly but it shall improve the residency time
On Tue, Jun 10, 2014 at 12:48:44PM +0530, sourab.gu...@intel.com wrote:
> From: Akash Goel
>
> Removed the unconditional cross engine/ring update of MBOX registers.
> The MBox update will done only when needed when the actual inter ring
> dependency has been ascertained. Although this late sync c
On Mon, Jun 09, 2014 at 06:24:34PM +0300, Jani Nikula wrote:
> For reasons I can't claim to fully understand gen4 seems to require
> backlight duty cycle setting after the backlight has been enabled, or
> else black screen follows. I don't have documentation for the correct
> sequence on gen4 eithe
On Mon, Jun 09, 2014 at 12:32:38AM +0530, Gideon D'souza wrote:
> Hey Bruno,
>
> So I got my system up and running finally by just doing a sudo yum update.
>
> So it seems like the problem is fixed is a newer library. I looked at :
> https://bugs.freedesktop.org
That was a bug in mesa. But if it
On Sat, Jun 07, 2014 at 06:23:44PM +0200, Tjernlund wrote:
> Lately current git for xf86-video-intel broke for me.
> Bisecting led me to "sna: Do not allow imported buffers to be cached"
> and then reverting that on top(with one conflict) of current git
> restored my X.
>
> The symptom is that dra
Thanks very Much Chris and Bruno :)
On Tue, Jun 10, 2014 at 12:57 PM, Chris Wilson wrote:
> On Mon, Jun 09, 2014 at 12:32:38AM +0530, Gideon D'souza wrote:
>> Hey Bruno,
>>
>> So I got my system up and running finally by just doing a sudo yum update.
>>
>> So it seems like the problem is fixed is
Snapshot 2.99.912 (2014-06-10)
==
A final round of features. We have everything from support for variable
cursor sizes, support for the DRI3 and Present extensions, improved DRI2
support, support for Xserver 1.16, userptr from kernel 3.16, and
precursory support for DP m
On Jun-05-2014 2:58 PM, Thierry Reding wrote:
> On Thu, Jun 05, 2014 at 02:40:08PM +0530, Vandana Kannan wrote:
> [...]
>> diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
> [...]
>> /**
>> + * drm_mode_create_aspect_ratio_property - create aspect ratio property
>> + * @dev: DR
On Tue, Jun 10, 2014 at 09:02:07AM +0200, Daniel Vetter wrote:
> On Mon, Jun 09, 2014 at 11:30:26AM +0300, Ville Syrjälä wrote:
> > On Mon, Jun 09, 2014 at 07:47:10AM +0100, Chris Wilson wrote:
> > > Thomas found that his machine would deadlock reloading the i915.ko
> > > module after resume. He id
Hi Wendy,
I think it's better to squash this into the original patch so I've
reverted your patch from i-g-t for now. Also chatted with Ben on irc and
he's ok with that.
More comments after I've read your test more carefully:
- Please don't use abort() or exit() anywhere in your test. Use the igt
On Tue, Jun 10, 2014 at 11:53:51AM +0300, Ville Syrjälä wrote:
> On Tue, Jun 10, 2014 at 09:02:07AM +0200, Daniel Vetter wrote:
> > On Mon, Jun 09, 2014 at 11:30:26AM +0300, Ville Syrjälä wrote:
> > > On Mon, Jun 09, 2014 at 07:47:10AM +0100, Chris Wilson wrote:
> > > > Thomas found that his machin
Long ago, back in the racy haydays of 915gm interrupt handling, page
flips would occasionally go astray and leave the hardware stuck, and the
display not updating. This annoyed people who relied on their systems
being able to display continuously updating information 24/7, and so
some code to detec
If we successfully confuse the hardware, and cause it to drop a queued
pageflip, we wait for 60s and issue a warning before continuing on with
the modeset. However, this leaves the pending pageflip still stuck
indefinitely. Pretend to userspace that it does complete, and let us
start afresh followi
If we hit a vblank and see that have a pageflip queue but not yet
processed, ensure that the GPU is running at maximum in order to clear
the backlog. Pageflips are only queued for the following vblank, if we
miss it, there will be a visible stutter. Boosting the GPU frequency
doesn't prevent us fro
Rewrite i915_gem_render_state.c for the purposes of clarity and
compactness, in the process we can eliminate some dodgy math that did
not handle 64bit addresses correctly.
Signed-off-by: Chris Wilson
Cc: Ville Syrjälä
Cc: Damien Lespiau
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_rend
On Fri, May 30, 2014 at 02:16:30PM +0100, Chris Wilson wrote:
> Fallout from
>
> commit 46470fc932ac8a0e8317a220b3f4ea4ed903338e
> Author: Mika Kuoppala
> Date: Wed May 21 19:01:06 2014 +0300
>
> drm/i915: Add null state batch to active list
>
> undid the earlier fix of only marking the c
Otherwise we print out spurious processes on unused rings in the error
state.
Signed-off-by: Chris Wilson
Cc: sta...@vger.kernel.org
---
drivers/gpu/drm/i915/i915_gpu_error.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/drivers/gp
On an Ivybridge i7-3720qm with 1600MHz DDR3, with 32 fences,
Upload rate for 2 linear surfaces: 8134MiB/s -> 8154MiB/s
Upload rate for 2 tiled surfaces: 8625MiB/s -> 8632MiB/s
Upload rate for 4 linear surfaces: 8127MiB/s -> 8134MiB/s
Upload rate for 4 tiled surfaces: 8602MiB/s -> 8629MiB/s
Up
Inserting additional PTEs has no side-effect for us as the pfn are fixed
for the entire time the object is resident in the global GTT. The
downside is that we pay the entire cost of faulting the object upon the
first hit, for which we in return receive the benefit of removing the
per-page faulting
On Tue, Jun 10, 2014 at 02:00:37PM +0530, Vandana Kannan wrote:
> On Jun-05-2014 2:58 PM, Thierry Reding wrote:
> > On Thu, Jun 05, 2014 at 02:40:08PM +0530, Vandana Kannan wrote:
> > [...]
> >> diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
> > [...]
> >> /**
> >> + * drm_mo
On Tue, Jun 10, 2014 at 11:04:00AM +0100, Chris Wilson wrote:
> Long ago, back in the racy haydays of 915gm interrupt handling, page
> flips would occasionally go astray and leave the hardware stuck, and the
> display not updating. This annoyed people who relied on their systems
> being able to dis
On Tue, Jun 10, 2014 at 11:04:01AM +0100, Chris Wilson wrote:
> If we successfully confuse the hardware, and cause it to drop a queued
> pageflip, we wait for 60s and issue a warning before continuing on with
> the modeset. However, this leaves the pending pageflip still stuck
> indefinitely. Prete
On Tue, Jun 10, 2014 at 02:25:50PM +0300, Ville Syrjälä wrote:
> On Tue, Jun 10, 2014 at 11:04:00AM +0100, Chris Wilson wrote:
> > +static inline int crtc_sbc(struct intel_crtc *crtc)
> > +{
> > + return atomic_read(&crtc->base.dev->vblank[crtc->pipe].count);
> > +}
>
> Still says 'sbc' which do
On Tue, Jun 10, 2014 at 11:04:02AM +0100, Chris Wilson wrote:
> If we hit a vblank and see that have a pageflip queue but not yet
> processed, ensure that the GPU is running at maximum in order to clear
> the backlog. Pageflips are only queued for the following vblank, if we
> miss it, there will b
The "usage" text should explain it all. I found, in my quilt series
handling endeavours, that I wanted to be able to shift the prefix
numbers of a patch series.
Signed-off-by: Damien Lespiau
---
frob-patch-rank | 47 +++
1 file changed, 47 insertions(+
On Tue, Jun 10, 2014 at 12:33:48PM +0100, Chris Wilson wrote:
> On Tue, Jun 10, 2014 at 02:25:50PM +0300, Ville Syrjälä wrote:
> > On Tue, Jun 10, 2014 at 11:04:00AM +0100, Chris Wilson wrote:
> > > +static inline int crtc_sbc(struct intel_crtc *crtc)
> > > +{
> > > + return atomic_read(&crtc->base
On Mon, 09 Jun 2014, Ville Syrjälä wrote:
> On Wed, Jun 04, 2014 at 06:22:13PM +0200, Daniel Vetter wrote:
>> On Tue, Jun 03, 2014 at 05:51:01PM -0300, Paulo Zanoni wrote:
>> > 2014-05-22 11:48 GMT-03:00 :
>> > > From: Ville Syrjälä
>> > >
>> > > We need to perform watermark programming before a
On Tue, Jun 10, 2014 at 02:41:20PM +0300, Ville Syrjälä wrote:
> On Tue, Jun 10, 2014 at 11:04:02AM +0100, Chris Wilson wrote:
> > If we hit a vblank and see that have a pageflip queue but not yet
> > processed, ensure that the GPU is running at maximum in order to clear
> > the backlog. Pageflips
On Mon 2014-06-09 13:03:31, Jiri Kosina wrote:
> On Mon, 9 Jun 2014, Pavel Machek wrote:
>
> > > > Strange. It seems 3.15 with the patch reverted only boots in 30% or so
> > > > cases... And I've seen resume failure, too, so maybe I was just lucky
> > > > that it worked for a while.
> > >
> > > g
On Tue, 10 Jun 2014, Damien Lespiau wrote:
> The "usage" text should explain it all. I found, in my quilt series
> handling endeavours, that I wanted to be able to shift the prefix
> numbers of a patch series.
>
> Signed-off-by: Damien Lespiau
> ---
> frob-patch-rank | 47 +++
Hi Sagar,
On Tue, 2014-06-10 at 00:27 +0530, sagar.a.kam...@intel.com wrote:
> From: Sagar Kamble
>
> Display power island is on during boot, we have one count for it
> once this power gates, we do a put making sure runtime_suspend is
> called
>
> Cc: Daniel Vetter (supporter:INTEL DRM DRIVERS
On Tue, Jun 10, 2014 at 11:04:02AM +0100, Chris Wilson wrote:
> If we hit a vblank and see that have a pageflip queue but not yet
> processed, ensure that the GPU is running at maximum in order to clear
> the backlog. Pageflips are only queued for the following vblank, if we
> miss it, there will b
From: Ville Syrjälä
Switch to XY_COLOR_BLT from COLOR_BLT and use the appropriate
macros to make the code work on BDW.
Also make the blit 8bpp instead if 16bpp. 8bpp is what it was
supposed to use all along.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76307
Signed-off-by: Ville Syrjä
On Tue, 2014-06-10 at 00:27 +0530, sagar.a.kam...@intel.com wrote:
> From: Sagar Kamble
>
> To do a platform wide S0i3 transition, Gfx is required to go
> to D3_hot state. pci_save_state and pci_restore_state needed to avoid ring
> hangs across D3_hot transitions.
>
> Cc: Daniel Vetter (support
If we hit a vblank and see that have a pageflip queue but not yet
processed, ensure that the GPU is running at maximum in order to clear
the backlog. Pageflips are only queued for the following vblank, if we
miss it, there will be a visible stutter. Boosting the GPU frequency
doesn't prevent us fro
Long ago, back in the racy haydays of 915gm interrupt handling, page
flips would occasionally go astray and leave the hardware stuck, and the
display not updating. This annoyed people who relied on their systems
being able to display continuously updating information 24/7, and so
some code to detec
The "usage" text should explain it all. I found, in my quilt series
handling endeavours, that I wanted to be able to shift the prefix
numbers of a patch series.
v2: Use heredoc for usage string, fix second example, use mv -i (Jani)
Signed-off-by: Damien Lespiau
---
frob-patch-rank | 51
If we successfully confuse the hardware, and cause it to drop a queued
pageflip, we wait for 60s and issue a warning before continuing on with
the modeset. However, this leaves the pending pageflip still stuck
indefinitely. Pretend to userspace that it does complete, and let us
start afresh followi
On Tue, Jun 10, 2014 at 11:34:34AM +0100, Chris Wilson wrote:
> On Fri, May 30, 2014 at 02:16:30PM +0100, Chris Wilson wrote:
> > Fallout from
> >
> > commit 46470fc932ac8a0e8317a220b3f4ea4ed903338e
> > Author: Mika Kuoppala
> > Date: Wed May 21 19:01:06 2014 +0300
> >
> > drm/i915: Add nu
On Tue, Jun 10, 2014 at 02:47:29PM +0300, Ville Syrjälä wrote:
> On Tue, Jun 10, 2014 at 12:33:48PM +0100, Chris Wilson wrote:
> > On Tue, Jun 10, 2014 at 02:25:50PM +0300, Ville Syrjälä wrote:
> > > On Tue, Jun 10, 2014 at 11:04:00AM +0100, Chris Wilson wrote:
> > > > +static inline int crtc_sbc(s
On Tue, Jun 10, 2014 at 12:09:29PM +0100, Chris Wilson wrote:
> Otherwise we print out spurious processes on unused rings in the error
> state.
>
> Signed-off-by: Chris Wilson
> Cc: sta...@vger.kernel.org
Personally would have done that in the dumper code, not the recording code
- this here look
On Wed, 2014-06-04 at 13:45 -0700, Jesse Barnes wrote:
> This allows the system to enter the lowest power mode during system freeze.
>
> v2: delete force wake timer at suspend (Imre)
> v3: add GT work suspend function (Imre)
> v4: use uncore forcewake reset (Daniel)
>
> Signed-off-by: Kristen Car
On Tue, Jun 10, 2014 at 03:30:25PM +0200, Daniel Vetter wrote:
> On Tue, Jun 10, 2014 at 12:09:29PM +0100, Chris Wilson wrote:
> > Otherwise we print out spurious processes on unused rings in the error
> > state.
> >
> > Signed-off-by: Chris Wilson
> > Cc: sta...@vger.kernel.org
>
> Personally w
On Tue, Jun 10, 2014 at 01:46:54PM +0100, Chris Wilson wrote:
> Long ago, back in the racy haydays of 915gm interrupt handling, page
> flips would occasionally go astray and leave the hardware stuck, and the
> display not updating. This annoyed people who relied on their systems
> being able to dis
On Tue, Jun 10, 2014 at 04:42:50PM +0300, Imre Deak wrote:
> On Wed, 2014-06-04 at 13:45 -0700, Jesse Barnes wrote:
> > This allows the system to enter the lowest power mode during system freeze.
> >
> > v2: delete force wake timer at suspend (Imre)
> > v3: add GT work suspend function (Imre)
> >
On Thu, Jun 05, 2014 at 11:24:27AM -0700, Jesse Barnes wrote:
> Some machines may have a broken VBT or no VBT at all, but we still want
> to use SSC there. So check for it and keep it enabled if we see it
> already on. Based on an earlier fix from Kristian.
>
> v2: honor modparam if set too (Dan
On Thu, Jun 05, 2014 at 11:24:28AM -0700, Jesse Barnes wrote:
> Some machines (like MBAs) might use a tiled framebuffer but not enable
> display swizzling at boot time. We want to preserve that configuration
> if possible to prevent a boot time mode set. On IVB+ it shouldn't
> affect performance
On Tue, Jun 10, 2014 at 12:29:20AM +0200, Thomas Richter wrote:
> Hi Ville,
>
> thanks for the latest patch. As said, the screen did not come back quite
> correctly. I checked the register values
> again, and I am sorry to say that I was wrong - register values do
> differ. Apparently, the code
On Thu, Jun 05, 2014 at 11:24:30AM -0700, Jesse Barnes wrote:
> From: Kristian Høgsberg
>
> The BIOS may set a native mode that doesn't quite match the preferred
> mode timings. It should be ok to use however if it uses the same size,
> so try to avoid a mode set in that case.
>
> Signed-off-by
On Thu, Jun 05, 2014 at 11:24:31AM -0700, Jesse Barnes wrote:
> Let them eat mincemeat pie.
>
> Signed-off-by: Jesse Barnes
> ---
> drivers/gpu/drm/i915/i915_params.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_params.c
> b/drivers/gpu
On Fri, Jun 06, 2014 at 02:12:44PM +0300, Jani Nikula wrote:
> On Thu, 05 Jun 2014, Jesse Barnes wrote:
> > Let them eat mincemeat pie.
> >
> > Signed-off-by: Jesse Barnes
> > ---
> > drivers/gpu/drm/i915/i915_params.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --
These comments are not gtk-doc comments, so replacing /** with /*
prevents any gtk-doc warnings.
Signed-off-by: Thomas Wood
---
lib/i915_3d.h | 26 ++--
lib/intel_reg.h | 404 +-
lib/rendercopy_gen8.c | 6 +-
3 files changed, 218 i
Signed-off-by: Thomas Wood
---
README | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/README b/README
index cfa186d..5e98565 100644
--- a/README
+++ b/README
@@ -108,16 +108,14 @@ docs/
reference documenation in docs/reference/ You need to have the gtk doc
Signed-off-by: Thomas Wood
---
tests/.gitignore| 11 +++
tools/null_state_gen/.gitignore | 1 +
2 files changed, 8 insertions(+), 4 deletions(-)
create mode 100644 tools/null_state_gen/.gitignore
diff --git a/tests/.gitignore b/tests/.gitignore
index d7ad054..a61d025 10
Fix some documentation comments and mark some struct members private.
Signed-off-by: Thomas Wood
---
lib/igt_aux.c | 5 ++---
lib/igt_core.c | 10 +-
lib/igt_kms.h | 2 ++
lib/intel_batchbuffer.h | 5 +
4 files changed, 10 insertions(+), 12 deletions(-
Piglit now has a top level "piglit" command and the location of the
tests can now be read from an environment variable.
Signed-off-by: Thomas Wood
---
README | 27 ++-
1 file changed, 10 insertions(+), 17 deletions(-)
diff --git a/README b/README
index 2cfb5c5..cfa186d 1
Signed-off-by: Thomas Wood
---
docs/reference/intel-gpu-tools/intel-gpu-tools-docs.xml | 4
1 file changed, 4 insertions(+)
diff --git a/docs/reference/intel-gpu-tools/intel-gpu-tools-docs.xml
b/docs/reference/intel-gpu-tools/intel-gpu-tools-docs.xml
index dcfff33..96cf77f 100644
--- a/doc
This file can contain custom changes to the control the documentation
output and therefore should be included in the repository.
Signed-off-by: Thomas Wood
---
docs/reference/intel-gpu-tools/.gitignore | 1 -
.../intel-gpu-tools/intel-gpu-tools-sections.txt | 378 +++
On Tue, Jun 10, 2014 at 03:30:51PM +0100, Thomas Wood wrote:
> Piglit now has a top level "piglit" command and the location of the
> tests can now be read from an environment variable.
>
> Signed-off-by: Thomas Wood
> ---
> README | 27 ++-
> 1 file changed, 10 insertions
On Tue, Jun 10, 2014 at 03:30:53PM +0100, Thomas Wood wrote:
> Signed-off-by: Thomas Wood
> ---
> README | 12 +---
> 1 file changed, 5 insertions(+), 7 deletions(-)
>
> diff --git a/README b/README
> index cfa186d..5e98565 100644
> --- a/README
> +++ b/README
> @@ -108,16 +108,14 @@ doc
On Tue, Jun 10, 2014 at 03:30:54PM +0100, Thomas Wood wrote:
> This file can contain custom changes to the control the documentation
> output and therefore should be included in the repository.
>
> Signed-off-by: Thomas Wood
Doesn't that mean we need to update this when adding new symbols? Imo
f
On Tue, 2014-06-10 at 15:57 +0200, Daniel Vetter wrote:
> On Tue, Jun 10, 2014 at 04:42:50PM +0300, Imre Deak wrote:
> > On Wed, 2014-06-04 at 13:45 -0700, Jesse Barnes wrote:
> > > This allows the system to enter the lowest power mode during system
> > > freeze.
> > >
> > > v2: delete force wake
On Tue, Jun 10, 2014 at 03:30:56PM +0100, Thomas Wood wrote:
> Fix some documentation comments and mark some struct members private.
>
> Signed-off-by: Thomas Wood
> ---
> lib/igt_aux.c | 5 ++---
> lib/igt_core.c | 10 +-
> lib/igt_kms.h | 2 ++
> lib/inte
On Tue, 2014-06-10 at 07:24 +, Chris Wilson wrote:
> On Tue, Jun 10, 2014 at 12:48:44PM +0530, sourab.gu...@intel.com wrote:
> > From: Akash Goel
> >
> > Removed the unconditional cross engine/ring update of MBOX registers.
> > The MBox update will done only when needed when the actual inter
On Tue, Jun 10, 2014 at 03:30:57PM +0100, Thomas Wood wrote:
> Signed-off-by: Thomas Wood
I've intentionally left these out since they're not really part of the
core test library ... E.g. all public rendercopy functions are documented
as part of the "intel batchbuffer" library.
-Daniel
> ---
>
On 10 June 2014 15:37, Daniel Vetter wrote:
> On Tue, Jun 10, 2014 at 03:30:51PM +0100, Thomas Wood wrote:
>> Piglit now has a top level "piglit" command and the location of the
>> tests can now be read from an environment variable.
>>
>> Signed-off-by: Thomas Wood
>> ---
>> README | 27
would you be ok by a patch that doesn't trigger the psr_update but just set
psr.setup_done = false on resume?
I don't want to do more setup than really needed.
Or you mean move even psr.setup_done to crtc_enable?
On Thu, Jun 5, 2014 at 2:15 AM, Daniel Vetter wrote:
> On Wed, Jun 04, 2014 at 1
On Tue, Jun 10, 2014 at 08:11:41AM -0700, Rodrigo Vivi wrote:
> would you be ok by a patch that doesn't trigger the psr_update but just set
> psr.setup_done = false on resume?
>
> I don't want to do more setup than really needed.
>
> Or you mean move even psr.setup_done to crtc_enable?
Yeah, if
On Tue, Jun 10, 2014 at 05:41:49PM +0300, Imre Deak wrote:
> On Tue, 2014-06-10 at 15:57 +0200, Daniel Vetter wrote:
> > On Tue, Jun 10, 2014 at 04:42:50PM +0300, Imre Deak wrote:
> > > On Wed, 2014-06-04 at 13:45 -0700, Jesse Barnes wrote:
> > > > This allows the system to enter the lowest power m
Rebasing to the latest drm-intel-nightly and resending at the request of the
reviewers. Daniel has already provided an r-b for the first five patches here,
so #6 is the main functionality awaiting review.
Matt Roper (6):
drm: Refactor framebuffer creation to allow internal use (v2)
drm: Refac
Refactor DRM framebuffer creation into a new function that returns a
struct drm_framebuffer directly. The upcoming universal cursor support
will want to create framebuffers internally to wrap cursor buffers, so
we want to be able to share that framebuffer creation with the
drm_mode_addfb2 ioctl ha
If drivers support universal planes and have registered a cursor plane
with the DRM core, we should use that universal plane support when
handling legacy cursor ioctls. Drivers that transition to universal
planes won't have to maintain separate legacy ioctl handling; drivers
that don't transition
Refactor cursor buffer setting such that the code to actually update the
cursor lives in a new function, intel_crtc_cursor_set_obj(), and takes
a GEM object as a parameter. The existing legacy cursor ioctl handler,
intel_crtc_cursor_set() will now perform the userspace handle lookup and
then call
The DRM core will translate calls to legacy cursor ioctls into universal
cursor calls automatically, so there's no need to maintain the legacy
cursor support. This greatly simplifies the transition since we don't
have to handle reference counting differently depending on which cursor
interface was
Universal plane support had placeholders for cursor planes, but didn't
actually do anything with them. Save the cursor plane reference inside
the crtc and update the cursor plane parameter from void* to drm_plane.
Reviewed-by: Daniel Vetter
Signed-off-by: Matt Roper
---
drivers/gpu/drm/drm_crt
Refactor DRM setplane code into a new setplane_internal() function that
takes DRM objects directly as parameters rather than looking them up by
ID. We'll use this in a future patch when we implement legacy cursor
ioctls on top of the universal plane interface.
v3:
- Move integer overflow checkin
On Tue, Jun 10, 2014 at 04:06:17PM +0100, Thomas Wood wrote:
> On 10 June 2014 15:37, Daniel Vetter wrote:
> > On Tue, Jun 10, 2014 at 03:30:51PM +0100, Thomas Wood wrote:
> >> Piglit now has a top level "piglit" command and the location of the
> >> tests can now be read from an environment variab
On Mon, 09 Jun 2014, Damien Lespiau wrote:
> On Mon, Jun 09, 2014 at 10:06:49AM -0700, Tom.O'rou...@intel.com wrote:
>> From: Tom O'Rourke
>>
>> In gen8_enable_rps, don't write CHV registers unless IS_CHERRYVIEW.
>>
>> Signed-off-by: Tom O'Rourke
>
> A lovely catch.
Sadly gen8_enable_rps does
On Tue, 10 Jun 2014, Jani Nikula wrote:
> On Mon, 09 Jun 2014, Damien Lespiau wrote:
>> On Mon, Jun 09, 2014 at 10:06:49AM -0700, Tom.O'rou...@intel.com wrote:
>>> From: Tom O'Rourke
>>>
>>> In gen8_enable_rps, don't write CHV registers unless IS_CHERRYVIEW.
>>>
>>> Signed-off-by: Tom O'Rourke
Hi,
Does anyone have access to the Sandy Bridge 2011 Intel HD Graphics PCI Config
space register reference? I cannot seem to find it anywhere in the PRM docs.
There is only a reference to a register called MMAPA at office 14h in all
DevSNB manuals.
I do see PCI config space documentation for
Hi
On Thu, May 29, 2014 at 5:57 PM, Thomas Wood wrote:
> Introduce generic functions to register and unregister connectors. This
> provides a common place to add and remove associated user space
> interfaces.
>
> Signed-off-by: Thomas Wood
> ---
> Documentation/DocBook/drm.tmpl|
On Wed, Jun 04, 2014 at 11:30:47AM +0530, Arun Murthy wrote:
> On Mon, May 26, 2014 at 7:26 PM, Daniel Vetter wrote:
> > On Thu, May 22, 2014 at 05:48:06PM +0300, ville.syrj...@linux.intel.com
> > wrote:
> >> From: Ville Syrjälä
> >>
> >> Because of the upcoming vblank interrupt driven watermark
On Fri, 06 Jun 2014, Daniel Vetter wrote:
> On Fri, Jun 6, 2014 at 10:44 PM, Imre Deak wrote:
>> Let's say that forcewake timer is pending, holding the runtime pm ref.
>> System suspend is called - it's not prevented by either this ref or the
>> above autosuspend delay - in the suspend handler we
On Fri, 06 Jun 2014, Mika Kuoppala wrote:
> Chris Wilson writes:
>
>> If a semaphore is waiting on another ring, which in turn happens to be
>> waiting on the first ring, but that second semaphore has been signalled,
>> we will be able to kick the second ring and so can treat the first ring
>> as
Hi
On Thu, May 29, 2014 at 5:57 PM, Thomas Wood wrote:
> Add a file to debugfs for each connector to enable modification of the
> "force" connector attribute. This allows connectors to be enabled or
> disabled for testing and debugging purposes.
>
> Signed-off-by: Thomas Wood
> ---
> drivers/gp
Hi Ville,
Either pipe can drive DVO just fine. Looks like it's using pipe A in
your register dump, and all the registers look fine to me. Well, DPLL B
VCO enable is off since we don't currently have a mechanism to kick pipe
B into action during resume/load. In theory that would need to be enable
On Tue, 10 Jun 2014, Daniel Vetter wrote:
> On Tue, Jun 10, 2014 at 12:09:29PM +0100, Chris Wilson wrote:
>> Otherwise we print out spurious processes on unused rings in the error
>> state.
>>
>> Signed-off-by: Chris Wilson
>> Cc: sta...@vger.kernel.org
>
> Personally would have done that in the
On Tue, 10 Jun 2014, Daniel Vetter wrote:
> On Mon, Jun 09, 2014 at 06:24:34PM +0300, Jani Nikula wrote:
>> For reasons I can't claim to fully understand gen4 seems to require
>> backlight duty cycle setting after the backlight has been enabled, or
>> else black screen follows. I don't have docume
On Tue, 10 Jun 2014, Daniel Vetter wrote:
> On Mon, Jun 09, 2014 at 04:20:46PM +0300, ville.syrj...@linux.intel.com wrote:
>> From: Ville Syrjälä
>>
>> On certain platforms pixel_multiplier is read out in
>> .get_pipe_config(), but it also gets used to calculate the
>> pixel clock in intel_sdvo_
On Tue, 10 Jun 2014, Daniel Vetter wrote:
> On Mon, Jun 09, 2014 at 10:06:29PM +0300, Jani Nikula wrote:
>> On Mon, 09 Jun 2014, Ville Syrjälä wrote:
>> > On Mon, Jun 09, 2014 at 09:12:18PM +0300, Jani Nikula wrote:
>> >> On Fri, 06 Jun 2014, Chris Wilson wrote:
>> >> > It causes black screen on
Hi
On Thu, May 29, 2014 at 5:57 PM, Thomas Wood wrote:
> Add a file to debugfs for each connector that allows the edid data to be
> overridden.
>
> Signed-off-by: Thomas Wood
> ---
> drivers/gpu/drm/drm_crtc.c | 4 +++
> drivers/gpu/drm/drm_debugfs.c | 56
> ++
On Tue, Jun 10, 2014 at 01:33:51PM +0800, Aaron Lu wrote:
> +Ben Widawsky & Daniel Vetter
>
> On 06/09/2014 03:38 PM, Lewis Toohey wrote:
> > On 3 June 2014 02:22, Aaron Lu wrote:
> >> On 05/30/2014 09:12 PM, Lewis Toohey wrote:
> >>> Aaron
> >>>
> >>> I am in the process of performing this bise
On Tue, Jun 10, 2014 at 06:34:18PM +0300, Jani Nikula wrote:
> On Tue, 10 Jun 2014, Jani Nikula wrote:
> > On Mon, 09 Jun 2014, Damien Lespiau wrote:
> >> On Mon, Jun 09, 2014 at 10:06:49AM -0700, Tom.O'rou...@intel.com wrote:
> >>> From: Tom O'Rourke
> >>>
> >>> In gen8_enable_rps, don't write
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