Gentle reminder for review.
Regards
Shashank
-Original Message-
From: Sharma, Shashank
Sent: Thursday, May 22, 2014 5:02 PM
To: intel-gfx@lists.freedesktop.org; Lespiau, Damien;
ville.syrj...@linux.intel.com; Vetter, Daniel
Cc: Kumar, Shobhit; Sharma, Shashank
Subject: [PATCH 2/2] drm/i
On Fri, May 30, 2014 at 7:40 AM, Dave Airlie wrote:
> Just wondering what the point of the WARN(!encoder->crtc) in that function is,
>
> I hit this with MST and I can't see what it should matter, where I hit
> it is if I dock MST while X is running and VT switch, I get it,
>
> I first wondered whe
On Fri, May 30, 2014 at 09:05:41AM +0100, Sharma, Shashank wrote:
> From: Sharma, Shashank
> Sent: Thursday, May 22, 2014 5:02 PM
> To: intel-gfx@lists.freedesktop.org; Lespiau, Damien;
> ville.syrj...@linux.intel.com; Vetter, Daniel
> Cc: Kumar, Shobhit; Sharma, Shashank
> Subject: [PATCH 2/2] d
On Thu, May 29, 2014 at 03:10:13PM +0530, sourab.gu...@intel.com wrote:
> + if (intel_use_mmio_flip(dev))
> + dev_priv->display.queue_flip = intel_queue_mmio_flip;
> +
Note that this patch creates the i915.use_mmio_flip as 0600 so this
cannot be a static assignment anyway.
-Chris
I was thinking this patch should be more like
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3201495..ab9b5f7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2060,7 +2060,7 @@ struct i915_params {
bool reset;
Dear Intel graphics folks,
since commit 17fec8a0 [1]
drm/i915: Use Graphics Base of Stolen Memory on all gen3+
Linux reads the register BSM (Base of Stolen Memory) directly to get the
base address of graphics stolen memory. With coreboot [2] and native
graphics init – note that everythi
Dear Intel graphics folks,
Am Freitag, den 30.05.2014, 13:45 +0200 schrieb Paul Menzel:
> since commit 17fec8a0 [1]
>
> drm/i915: Use Graphics Base of Stolen Memory on all gen3+
>
> Linux reads the register BSM (Base of Stolen Memory) directly to get the
> base address of graphics sto
On Thu, 2014-05-29 at 14:11 -0700, Jesse Barnes wrote:
> From: Kristen Carlson Accardi
>
> We want to make sure everything is disabled and at its lowest power when
> freezing.
>
> Signed-off-by: Kristen Carlson Accardi
> Signed-off-by: Jesse Barnes
Looks ok to me:
Reviewed-by: Imre Deak
> -
On Thu, 2014-05-29 at 14:11 -0700, Jesse Barnes wrote:
> From: Kristen Carlson Accardi
>
> This allows the system to enter the lowest power mode during system freeze.
>
> Signed-off-by: Jesse Barnes
> ---
> drivers/gpu/drm/i915/i915_drv.c | 3 ---
> drivers/gpu/drm/i915/intel_drv.h | 1 +
>
Fallout from
commit 46470fc932ac8a0e8317a220b3f4ea4ed903338e
Author: Mika Kuoppala
Date: Wed May 21 19:01:06 2014 +0300
drm/i915: Add null state batch to active list
undid the earlier fix of only marking the ctx as initialised after it is
saved by the hardware during a SET_CONTEXT operati
It is possible for userspace to create a big object large enough for a
256x256, and then switch over to using it as a 64x64 cursor. This
requires the cursor update routines to check for a change in width on
every update, rather than just when the cursor is originally enabled.
This also fixes an is
On Thu, 2014-05-29 at 14:11 -0700, Jesse Barnes wrote:
> From: Kristen Carlson Accardi
>
> This matches the runtime suspend paths and allows the system to enter
> the lowest power mode at freeze time.
>
> Signed-off-by: Kristen Carlson Accardi
> Signed-off-by: Jesse Barnes
> ---
> drivers/gpu
On Thu, 2014-05-29 at 14:11 -0700, Jesse Barnes wrote:
> From: Kristen Carlson Accardi
>
> This indicates to the firmware that it can power down various other
> components or bring them back up, depending on the target system state.
>
> Signed-off-by: Kristen Carlson Accardi
> Signed-off-by: Je
Re-define MIPI register definitions in such a way that most of
the existing DSI code can be re-used for future platforms. Register
definitions are re-written using MMIO offset variable, so that without
changing the existing sequence, same code can be generically applied.
V4: Addressing review comm
Conceptually, the MIPI registers are addressed by the MIPI transcoder
index, not the pipe. It doesn't matter right now, because there's a
1:1 relationship between pipes and MIPI transcoders, but that change
allows us to break that link in the future
V1: Created new patch to address Damien's review
On Fri, May 30, 2014 at 08:12:34PM +0530, Shashank Sharma wrote:
> Re-define MIPI register definitions in such a way that most of
> the existing DSI code can be re-used for future platforms. Register
> definitions are re-written using MMIO offset variable, so that without
> changing the existing se
On Fri, 30 May 2014 15:54:37 +0300
Imre Deak wrote:
> On Thu, 2014-05-29 at 14:11 -0700, Jesse Barnes wrote:
> > From: Kristen Carlson Accardi
> >
> > This allows the system to enter the lowest power mode during system freeze.
> >
> > Signed-off-by: Jesse Barnes
> > ---
> > drivers/gpu/drm/i
On Fri, May 30, 2014 at 08:32:20AM -0700, Jesse Barnes wrote:
> But I can split that out if there's a reason to. Seems like we do a
> bit too much teardown at suspend these days (like tearing down opregion
> state), I'd like to trim it back if possible and share between runtime
> and system suspen
Long ago, back in the racy haydays of 915gm interrupt handling, page
flips would occasionally go astray and leave the hardware stuck, and the
display not updating. This annoyed people who relied on their systems
being able to display continuously updating information 24/7, and so
some code to detec
If we hit a vblank and see that have a pageflip queue but not yet
processed, ensure that the GPU is running at maximum in order to clear
the backlog. Pageflips are only queued for the following vblank, if we
miss it, there will be a visible stutter. Boosting the GPU frequency
doesn't prevent us fro
If we successfully confuse the hardware, and cause it to drop a queued
pageflip, we wait for 60s and issue a warning before continuing on with
the modeset. However, this leaves the pending pageflip still stuck
indefinitely. Pretend to userspace that it does complete, and let us
start afresh followi
On Fri, May 30, 2014 at 02:16:30PM +0100, Chris Wilson wrote:
> Fallout from
>
> commit 46470fc932ac8a0e8317a220b3f4ea4ed903338e
> Author: Mika Kuoppala
> Date: Wed May 21 19:01:06 2014 +0300
>
> drm/i915: Add null state batch to active list
>
> undid the earlier fix of only marking the c
On Fri, May 30, 2014 at 10:44:53AM -0700, Ben Widawsky wrote:
> On Fri, May 30, 2014 at 02:16:30PM +0100, Chris Wilson wrote:
> > Fallout from
> >
> > commit 46470fc932ac8a0e8317a220b3f4ea4ed903338e
> > Author: Mika Kuoppala
> > Date: Wed May 21 19:01:06 2014 +0300
> >
> > drm/i915: Add nu
Now that we can queue CRTC enable/disable calls for later, we can allow
userspace mode sets to return immediately. This may mean that userspace
will draw into a buffer that's not yet displayed (which is fine) or that
it may draw into a buffer it thinks is no longer displayed (which could
lead to s
This lets us return to userspace more quickly and should improve init
and suspend/resume times as well, allowing us to return to userspace
sooner.
This was initially motivated by slow resume time on some machines with
very long panel power sequencing times, and it should also improve boot
time whe
On Fri, 30 May 2014 16:40:27 +0100
Chris Wilson wrote:
> On Fri, May 30, 2014 at 08:32:20AM -0700, Jesse Barnes wrote:
> > But I can split that out if there's a reason to. Seems like we do a
> > bit too much teardown at suspend these days (like tearing down opregion
> > state), I'd like to trim
On Fri, 30 May 2014 16:37:53 +0300
Imre Deak wrote:
> On Thu, 2014-05-29 at 14:11 -0700, Jesse Barnes wrote:
> > From: Kristen Carlson Accardi
> >
> > This matches the runtime suspend paths and allows the system to enter
> > the lowest power mode at freeze time.
> >
> > Signed-off-by: Kristen
From: Kristen Carlson Accardi
This matches the runtime suspend paths and allows the system to enter
the lowest power mode at freeze time.
v2: move disable_pc8 call to thaw_early (Imre)
move enable_pc8 to freeze_late (Imre/Jesse)
Signed-off-by: Kristen Carlson Accardi
Signed-off-by: Jesse B
From: Kristen Carlson Accardi
This allows the system to enter the lowest power mode during system freeze.
v2: delete force wake timer at suspend (Imre)
Signed-off-by: Kristen Carlson Accardi
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_drv.c | 4 +---
drivers/gpu/drm/i915/inte
From: Kristen Carlson Accardi
This matches the runtime suspend paths and allows the system to enter
the lowest power mode at freeze time.
v2: move disable_pc8 call to thaw_early (Imre)
move enable_pc8 to freeze_late (Imre/Jesse)
v3: drop spurious hunk from _freeze now that we have freeze_lat
On Fri, May 30, 2014 at 11:05:21AM -0700, Jesse Barnes wrote:
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index e2bfdda..e7fa84f 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -530,7 +530,7 @@ static int i915_drm_fr
From: Kristen Carlson Accardi
This matches the runtime suspend paths and allows the system to enter
the lowest power mode at freeze time.
v2: move disable_pc8 call to thaw_early (Imre)
move enable_pc8 to freeze_late (Imre/Jesse)
v3: drop spurious hunk from _freeze now that we have freeze_lat
On Fri, 30 May 2014 19:47:56 +0100
Chris Wilson wrote:
> On Fri, May 30, 2014 at 11:05:21AM -0700, Jesse Barnes wrote:
> > diff --git a/drivers/gpu/drm/i915/i915_drv.c
> > b/drivers/gpu/drm/i915/i915_drv.c
> > index e2bfdda..e7fa84f 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.c
> > +++ b/driv
On Fri, May 30, 2014 at 11:05:21AM -0700, Jesse Barnes wrote:
> @@ -8166,6 +8296,8 @@ static int intel_crtc_cursor_move(struct drm_crtc
> *crtc, int x, int y)
> intel_crtc->cursor_x = clamp_t(int, x, SHRT_MIN, SHRT_MAX);
> intel_crtc->cursor_y = clamp_t(int, y, SHRT_MIN, SHRT_MAX);
>
On Fri, May 30, 2014 at 11:05:21AM -0700, Jesse Barnes wrote:
> +static void intel_queue_crtc_enable(struct drm_crtc *crtc)
> +{
> + struct drm_device *dev = crtc->dev;
> + struct drm_i915_private *dev_priv = dev->dev_private;
> + struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> +
On Fri, 30 May 2014 15:48:23 +0300
Imre Deak wrote:
> On Thu, 2014-05-29 at 14:11 -0700, Jesse Barnes wrote:
> > From: Kristen Carlson Accardi
> >
> > We want to make sure everything is disabled and at its lowest power when
> > freezing.
> >
> > Signed-off-by: Kristen Carlson Accardi
> > Sign
On Thu, 29 May 2014 14:11:35 -0700
Jesse Barnes wrote:
> From: Kristen Carlson Accardi
Imre is the author.
>
> This allows the system to enter the lowest power mode during system freeze.
>
> Signed-off-by: Jesse Barnes
> ---
> drivers/gpu/drm/i915/i915_drv.c | 3 ---
> drivers/gpu/drm/i9
On Fri, 30 May 2014 19:56:22 +0100
Chris Wilson wrote:
> On Fri, May 30, 2014 at 11:05:21AM -0700, Jesse Barnes wrote:
> > +static void intel_queue_crtc_enable(struct drm_crtc *crtc)
> > +{
> > + struct drm_device *dev = crtc->dev;
> > + struct drm_i915_private *dev_priv = dev->dev_private;
>
On Thu, 29 May 2014 14:11:36 -0700
Jesse Barnes wrote:
> From: Kristen Carlson Accardi
This one was based on a patch from Imre - I just added the D0 on
the resume path.
>
> This indicates to the firmware that it can power down various other
> components or bring them back up, depending on the
On Friday, May 30, 2014 11:29:15 AM Jesse Barnes wrote:
> On Fri, 30 May 2014 16:37:53 +0300
> Imre Deak wrote:
>
> > On Thu, 2014-05-29 at 14:11 -0700, Jesse Barnes wrote:
> > > From: Kristen Carlson Accardi
> > >
> > > This matches the runtime suspend paths and allows the system to enter
> >
On Fri, 30 May 2014 23:12:45 +0200
"Rafael J. Wysocki" wrote:
> On Friday, May 30, 2014 11:29:15 AM Jesse Barnes wrote:
> > On Fri, 30 May 2014 16:37:53 +0300
> > Imre Deak wrote:
> >
> > > On Thu, 2014-05-29 at 14:11 -0700, Jesse Barnes wrote:
> > > > From: Kristen Carlson Accardi
> > > >
>
This lets us return to userspace more quickly and should improve init
and suspend/resume times as well, allowing us to return to userspace
sooner.
This was initially motivated by slow resume time on some machines with
very long panel power sequencing times, and it should also improve boot
time whe
On Fri, May 30, 2014 at 02:28:52PM -0700, Jesse Barnes wrote:
> @@ -10326,7 +10466,7 @@ static int __intel_set_mode(struct drm_crtc *crtc,
>
> for_each_intel_crtc_masked(dev, prepare_pipes, intel_crtc) {
> if (intel_crtc->base.enabled)
> - dev_priv->display
On Fri, 30 May 2014 23:02:18 +0100
Chris Wilson wrote:
> On Fri, May 30, 2014 at 02:28:52PM -0700, Jesse Barnes wrote:
> > @@ -10326,7 +10466,7 @@ static int __intel_set_mode(struct drm_crtc *crtc,
> >
> > for_each_intel_crtc_masked(dev, prepare_pipes, intel_crtc) {
> > if (inte
From: Tom O'Rourke
Add Broadwell support to i915_frequency_info
and extend i915_max|min_freq_get|set to (gen >= 6).
v2: generalized support for i915_max|min_freq_get|set (Daniel).
Signed-off-by: Tom O'Rourke
---
drivers/gpu/drm/i915/i915_debugfs.c | 16 +---
1 file changed, 9 in
>On Wed, Apr 30, 2014 at 02:14:02PM -0700, Kristen Carlson Accardi wrote:
>> On Thu, 01 May 2014 00:03:15 +0300
>> Imre Deak wrote:
>>
>> > On Wed, 2014-04-30 at 13:41 -0700, Ben Widawsky wrote:
>> > > On Wed, Apr 30, 2014 at 01:34:36PM -0700, Kristen Carlson Accardi wrote:
>> > > > On Tue, 29 Apr
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