Since we only count hangs towards the owner of the fd issuing the
command, we can allow that fd to inspect its own default context without
leaking global information. We introduced per-fd accounting with
commit 0eea67eb26000657079b7fc41079097942339452
Author: Ben Widawsky
Date: Fri Dec 6 14:11:
On Mon, Apr 28, 2014 at 05:18:28PM -0700, Ben Widawsky wrote:
> All the rest of the code to enable this is in my branch. Without my
> branch, hitting > 32b offsets is impossible. The code has always
> "supported" 64b, but it's never actually been run of tested. This change
> doesn't actually fix an
On Mon, Apr 28, 2014 at 06:43:04PM -0700, Ben Widawsky wrote:
> v2: 0 pad the new 8B fields or else intel_error_decode has a hard time.
> Note, regardless we need an igt update.
We should decide whether to use 0001 or 0001
and be consistent.
-Chris
--
Chris Wilson, Intel
On Mon, Apr 28, 2014 at 07:29:25PM -0700, Ben Widawsky wrote:
> Previously, our code only had a 32b offset value for where the
> batchbuffer starts. With full PPGTT, and 64b canonical GPU address
> space, that is an insufficient value. The code to expand is pretty
> straight forward, and only one p
On Fri, Apr 18, 2014 at 08:27:03AM +0100, Chris Wilson wrote:
> A single object may be referenced by multiple registers fundamentally
> breaking the static allotment of ids in the current design. When the
> object is used the second time, the physical address of the first
> assignment is relinquish
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Chris Wilson
> Sent: Thursday, May 01, 2014 9:13 AM
> To: Widawsky, Benjamin
> Cc: Intel GFX
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: Support 64b execbuf
>
> On Mon, Apr 28, 2014 at 0
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of ville.syrj...@linux.intel.com
> Sent: Wednesday, April 09, 2014 11:28 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 01/71] drm/i915/chv: IS_BROADWELL() should
> no
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of ville.syrj...@linux.intel.com
> Sent: Wednesday, April 09, 2014 11:28 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 02/71] drm/i915/chv: Add IS_CHERRYVIEW()
> ma
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of ville.syrj...@linux.intel.com
> Sent: Wednesday, April 09, 2014 11:28 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 03/71] drm/i915/chv: PPAT setup for Cherryview
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of ville.syrj...@linux.intel.com
> Sent: Wednesday, April 09, 2014 11:28 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 05/71] drm/i915/chv: Enable aliasing PPGTT fo
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of ville.syrj...@linux.intel.com
> Sent: Wednesday, April 09, 2014 11:28 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 06/71] drm/i915/chv: Add PIPESTAT register bits
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of ville.syrj...@linux.intel.com
> Sent: Wednesday, April 09, 2014 11:28 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 07/71] drm/i915/chv: Add DPFLIPSTAT register
>
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of ville.syrj...@linux.intel.com
> Sent: Wednesday, April 09, 2014 11:28 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 08/71] drm/i915/chv: Add display interrupt
> re
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of ville.syrj...@linux.intel.com
> Sent: Wednesday, April 09, 2014 11:28 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 09/71] drm/i915/chv: Add DPINVGTT registers
>
On Thu, May 01, 2014 at 08:18:44AM +0100, Chris Wilson wrote:
> Since we only count hangs towards the owner of the fd issuing the
> command, we can allow that fd to inspect its own default context without
> leaking global information. We introduced per-fd accounting with
>
> commit 0eea67eb2600065
On Wed, Feb 26, 2014 at 04:41:41PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Allow userptr objects to be created and used via libdrm_intel.
>
> At the moment tiling and mapping to GTT aperture is not supported
> due hardware limitations across different generations and uncertainty
On Wed, Apr 30, 2014 at 02:14:02PM -0700, Kristen Carlson Accardi wrote:
> On Thu, 01 May 2014 00:03:15 +0300
> Imre Deak wrote:
>
> > On Wed, 2014-04-30 at 13:41 -0700, Ben Widawsky wrote:
> > > On Wed, Apr 30, 2014 at 01:34:36PM -0700, Kristen Carlson Accardi wrote:
> > > > On Tue, 29 Apr 2014
"Restriction :
The offset must be greater than 4K bytes, avoiding the first 4KB of
stolen memory."
Since it looks like we currently allocate an overlay out of stolen
before we get the compressed framebuffer, I believe this is not
currently an issue which fixes anything. We simply want to make the
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