From: Akash Goel
This workaround is needed on VLV for the HW context feature.
It is used after adding the mi_set_context command in ring buffer
for Hw context switch. As per the spec
"The software must send a pipe_control with a CS stall and a post sync
operation and then a dummy DRAW after every
From: Akash Goel
This adds support for a write-enable bit in the entry of GTT.
This is handled via a read-only flag in the GEM buffer object which
is then used to see how to set the bit when writing the GTT entries.
Currently by default the Batch buffer & Ring buffers are marked as read only.
v2
Am Freitag, den 07.02.2014, 09:46 +0100 schrieb Daniel Vetter:
> On Thu, Feb 06, 2014 at 11:29:34PM +0100, Thomas Meyer wrote:
> > Am Dienstag, den 04.02.2014, 21:17 +0100 schrieb Daniel Vetter:
> > > On Tue, Feb 04, 2014 at 08:37:02PM +0100, Thomas Meyer wrote:
> > > >
> > > > Hi,
> > > >
> > >
On Sat, Feb 8, 2014 at 12:51 PM, Thomas Meyer wrote:
> Am Freitag, den 07.02.2014, 09:46 +0100 schrieb Daniel Vetter:
>> On Thu, Feb 06, 2014 at 11:29:34PM +0100, Thomas Meyer wrote:
>> > Am Dienstag, den 04.02.2014, 21:17 +0100 schrieb Daniel Vetter:
>> > > On Tue, Feb 04, 2014 at 08:37:02PM +010
>> As Chris said, instead of rolling your own code to track when flips are
>> emitted to the ring, simply add a real request (with the add_request
>> function)
>> like the execbuf paths. Then add any additional trackin you need to our
>> request structure.
>> -Daniel
I am really sorry, but I a
On Fri, Feb 07, 2014 at 12:14:47PM -0800, Kenneth Graunke wrote:
> On 02/04/2014 11:59 AM, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > According to Bspec we need to disable SF pipelined attribute fetch
> > whenever SF outputs exceed 16 and normal clip mode is used. A quic
Am Samstag, den 08.02.2014, 17:38 +0100 schrieb Daniel Vetter:
> On Sat, Feb 8, 2014 at 12:51 PM, Thomas Meyer wrote:
> > Am Freitag, den 07.02.2014, 09:46 +0100 schrieb Daniel Vetter:
> >> On Thu, Feb 06, 2014 at 11:29:34PM +0100, Thomas Meyer wrote:
> >> > Am Dienstag, den 04.02.2014, 21:17 +010
On Sat, Feb 08, 2014 at 06:28:03PM +0100, Daniel Vetter wrote:
> On Fri, Feb 07, 2014 at 12:14:47PM -0800, Kenneth Graunke wrote:
> > On 02/04/2014 11:59 AM, ville.syrj...@linux.intel.com wrote:
> > > From: Ville Syrjälä
> > >
> > > According to Bspec we need to disable SF pipelined attribute fet
On Sat, Feb 8, 2014 at 8:06 PM, Paul Bolle wrote:
> 0) Booting v3.14-rc1 on an (outdated) ThinkPad X41 triggers a kernel
> error:
> pci :00:02.0: can't ioremap flush page - no chipset flushing
>
> That is this pci device:
> lspci | grep 00:02.0
> 00:02.0 VGA compatible controller
"Goel, Akash" writes:
>>> What happens when we GTT-mapped write a batchbuffer that had
> previously been silently made RO by the kernel? Does the CPU take a
> fault? We tested this particular case, doing the relocation inside
> the Batch buffer, which is mapped to GTT as read-only, from the
> e
Daniel Vetter schreef op za 08-02-2014 om 20:59 [+0100]:
> Hm, if this is really a regression between 3.13 and 3.14-rc1 then I
> don't see any quick candidates - relevant functions in intel-gtt.c
> seem unchanged.
>
> So probably a bisect is what we need here. Note that this could also
> be due to
On Sat, Feb 8, 2014 at 9:22 PM, Paul Bolle wrote:
> Daniel Vetter schreef op za 08-02-2014 om 20:59 [+0100]:
>> Hm, if this is really a regression between 3.13 and 3.14-rc1 then I
>> don't see any quick candidates - relevant functions in intel-gtt.c
>> seem unchanged.
>>
>> So probably a bisect is
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