On Fri, Feb 07, 2014 at 03:58:46PM +0200, Jani Nikula wrote:
> On Wed, 29 Jan 2014, bradley.d.vol...@intel.com wrote:
> > +static int valid_reg(const u32 *table, int count, u32 addr)
> > +{
> > + if (table && count != 0) {
> > + int i;
> > +
> > + for (i = 0; i < count; i++) {
When cycling throuth planes, we still want to reach the cursor plane. We
have to special case IGT_PLANE_CURSOR as a shorthand to select the
cursor plane (the last plane on the pipe).
Signed-off-by: Damien Lespiau
---
lib/igt_kms.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Fri, Feb 07, 2014 at 07:15:05PM +0530, sagar.a.kam...@intel.com wrote:
> From: Sagar Kamble
>
> These patches will enable 180 degree rotation for CRTC and Sprite planes.
> Changelog:
> 1. drm/i915: Add 180 degree primary plane rotation support
> Addressed review comments for CRTC rotation from
On Fri, Feb 07, 2014 at 04:52:30PM +0200, Ville Syrjälä wrote:
> On Fri, Feb 07, 2014 at 08:44:14AM -0600, Jeff McGee wrote:
> > On Fri, Feb 07, 2014 at 11:15:15AM +0100, Daniel Vetter wrote:
> > > On Fri, Feb 7, 2014 at 10:33 AM, Chris Wilson
> > > wrote:
> > > > On Fri, Feb 07, 2014 at 10:03:33
B-spec says the FIFO total size is 512. So fix this to 512.
Signed-off-by: Vijay Purushothaman
---
drivers/gpu/drm/i915/i915_reg.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index cc3ea04..fb73031 10064
Each invocation of va_copy() must be matched by a corresponding
invocation of va_end() in the same function.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gpu_error.c |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/
On Fri, Feb 07, 2014 at 05:32:06PM +0200, Imre Deak wrote:
> I just realized it's a different issue, since it's on the init path.
> Also we set the drm device as the parent for the sdvo i2c adapter as
> opposed to the dp i2c adapter where it's the connector device. So the
> above patch won't help i
On Fri, Feb 07, 2014 at 05:40:50PM +0200, Mika Kuoppala wrote:
> Each invocation of va_copy() must be matched by a corresponding
> invocation of va_end() in the same function.
>
> Signed-off-by: Mika Kuoppala
Reviewed-by: Chris Wilson
Though it looks like it was my fauly anyway.
-Chris
--
Chr
On Fri, Feb 07, 2014 at 03:50:51PM +, Chris Wilson wrote:
> On Fri, Feb 07, 2014 at 05:40:50PM +0200, Mika Kuoppala wrote:
> > Each invocation of va_copy() must be matched by a corresponding
> > invocation of va_end() in the same function.
> >
> > Signed-off-by: Mika Kuoppala
> Reviewed-by: C
On Fri, Feb 07, 2014 at 08:43:12PM +0530, Vijay Purushothaman wrote:
> B-spec says the FIFO total size is 512. So fix this to 512.
>
> Signed-off-by: Vijay Purushothaman
> ---
> drivers/gpu/drm/i915/i915_reg.h |2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/g
On Fri, Feb 7, 2014 at 7:51 AM, Chris Wilson wrote:
> On Thu, Feb 06, 2014 at 07:46:38PM -0200, Rodrigo Vivi wrote:
>> Update XY_COLOR_BLT command for Broadwell.
>>
>> v2: stash devid and remove ugly double allocation. (by Chris).
>> v3: fix inverted blt command size and stash fd, devid and intel_
Hi all,
New -testing cycle with cool stuff:
- Yet more steps towards atomic modeset from Ville.
- DP panel power sequencing improvements from Paulo.
- irq code cleanups from Ville.
- 5.4 GHz dp lane clock support for bdw/hsw from Todd.
- Clock readout support for hsw/bdw (aka fastboot) from Jesse.
On Fri, Feb 07, 2014 at 02:04:56PM -0200, Rodrigo Vivi wrote:
> >> for (i = 0; i < 20; i++) {
> >> - *b++ = XY_COLOR_BLT_CMD_NOLEN | 4 |
> >> - COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB;
> >> + if (data->intel_gen >= 8) {
> >> +
On 2/7/2014 9:28 PM, Ville Syrjälä wrote:
On Fri, Feb 07, 2014 at 08:43:12PM +0530, Vijay Purushothaman wrote:
B-spec says the FIFO total size is 512. So fix this to 512.
Signed-off-by: Vijay Purushothaman
---
drivers/gpu/drm/i915/i915_reg.h |2 +-
1 file changed, 1 insertion(+), 1 dele
Update XY_COLOR_BLT command for Broadwell.
v2: stash devid and remove ugly double allocation. (by Chris).
v3: fix inverted blt command size and stash fd, devid and intel_gen.
v4: improved len calculation and noop between blt commands. (by Chris).
Cc: Chris Wilson ch...@chris-wilson.co.uk>
Signed-
On Fri, 2014-02-07 at 16:49 +0100, Borislav Petkov wrote:
> On Fri, Feb 07, 2014 at 05:32:06PM +0200, Imre Deak wrote:
> > I just realized it's a different issue, since it's on the init path.
> > Also we set the drm device as the parent for the sdvo i2c adapter as
> > opposed to the dp i2c adapter
The following patches fix various issues in intel-gpu-tools that were found by
static analysis and compiler warnings.
Thomas Wood (3):
debugger: fix the -p option
assembler: fix condition for printing a warning
tests/gem_seqno_wrap: fix over allocation of buffers
assembler/gram.y | 2
Signed-off-by: Thomas Wood
---
tests/gem_seqno_wrap.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tests/gem_seqno_wrap.c b/tests/gem_seqno_wrap.c
index 40c6227..e37365f 100644
--- a/tests/gem_seqno_wrap.c
+++ b/tests/gem_seqno_wrap.c
@@ -207,13 +207,13 @@ static int
Signed-off-by: Thomas Wood
---
debugger/eudb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/debugger/eudb.c b/debugger/eudb.c
index ff77e42..4cbc2d7 100644
--- a/debugger/eudb.c
+++ b/debugger/eudb.c
@@ -538,7 +538,7 @@ int main(int argc, char* argv[]) {
}
Signed-off-by: Thomas Wood
---
assembler/gram.y | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/assembler/gram.y b/assembler/gram.y
index ad4cb29..f4145bd 100644
--- a/assembler/gram.y
+++ b/assembler/gram.y
@@ -351,7 +351,7 @@ static bool validate_src_reg(struct brw_program_i
On Wed, Feb 05, 2014 at 05:04:31PM -0200, Rodrigo Vivi wrote:
> This patch adds PSR Support to Baytrail.
>
> Baytrail cannot easily detect screen updates and force PSR exit.
> So we inactivate it on {busy_ioctl, set_domain, sw_finish and mark_busy}
> and update to enable it back on next display ma
> [PATCH i-g-t 3/3] tests/gem_seqno_wrap: fix over allocation of buffers
For clarity, this should probably be "fix over allocation of arrays",
since the arrays were being allocated as an array of buffers instead
of an array of pointers to buffers.
Regards,
Thomas
The goal of that series is to introduce a small mode setting API to write our
KMS tests, port kms_pipe_crc_basic and kms_cursor_crc to it and introduce a
new kms_plane test. To be more precise, the goals are:
- Fewer lines per test,
- Be able to switch between a "legacy" backend and an "atomic
As pointed out by Ville we were using inverted logic here.
According to spec:
For link standby mode set 170h[1] = 1.
For full link disabling set 170h[1] = 0.
Cc: Ville Syrjälä
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_dp.c | 8
1 file changed, 4 insertions(+), 4 deleti
On the current structure HSW doesn't support PSR with sprites enabled
but sprites can be enabled after PSR was enabled what would cause
user to miss screen updates.
Cc: Ville Syrjälä
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_sprite.c | 2 ++
1 file changed, 2 insertions(+)
dif
On Fri, Feb 07, 2014 at 05:58:16PM +0200, Ville Syrjälä wrote:
> On Fri, Feb 07, 2014 at 08:43:12PM +0530, Vijay Purushothaman wrote:
> > B-spec says the FIFO total size is 512. So fix this to 512.
> >
> > Signed-off-by: Vijay Purushothaman
> > ---
> > drivers/gpu/drm/i915/i915_reg.h |2 +-
>
On Fri, Feb 07, 2014 at 04:09:48PM -0200, Rodrigo Vivi wrote:
> On the current structure HSW doesn't support PSR with sprites enabled
> but sprites can be enabled after PSR was enabled what would cause
> user to miss screen updates.
>
> Cc: Ville Syrjälä
> Signed-off-by: Rodrigo Vivi
Have you c
Reviewed-by: Mika Kuoppala
Reviewed-by: Ville Syrjälä
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/i915_drv.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 36ea189..80ff7df 100644
--- a/d
We had 2 set of defines for the same register, so make it one.
Reviewed-by: Mika Kuoppala
Reviewed-by: Ville Syrjälä
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/i915_reg.h | 18 --
drivers/gpu/drm/i915/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/intel_display.
If we can't actually determine at run-time we have a fused-off display,
provide at least an option to disable it.
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/i915_dma.c| 3 ++-
drivers/gpu/drm/i915/i915_drv.h| 1 +
drivers/gpu/drm/i915/i915_params.c | 4
3 files changed,
FUSE_STRAP has a bit to inform us that the display has been fused off.
Use it to setup the definitive number of pipes at run-time.
v2: actually tweak num_pipes, not num_planes
v3: also tests SFUSE_STRAP bit 7
v4: rebase on top of drm-nightly
use DRM_INFO() for the message telling display is fu
Turns out it'd be nice to change some device information at run-time or simply
have some code to fill in the info struct instead of having to declare the
values in 30+ structures.
What prompted this change is handling fused out display/pipe and tweaking
num_pipes at run-time, but I'm quite sure we
And rename it to num_sprites as this value doesn't count the primary
plane.
This limit lives with num_pipes really, and now that dev_priv->info is
writable we can put it there instead.
While at it, introduce a intel_device_info_runtime_init() where we'll be
able to gather the device info fields a
Follow up of v4:
http://lists.freedesktop.org/archives/intel-gfx/2014-January/037913.html
The major changes are:
- we try to be cunning on CPT/PPT and look at the fuses lock bit of
SFUSE_STRAP to detect if PCH display reads are being dropped
- we provide a module parameter to forcefully
If we make sure that all the dev_priv->info usages are wrapped by
INTEL_INFO(), we can easily modify the ->info field to be structure and
not a pointer while keeping the const protection in the INTEL_INFO()
macro.
v2: Rebased onto latest drm-nightly
Suggested-by: Ville Syrjälä
Signed-off-by: Dam
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/i915_drv.h | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 80ff7df..b1e91c3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/
On Fri, Feb 07, 2014 at 04:09:48PM -0200, Rodrigo Vivi wrote:
> On the current structure HSW doesn't support PSR with sprites enabled
> but sprites can be enabled after PSR was enabled what would cause
> user to miss screen updates.
>
> Cc: Ville Syrjälä
> Signed-off-by: Rodrigo Vivi
> ---
> dr
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