On Mon, Jan 20, 2014 at 03:54:59PM -0800, Jesse Barnes wrote:
> Just like we have for connector type etc.
Then we might as well take a similar defensive approach if we want to
expand the number of contexts we call it from.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_
With 20+ module parameters, I think referring to them via a struct
improves clarity over just having a bunch of globals. While at it, move
the parameter initialization and definitions into a new file
i915_params.c to reduce clutter in i915_drv.c.
Apart from the ill-named i915_enable_rc6, i915_enab
It's unused, and nowadays specifying unknown parameters no longer
prevents modules from being loaded.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.c |3 ---
drivers/gpu/drm/i915/i915_drv.h |1 -
2 files changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c
Hi Dave,
A few drm core patches that haven't shown up in drm-next yet. All reviewed
and the first 4 tested for a few weeks in drm-intel-nightly - I've quickly
slapped the gem object init patch on top for convenience just today.
Please pull or pick up the patches from the m-l.
Cheers, Daniel
Th
On Mon, Jan 20, 2014 at 10:19:39AM -0700, Todd Previte wrote:
> For HSW+ platforms, enable the 5.4Ghz (HBR2) link rate for devices that
> support it. The
> sink device must report that is supports Displayport 1.2 and the HBR2 bit
> rate in the
> DPCD in order to use HBR2.
>
> Signed-off-by: Todd
On Tue, Jan 21, 2014 at 11:24:24AM +0200, Jani Nikula wrote:
> It's unused, and nowadays specifying unknown parameters no longer
> prevents modules from being loaded.
>
> Signed-off-by: Jani Nikula
Queued for -next, thanks for the patch.
-Daniel
> ---
> drivers/gpu/drm/i915/i915_drv.c |3 --
On Mon, Jan 20, 2014 at 9:30 PM, Chris Wilson wrote:
> On Mon, Jan 20, 2014 at 10:17:36AM +, Chris Wilson wrote:
>> On older generations (gen2, gen3) the GPU requires fences for many
>> operations, such as blits. The display hardware also requires fences for
>> scanouts and this leads to a sit
On Tue, Jan 21, 2014 at 10:32:50AM +0100, Daniel Vetter wrote:
> On Mon, Jan 20, 2014 at 9:30 PM, Chris Wilson
> wrote:
> > The testcase is only for the trivial reproduction scenario, not the more
> > sporadic situation involving a slightly hungry workqueue, but it is
> > enough to demonstrate th
On Mon, 20 Jan 2014, Damien Lespiau wrote:
> A tiny clean-up to allow better code separation between platforms.
Should it also say "per-platform" instead of "per-product" in the
subject?
> Signed-off-by: Damien Lespiau
> ---
> drivers/gpu/drm/i915/intel_dp.c | 79
> ++
On Mon, 20 Jan 2014, Damien Lespiau wrote:
> Also, move that computation outside of the for loop that tries 5 times,
> this value doesn't change between tries.
Some general bikeshedding...
I really wish everyone would write commit messages that work independent
of the patch subject. Just like a
On Mon, 20 Jan 2014, Damien Lespiau wrote:
> So it's easier to compare what we program with the documentation, not
> having to jump at all.
This could be squashed into the previous patch just as well, but either
way,
Reviewed-by: Jani Nikula
> Signed-off-by: Damien Lespiau
> ---
> drivers/gp
On Mon, 20 Jan 2014, Damien Lespiau wrote:
> Signed-off-by: Damien Lespiau
Might be worth a mention this is prep work for something, as alone this
looks like a vfunc for the sake of vfunc...
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/intel_dp.c | 10 ++
> drivers/gpu/drm/
> -Original Message-
> From: intel-gfx-boun...@lists.freedesktop.org [mailto:intel-gfx-
> boun...@lists.freedesktop.org] On Behalf Of Chris Wilson
> Sent: Monday, January 20, 2014 10:18 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 1/2] drm/i915: Wait for completion
> From: intel-gfx-boun...@lists.freedesktop.org [mailto:intel-gfx-
> boun...@lists.freedesktop.org] On Behalf Of Chris Wilson
> Sent: Monday, January 20, 2014 10:18 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 2/2] drm/i915: Repeat evictions whilst pageflip
> completions a
On Tue, Jan 21, 2014 at 12:09:18PM +0200, Jani Nikula wrote:
> On Mon, 20 Jan 2014, Damien Lespiau wrote:
> > So it's easier to compare what we program with the documentation, not
> > having to jump at all.
>
> This could be squashed into the previous patch just as well, but either
> way,
I thin
On Mon, Jan 20, 2014 at 02:18:03PM -0800, Jesse Barnes wrote:
> Read out and calculate the port and pixel clocks on DDI configs as well.
> This means we have to grab the DP divider values and look at the port
> mapping to figure out which clock select reg to read out.
>
> v2: do the work from ddi_
On Tue, Jan 21, 2014 at 12:07:23PM +0200, Jani Nikula wrote:
>
> On Mon, 20 Jan 2014, Damien Lespiau wrote:
> > Also, move that computation outside of the for loop that tries 5 times,
> > this value doesn't change between tries.
>
> Some general bikeshedding...
>
> I really wish everyone would
On Tue, 21 Jan 2014, Damien Lespiau wrote:
> On Tue, Jan 21, 2014 at 12:07:23PM +0200, Jani Nikula wrote:
>> Some general bikeshedding...
>>
>> I really wish everyone would write commit messages that work independent
>> of the patch subject. Just like a newspaper article should make sense
>> and
On Tue, 2014-01-21 at 13:32 +0800, Aaron Lu wrote:
> On 01/21/2014 11:17 AM, Matthew Garrett wrote:
> > We know that Windows 8 graphics drivers don't use the ACPI interface,
> > and that systems change their behaviour as a result, in some cases with
> > absolutely no way for the ACPI interface coul
On Tue, Jan 21, 2014 at 11:03:43AM +, Bloomfield, Jon wrote:
> > From: intel-gfx-boun...@lists.freedesktop.org [mailto:intel-gfx-
> > boun...@lists.freedesktop.org] On Behalf Of Chris Wilson
> > Sent: Monday, January 20, 2014 10:18 AM
> > To: intel-gfx@lists.freedesktop.org
> > Subject: [Intel-
Dear audio and gfx stakeholders,
We hope to add a new interface between audio and gfx driver, for gfx driver to
notify audio about HDMI/DP hot-plug and ELD update.
Would you please share some comments on the proposal below?
Background of this issue: On Intel Haswell/Broadwell platforms, there is
On Mon, Jan 13, 2014 at 05:30:34PM +0200, Jani Nikula wrote:
> Since
> commit ee1452d7458451a7508e0663553ce88d63958157
> Author: Jani Nikula
> Date: Fri Sep 20 15:05:30 2013 +0300
>
> drm/i915: assume all GM45 Acer laptops use inverted backlight PWM
>
> failed and was later reverted in
> c
On Tue, Jan 21, 2014 at 1:35 PM, Lin, Mengdong wrote:
> Dear audio and gfx stakeholders,
>
>
>
> We hope to add a new interface between audio and gfx driver, for gfx driver
> to notify audio about HDMI/DP hot-plug and ELD update.
>
> Would you please share some comments on the proposal below?
>
>
_Actually_ add dri-devel ...
On Tue, Jan 21, 2014 at 2:10 PM, Daniel Vetter wrote:
> On Tue, Jan 21, 2014 at 1:35 PM, Lin, Mengdong wrote:
>> Dear audio and gfx stakeholders,
>>
>>
>>
>> We hope to add a new interface between audio and gfx driver, for gfx driver
>> to notify audio about HDMI/DP
On Sun, Jan 19, 2014 at 1:47 PM, Ramalingam C wrote:
> To remove the wait_for_vblank from the plane switch execution path,
> this change implements a function which will add a delayed work to
> defer the IPS enable.
>
> The delay is nothing but frame length, which is calculated based on
> vrefresh
A tiny clean-up to allow better code separation between platforms.
v2: Fix comment placement (put in in i9xx_get_aux_clock_divider()) and
nuke the outdated PCH eDP comment (Jani Nikula)
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/intel_dp.c | 74 -
We need a bit more flexibility here in the future, bits get shuffled
around.
v2: more descriptive commit message (Jani Nikula)
Reviewed-by: Jani Nikula
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/intel_dp.c | 10 ++
drivers/gpu/drm/i915/intel_drv.h | 8
2 files ch
From: Ville Syrjälä
Add a mechanism by which we can evade the leading edge of vblank. This
guarantees that no two sprite register writes will straddle on either
side of the vblank start, and that means all the writes will be latched
together in one atomic operation.
We do the vblank evade by che
From: Ville Syrjälä
Move the primary plane enable/disable to occur atomically with the
sprite update that caused the primary plane visibility to change.
FBC and IPS enable/disable is left to happen well before or after
the primary plane change.
v2: Pass intel_crtc instead of drm_crtc (Daniel)
From: Ville Syrjälä
Add trace points for observing the atomic pipe update mechanism.
v2: Rebased due to earlier changes
v3: Pass intel_crtc instead of drm_crtc (Daniel)
Reviewed-by: Jesse Barnes
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_trace.h | 77 +++
On Mon, Jan 20, 2014 at 06:40:24PM +0530, deepa...@intel.com wrote:
> From: Deepak S
>
> When current delay is already at max delay, Let's disable the PM UP
> THRESHOLD INTRRUPTS, so that we will not get further interrupts until
> current delay is less than max delay, Also request for the PM DOWN
On Mon, Jan 20, 2014 at 06:40:25PM +0530, deepa...@intel.com wrote:
> From: Deepak S
>
> When we enter RC6 and GFX Clocks are off, the voltage remains higher
> than Vmin. When we try to set the freq to RPe, it might fail since the
> Gfx clocks are down. So to fix this in Gfx idle, Bring the GFX c
A common issue we have is that retiring requests causes recursion
through GTT manipulation or page table manipulation which we can only
handle at very specific points. However, to maintain internal
consistency (enforced through our sanity checks on write_domain at
various points in the GEM object l
By exporting the ability to map user address and inserting PTEs
representing their backing pages into the GTT, we can exploit UMA in order
to utilize normal application data as a texture source or even as a
render target (depending upon the capabilities of the chipset). This has
a number of uses, w
>At this point we've not yet computed the final new_delay. It would seem better
>to me to put all this code to place where we have the final new_delay.
I agree we can add this after we have the final new_delay. We can add this in
two places one in gen6_pm_rps_work before we call valleyview_set_
lib/interval_tree.c provides a simple interface for an interval-tree
(an augmented red-black tree) but is only built when testing the generic
macros for building interval-trees. For drivers with modest needs,
export the simple interval-tree library as is.
Signed-off-by: Chris Wilson
Cc: Michel Le
On Mon, Jan 20, 2014 at 06:40:26PM +0530, deepa...@intel.com wrote:
> From: Deepak S
>
> With RC6 enabled, BYT has an HW issue in determining the right
> Gfx busyness.
> WA for Turbo + RC6: Use SW based Gfx busy-ness detection to decide
> on increasing/decreasing the freq. This logic will monitor
>We're not actually waiting for Punit here. Should we?
Ideally yes, we need to wait for the Punit to grant the freq. Based on your
suggestion on " vlv_update_rps_cur_delay" that the punit will recheck the
situation periodically, and it will try to use PUNIT_REG_GPU_FREQ_REQ. I
removed the wait
If we stop all the rings, we can end up blaming the innocent
rings on hangcheck.
Reference: https://bugs.freedesktop.org/show_bug.cgi?id=73652
Signed-off-by: Mika Kuoppala
---
tests/gem_reset_stats.c | 23 ---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/t
On Tue, 21 Jan 2014, Damien Lespiau wrote:
> A tiny clean-up to allow better code separation between platforms.
>
> v2: Fix comment placement (put in in i9xx_get_aux_clock_divider()) and
> nuke the outdated PCH eDP comment (Jani Nikula)
I'll take your word nothing else changed,
Reviewed-by:
These bits are in reverse order in the header from those defined in
the specification. Change the bit positions for ports B and D to
correctly match the spec.
---
drivers/gpu/drm/i915/i915_reg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h
On Tue, Jan 21, 2014 at 05:40:08PM +0200, Mika Kuoppala wrote:
> If we stop all the rings, we can end up blaming the innocent
> rings on hangcheck.
>
> Reference: https://bugs.freedesktop.org/show_bug.cgi?id=73652
> Signed-off-by: Mika Kuoppala
Merged, thanks for the patch.
-Daniel
> ---
> tes
On Tue, Jan 21, 2014 at 01:37:15PM +, Damien Lespiau wrote:
> We need a bit more flexibility here in the future, bits get shuffled
> around.
>
> v2: more descriptive commit message (Jani Nikula)
>
> Reviewed-by: Jani Nikula
> Signed-off-by: Damien Lespiau
Merged all to dinq, thanks for pat
On Tue, 21 Jan 2014, Todd Previte wrote:
> These bits are in reverse order in the header from those defined in
> the specification. Change the bit positions for ports B and D to
> correctly match the spec.
Your signed-off-by is missing. The git commit -s option will add it for
you.
> ---
> driv
These bits are in reverse order in the header from those defined in
the specification. Change the bit positions for ports B and D to
correctly match the spec.
- Added sign-off
Signed-off-by: Todd Previte
---
drivers/gpu/drm/i915/i915_reg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions
On Tue, Jan 21, 2014 at 10:22:31AM -0700, Todd Previte wrote:
> These bits are in reverse order in the header from those defined in
> the specification. Change the bit positions for ports B and D to
> correctly match the spec.
>
> - Added sign-off
>
> Signed-off-by: Todd Previte
>
> ---
> driv
On Tue, 21 Jan 2014, Todd Previte wrote:
> These bits are in reverse order in the header from those defined in
> the specification. Change the bit positions for ports B and D to
> correctly match the spec.
>
> - Added sign-off
And please also read the rest of my previous mail! :)
Jani.
>
> Sig
On Tue, Jan 21, 2014 at 06:45:54PM +0100, Daniel Vetter wrote:
> On Tue, Jan 21, 2014 at 10:22:31AM -0700, Todd Previte wrote:
> > These bits are in reverse order in the header from those defined in
> > the specification. Change the bit positions for ports B and D to
> > correctly match the spec.
>
On Thu, Jan 16, 2014 at 12:42:22AM +0100, Daniel Vetter wrote:
> On Wed, Jan 15, 2014 at 12:08:19PM -0800, Ben Widawsky wrote:
> > On Wed, Jan 15, 2014 at 09:45:28AM +0100, Daniel Vetter wrote:
> > > On Wed, Jan 15, 2014 at 9:39 AM, Daniel Vetter wrote:
> > > > On Wed, Jan 15, 2014 at 12:40 AM, Ru
Hi,
This small series introduces some infrastructure to support AUX channels
in a generic way. Drivers make use of it by embedding and filling in a
struct drm_dp_aux. Various helpers can then be used to for example read
from or write to the DPCD.
Patch 1 adds the basic infrastructure as well as a
The function reads the link status (6 bytes starting at offset 0x202)
from the DPCD so that it can be conveniently passed to other DPCD
helpers.
Reviewed-by: Alex Deucher
Reviewed-by: Jani Nikula
Signed-off-by: Thierry Reding
---
drivers/gpu/drm/drm_dp_helper.c | 16
include/d
Implements an I2C-over-AUX I2C adapter on top of the generic drm_dp_aux
infrastructure. It extracts the retry logic from existing drivers, which
should help in porting those drivers to this new helper.
Reviewed-by: Alex Deucher
Reviewed-by: Jani Nikula
Signed-off-by: Thierry Reding
---
Changes
On Fri, Jan 17, 2014 at 03:22:08PM +0200, Jani Nikula wrote:
> On Tue, 14 Jan 2014, Thierry Reding wrote:
[...]
> > +int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link)
> > +{
> > + u8 values[3];
> > + int err;
> > +
> > + memset(link, 0, sizeof(*link));
> > +
> > + err
Add a helper to probe a DP link (read out the supported DPCD revision,
maximum rate, link count and capabilities) as well as power up the DP
link and configure it accordingly.
Reviewed-by: Alex Deucher
Reviewed-by: Jani Nikula
Signed-off-by: Thierry Reding
---
Changes in v4:
- fix a couple of t
This is a superset of the current i2c_dp_aux bus functionality and can
be used to transfer native AUX in addition to I2C-over-AUX messages.
Helpers are provided to read and write the DPCD, either blockwise or
byte-wise. Many of the existing helpers for DisplayPort take a copy of a
portion of the D
The forcewake setup is eerily similar, except it needs special mode
flags. Inserting that info into our structure is trivial, and with that
forcewake easily converts to using the new interface as well.
Notice that CRC is lacking from this patch (CRC being very similar to
forcewake in code). CRC is
The debugfs helper duplicates the functionality used by Armada, so let's
just use that.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_debugfs.c | 25 -
1 file changed, 4 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/driver
DRM layer already provides a helper function to create a set of files
following a specific idiom primarily characterized by the access flags
of the file, and the file operations. This is great for writing concise
code to handle these very common cases.
This new helper function is provided to drive
At almost 800 lines of code, with almost a function per platform, this
code was cluttering up the existing debugfs file, which has
historically had fairly small functions.
Patch should have no functional changes.
Unfortunately, the patch Daniel requested of me for the DRM helper
doesn't fit well
On Tue, 21 Jan 2014 13:36:56 +0200
Ville Syrjälä wrote:
> > +static int intel_ddi_calc_wrpll_link(u32 wrpll)
> > +{
> > + int n, p, r;
> > +
> > + r = wrpll & WRPLL_DIVIDER_REF_MASK;
> > + p = (wrpll & WRPLL_DIVIDER_POST_MASK) >> WRPLL_DIVIDER_POST_SHIFT;
> > + n = (wrpll & WRPLL_DIVIDER_F
Read out and calculate the port and pixel clocks on DDI configs as well.
This means we have to grab the DP divider values and look at the port
mapping to figure out which clock select reg to read out.
v2: do the work from ddi_get_config (Ville)
v3: check WRPLL reference clock (Ville)
add addit
On Tue, 21 Jan 2014 09:05:04 +
Chris Wilson wrote:
> On Mon, Jan 20, 2014 at 03:54:59PM -0800, Jesse Barnes wrote:
> > Just like we have for connector type etc.
>
> Then we might as well take a similar defensive approach if we want to
> expand the number of contexts we call it from.
Since I
Just like we have for connector type etc.
v2: just return the string directly to avoid repeating the mistakes of
the past (Chris)
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/drm_crtc.c | 16
include/drm/drm_crtc.h | 1 +
2 files changed, 17 insertions(+)
diff --gi
On Tue, Jan 21, 2014 at 12:46:08PM -0800, Jesse Barnes wrote:
> On Tue, 21 Jan 2014 09:05:04 +
> Chris Wilson wrote:
>
> > On Mon, Jan 20, 2014 at 03:54:59PM -0800, Jesse Barnes wrote:
> > > Just like we have for connector type etc.
> >
> > Then we might as well take a similar defensive appr
On Tue, Jan 21, 2014 at 12:33:22PM -0800, Ben Widawsky wrote:
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1356,6 +1356,18 @@ struct intel_pipe_crc {
> wait_queue_head_t wq;
> };
>
> +struct pipe_crc_info {
> + const char *name;
> + struct d
On Tue, Jan 21, 2014 at 09:44:51PM +, Damien Lespiau wrote:
> We try to put display related things into intel_drv.h, it was in
> i915_drv.h because it was in debugfs.c. Also intel_drv.h and i915_drv.h
> are neatly separated by file, so it'd be nice to have a separate entry
> for intel_display_t
Nothing's changed here; we just need to bump the generation check.
Signed-off-by: Kenneth Graunke
---
drivers/gpu/drm/i915/intel_uncore.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915/intel_uncore.c
index 646fecf..
On Mon, Jan 20, 2014 at 05:14:23PM +0100, Daniel Vetter wrote:
> On Mon, Jan 20, 2014 at 09:06:40AM -0600, Jeff McGee wrote:
> > On Sun, Jan 19, 2014 at 02:49:19PM +0100, Daniel Vetter wrote:
> > > If it's not in the multi-test target group testrunners won't pick up
> > > on the fact that they need
From: Jeff McGee
Storing values avoids some unnecessary overhead but more importantly
allows all of our processing to be atomic.
Signed-off-by: Jeff McGee
---
tests/pm_rps.c | 98 ++
1 file changed, 51 insertions(+), 47 deletions(-)
diff
From: Jeff McGee
Fill out the subtest with more min/max combinations and check that
current frequency tracks with minimum after each perturbation.
Jeff McGee (4):
pm_rps: Expand on min and max config testing
pm_rps: Remove repeat sysfs reads
pm_rps: Make frequency logging more compact
pm
From: Jeff McGee
The current frequency should reach the minimum frequency within a
reasonable time during idle. We hold forcewake to prevent interference
from sleep states.
Signed-off-by: Jeff McGee
---
tests/pm_rps.c | 34 ++
1 file changed, 30 insertions(+), 4
From: Jeff McGee
Add a function that methodically varies min and max to exercise
several valid and invalid combinations. Allow the caller to
define what is to be checked between each step.
Signed-off-by: Jeff McGee
---
tests/pm_rps.c | 106 +-
From: Jeff McGee
Signed-off-by: Jeff McGee
---
tests/pm_rps.c | 35 ++-
1 file changed, 18 insertions(+), 17 deletions(-)
diff --git a/tests/pm_rps.c b/tests/pm_rps.c
index 37f7020..7ae0438 100644
--- a/tests/pm_rps.c
+++ b/tests/pm_rps.c
@@ -128,8 +128,9 @@ sta
This statenment became false here:
commit 4fc688ce79772496503d22263d61b071a8fb596e
Author: Jesse Barnes
Date: Fri Nov 2 11:14:01 2012 -0700
drm/i915: protect RPS/RC6 related accesses (including PCU) with a new mutex
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_drv.h | 2 --
On 01/21/2014 08:11 PM, Matthew Garrett wrote:
> On Tue, 2014-01-21 at 13:32 +0800, Aaron Lu wrote:
>> On 01/21/2014 11:17 AM, Matthew Garrett wrote:
>>> We know that Windows 8 graphics drivers don't use the ACPI interface,
>>> and that systems change their behaviour as a result, in some cases with
Hi all,
Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/i915_irq.c between commit abca9e454498 ("drm: Pass
'flags' from the caller to .get_scanout_position()") from the drm tree
and commit d59a63ad8234 ("drm/i915: Add intel_get_crtc_scanline()") from
the drm-i
Hi all,
Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/intel_display.c between commit c326c0a9c98c
("drm/i915: Call drm_calc_timestamping_constants() earlier") from the drm
tree and commit bbee18af2a25 ("drm/i915: Prepare to track new pipe config
per pipe") f
From: Akash Goel
Added 2 new rendering specific Workarounds
1. WaDisable_RenderCache_OperationalFlush
Operational flush cannot be enabled on
BWG A0 [Errata BWT006]
2. WaVSThreadDispatchOverride
Performance optimization - Hw will decide which
half slice the thread will dispatch
From: Akash Goel
The following patches leads to stable behavior on VLV, especially
when playing 3D Apps, benchmarks.
Akash Goel (6):
drm/i915/vlv: Added a rendering specific Hw WA
'WaTlbInvalidateStoreDataBefore'
drm/i915/vlv: Added a rendering specific Hw WA
'WaReadAfterWriteHazard'
From: Akash Goel
Added a new rendering specific Workaround 'WaReadAfterWriteHazard'.
In this WA, need to add 12 MI Store Dword commands to ensure proper
flush of h/w pipeline.
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 25 +
1 file changed,
From: Akash Goel
Removed 3 workarounds as not needed for VLV+(B0 onwards)
1. WaDisableRHWOOptimizationForRenderHang
2. WaDisableL3CacheAging
3. WaDisableDopClockGating
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/intel_pm.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/d
From: Akash Goel
Modified programming of following 2 regs in Render ring initialisation fn.
1. GFX_MODE_GEN7 (Enabling TLB invalidate)
2. MI_MODE (Enabling MI Flush)
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 19 ++-
1 file changed, 14 insertions(+)
From: Akash Goel
This workaround is needed on VLV for the HW context feature.
It is used after adding the mi_set_context command in ring buffer
for Hw context switch. As per the spec
"The software must send a pipe_control with a CS stall and a post sync
operation and then a dummy DRAW after every
From: Akash Goel
Added a new rendering specific Workaround 'WaTlbInvalidateStoreDataBefore'.
In this WA, before pipecontrol with TLB invalidate set, need to add 2 MI
Store data commands.
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 22 ++
1 file c
> -Original Message-
> From: intel-gfx-boun...@lists.freedesktop.org [mailto:intel-gfx-
> boun...@lists.freedesktop.org] On Behalf Of Antti Koskipaa
> Sent: Wednesday, January 15, 2014 5:26 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH] drm/i915: Clean up display
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