Hi Chris,
is this going into any drm-intel GIT tree?
I found it useful and saw it in your kernel-tree [1].
- Sedat -
[1]
http://cgit.freedesktop.org/~ickle/linux-2.6/commit/?id=bf91098a1232db771feac66f88720c181ef61967
On Wed, Aug 14, 2013 at 1:35 PM, Chris Wilson wrote:
> Chasing wild specula
Hi,
this is really cool!
Looking at this from [1]:
[ include/drm/i915_pciids.h ]
...
+#define INTEL_SNB_M_IDS(info) \
+ INTEL_VGA_DEVICE(0x0106, info), \
+ INTEL_VGA_DEVICE(0x0116, info), \ <--- I have this one! "GT2 mobile"?
+ INTEL_VGA_DEVICE(0x0126, info)
+
+#define INTEL_IVB_M_IDS(info) \
+
On Sun, Sep 1, 2013 at 4:10 PM, Sedat Dilek wrote:
[...]
> [ include/drm/i915_pciids.h ]
> ...
> +#define INTEL_SNB_M_IDS(info) \
> + INTEL_VGA_DEVICE(0x0106, info), \
> + INTEL_VGA_DEVICE(0x0116, info), \ <--- I have this one! "GT2 mobile"?
> + INTEL_VGA_DEVICE(0x0126, info)
> +
> +#define INTE
On Sun, Sep 01, 2013 at 04:28:39PM +0200, Sedat Dilek wrote:
> On Sun, Sep 1, 2013 at 4:10 PM, Sedat Dilek wrote:
>
> [...]
>
> > [ include/drm/i915_pciids.h ]
> > ...
> > +#define INTEL_SNB_M_IDS(info) \
> > + INTEL_VGA_DEVICE(0x0106, info), \
> > + INTEL_VGA_DEVICE(0x0116, info), \ <--- I have
On 08/30 10:28, Jani Nikula wrote:
> On Fri, 30 Aug 2013, Chon Ming Lee wrote:
> > eDP 1.4 supports 4-5 extra link rates in additional to current 2 link
> > rate. Create a structure to store the DPLL divisor data to improve
> > readability.
>
> DP 1.2 already supports 3 link rates, right?
Yes,
On Sun, Sep 1, 2013 at 5:05 PM, Chris Wilson wrote:
> On Sun, Sep 01, 2013 at 04:28:39PM +0200, Sedat Dilek wrote:
>> On Sun, Sep 1, 2013 at 4:10 PM, Sedat Dilek wrote:
>>
>> [...]
>>
>> > [ include/drm/i915_pciids.h ]
>> > ...
>> > +#define INTEL_SNB_M_IDS(info) \
>> > + INTEL_VGA_DEVICE(0x0106,
On 08/30 11:00, Jani Nikula wrote:
>
> [Okay, I missed Daniel's review, and noticed I hadn't actually hit send
> on this one either... but here goes anyway...]
>
> On Fri, 30 Aug 2013, Chon Ming Lee wrote:
> > For DP pll settings, there is only two golden configs. Instead of running
> > through
Dear intel-gfx developers,
When panning is enabled on the 830GM, horizontal panning creates a lot
of flickering on specific pixel positions.
After testing, I found that the reason for this is that panning works by
altering the frame origin pointer, which,
however, has certain alignment restrict
On Sun, Sep 01, 2013 at 03:59:00PM +0200, Sedat Dilek wrote:
> Hi Chris,
>
> is this going into any drm-intel GIT tree?
> I found it useful and saw it in your kernel-tree [1].
>
> - Sedat -
>
> [1]
> http://cgit.freedesktop.org/~ickle/linux-2.6/commit/?id=bf91098a1232db771feac66f88720c181ef6196
GCC 4.8.1 seems to think clock may be uninitialized.
Signed-off-by: Ben Widawsky
---
tools/intel_reg_dumper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/intel_reg_dumper.c b/tools/intel_reg_dumper.c
index bf3452c..1f4e877 100644
--- a/tools/intel_reg_dumper.c
+++ b
The warning that vmap isn't supported is useful, but it shouldn't get in
the way of developers (or distros) being able to use -Werror.
Cc: Chris Wilson
Signed-off-by: Ben Widawsky
---
tests/gem_vmap_blits.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/gem_vmap_blits
Our tools should always compile without warnings. We use them to get
debug output from end users, and ignoring warnings could be detrimental.
Tests are a different matter.
Signed-off-by: Ben Widawsky
---
tools/Makefile.am | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/
The GTT PTEs that the tool is trying to compare is really about
addresses, and not the PTE itself. To accomplish this, make which
calculates the physical address we actually want.
This commit itself doesn't change any functionality; just the wording in
the code.
Signed-off-by: Ben Widawsky
---
This finishes the objective in the last patch which was to actually deal
with physical addresses, and not the PTEs.
GEN6+ Provided support for physical addresses above 4GB. I'm not
actually sure what Ironlake supported, and don't feel like firing up the
timemachine.
Haswell caveat is coming up ne
Signed-off-by: Ben Widawsky
---
tools/intel_gtt.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/tools/intel_gtt.c b/tools/intel_gtt.c
index 874a4f6..acf63c1 100644
--- a/tools/intel_gtt.c
+++ b/tools/intel_gtt.c
@@ -50,7 +50,10 @@ static uint64_t get_phys(uint32_t pt_off
./tools/intel_gtt -d | head
GTT offset | PTEs
0x00 | 0xe4005015 0xe2854015 0xe283e015 0xe283f015
0x004000 | 0xe28ba015 0xe28bb015 0xe28b6015 0xe28b7015
0x008000 | 0xe2828015 0xe2829015 0xe282a015 0xe282b015
0x00c00
On Sat, Aug 31, 2013 at 4:02 PM, Linus Torvalds
wrote:
>
> Any known issues with DVI on Haswell (it seems to show up as "HDMI1"
> as the output, but it's a DVI cable)?
With a DP cable and the same monitor, the problem doesn't seem to
occur. So it does seem to somehow be related to the HDMI1/DVI o
On Fri, Aug 30, 2013 at 08:25:52PM +0300, Ville Syrjälä wrote:
> On Fri, Aug 23, 2013 at 07:51:28PM -0300, Paulo Zanoni wrote:
> > From: Paulo Zanoni
> >
> > We shouldn't disable the trickle feed bits on Haswell. Our
> > documentation explicitly says the trickle feed bits of PRI_CTL and
> > CUR_C
On Fri, Aug 30, 2013 at 03:27:47PM +0100, Damien Lespiau wrote:
> On Mon, Aug 26, 2013 at 07:50:55PM -0300, Rodrigo Vivi wrote:
> > From: Chris Wilson
> >
> > As we attempt to kmalloc after calling get_pages, there is a possibility
> > that the shrinker may reap the pages we just acquired. To pre
On Fri, Aug 30, 2013 at 11:49:52PM +0300, Ville Syrjälä wrote:
> On Fri, Aug 30, 2013 at 05:26:29PM -0300, Paulo Zanoni wrote:
> > 2013/8/30 :
> > > From: Ville Syrjälä
> > >
> > > Make the call to intel_update_watermarks() just once or twice during
> > > modeset. Ideally it should happen indepen
On Fri, Aug 30, 2013 at 03:41:19PM +0300, Ville Syrjälä wrote:
> On Thu, Aug 15, 2013 at 04:37:47PM -0600, Alex Williamson wrote:
> > I'm trying to add support for VGA arbitration on newer Intel graphics
> > devices. The existing code attempts to do this, but appear to have
> > not been updated si
On Fri, Aug 30, 2013 at 03:43:05PM +0300, Ville Syrjälä wrote:
> On Wed, Aug 28, 2013 at 09:39:08AM -0600, Alex Williamson wrote:
> > This is intended to add VGA arbiter support for Intel HD graphics on
> > Core processors. The old GMCH registers no longer exist, so even
> > though it appears that
On Fri, Aug 30, 2013 at 05:00:55PM +0100, Chris Wilson wrote:
> On Fri, Aug 30, 2013 at 03:39:26PM +0100, Damien Lespiau wrote:
> > One needs to call __sg_free_table() if __sg_alloc_table() fails, but
> > sg_alloc_table() does that for us already.
> >
> > Signed-off-by: Damien Lespiau
> Reviewd-b
On Fri, Aug 30, 2013 at 03:26:30PM -0700, Ben Widawsky wrote:
> On Fri, Aug 30, 2013 at 02:40:26PM +0100, Damien Lespiau wrote:
> > Signed-off-by: Damien Lespiau
> > ---
> > drivers/gpu/drm/i915/i915_gem_context.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/dri
On Fri, Aug 30, 2013 at 08:39:46PM -0700, Ben Widawsky wrote:
> On Sat, Aug 31, 2013 at 12:50:30AM +0100, Chris Wilson wrote:
> > On Fri, Aug 30, 2013 at 04:43:54PM -0700, Ben Widawsky wrote:
> > > lifted from Daniel:
> > > pread/pwrite isn't about the object's domain at all, but purely about
> > >
On Sat, Aug 31, 2013 at 10:15:25AM +0100, Chris Wilson wrote:
> On Fri, Aug 30, 2013 at 06:30:55PM -0700, Stuart Abercrombie wrote:
> > Both of these were taking the mode_config mutex but executed from the
> > same work queue. If intel_crtc_page_flip happened to flush a work queue
> > containing a
Historically we've run our own driver hotplug handling in our own
work-queue, which then launched the drm core hotplug handling in the
system workqueue. This is important since we flush our own driver
workqueue in the pageflip code while hodling modeset locks, and only
the drm hotplug code grabbed
On Sat, Aug 31, 2013 at 05:40:09PM +0200, Thomas Richter wrote:
> Dear intel-gfx developers,
>
> panning on i830 based graphics seem to be working only half-ways.
> Vertical panning works fine, but horizontal panning flickers at
> about 60Hz frequency at specific pixel positions. The problem
> per
On Sat, Aug 31, 2013 at 04:02:16PM -0700, Linus Torvalds wrote:
> Hmm. I just updated my machine to a i7-4770S (kept everything else the
> same, just switched out motherboards), and now when my display goes to
> sleep, it seems to never come back.
Sleep as in dpms off ($ xset dpms force off) or sl
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