From: Ville Syrjälä
Update the connector DPMS state after atomic modeset operations.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_atomic.c | 31 +++
1 files changed, 31 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomic.c
From: Ville Syrjälä
Avoids a NULL pointer dereference if the atomic modeset fails.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_atomic.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomic.c
b/drivers/gpu/drm/i915/intel_a
From: Ander Conselvan de Oliveira
intel_crtc->cursor_visible is only changed on the commit phase, so the
check for visibility was considering the previous state. Change this to
intel_crtc->cursor_handle instead.
---
drivers/gpu/drm/i915/intel_atomic.c |2 +-
1 files changed, 1 insertions(+),
From: Ville Syrjälä
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_atomic.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomic.c
b/drivers/gpu/drm/i915/intel_atomic.c
index c4cec40..bfc0563 100644
--- a/drivers/gpu/drm/i
From: Ville Syrjälä
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_atomic.c |8 +---
1 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomic.c
b/drivers/gpu/drm/i915/intel_atomic.c
index bfc0563..a119896 100644
--- a/drivers/gpu/drm
From: Ville Syrjälä
Don't unpin the old fb after flips, unless a new fb was pinned, or we're
disabling the plane/crtc.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_atomic.c |8 ++--
1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel
From: Ville Syrjälä
These function no longer exist.
---
drivers/gpu/drm/i915/intel_atomic.c |7 ---
1 files changed, 0 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomic.c
b/drivers/gpu/drm/i915/intel_atomic.c
index b795cb2..7a7695b 100644
--- a/drivers/gpu/dr
From: Ville Syrjälä
We have more than one sprite, so a boolean simply won't cut it.
Turn sprite_scaling_enabled into a bitmask and track the state
of sprite scaler for each sprite independently.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_drv.h |2 +-
drivers/gpu/drm/i91
From: Ville Syrjälä
Collect the part which takes care of issuing the flips to a new
function. This makes the following patch nicer to look at.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_atomic.c | 37 --
1 files changed, 22 insertions(+), 15 d
From: Ville Syrjälä
After the atomic flip has been split up into individual flip requests
for each scanout engine, put each such request into a FIFO. Then for
each flip request add new request to the ring(s) in order to get an
interrupt once the GPU has finished whatever it was doing with the
new
From: Ville Syrjälä
If the GPU hangs, release all pending atomic flips from the queue.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_irq.c |1 +
drivers/gpu/drm/i915/intel_atomic.c | 29 +
drivers/gpu/drm/i915/intel_drv.h|1 +
3 files
From: Ville Syrjälä
The register values are computed when the flip ioctl is issued, and
they're used only after we've waited for the GPU to finish rendering.
The computed values are store in the intel_crtc and intel_plane structs,
so issuing another flip before the previous one has been fully com
From: Ville Syrjälä
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 390251d..2f518be 100644
--- a/drivers/gpu/drm/i91
From: Ville Syrjälä
Most of the code for preparing the 'struct intel_flip' instances was
identical betwen the CRTC and plane codepaths. Refactor the common parts
into a single function.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_atomic.c | 122 +++-
From: Ville Syrjälä
Atomic code might need i915_gem_check_olr().
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_drv.h |1 +
drivers/gpu/drm/i915/i915_gem.c |2 +-
2 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/dr
From: Ville Syrjälä
These are not needed anymore.
Signed-off-by: Ville Syrjälä
---
include/drm/drm_crtc.h |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index c8cea87..da9abb6 100644
--- a/include/drm/drm_crtc.h
+++ b/i
From: Ville Syrjälä
Use the new_crtc and new_encoder pointes inside the intel_encoder and
intel_connector structures instead of swapping the crtc and encoder
pointers in the drm base structures around the disable calls.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_atomic.c | 11
From: Ville Syrjälä
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_atomic.c | 36 +++
1 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomic.c
b/drivers/gpu/drm/i915/intel_atomic.c
index e52d92a..36446d1
From: Ville Syrjälä
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_atomic.c |4
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomic.c
b/drivers/gpu/drm/i915/intel_atomic.c
index 415cd72..efdaff3 100644
--- a/drivers/gpu/drm/i91
From: Ville Syrjälä
The atomic code will want to call intel_modeset_commit_output_state()
too.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c |2 +-
drivers/gpu/drm/i915/intel_drv.h |1 +
2 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/
From: Ville Syrjälä
A new trace point for tracking changes to gem object pin count.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_gem.c |6 ++
drivers/gpu/drm/i915/i915_trace.h | 19 +++
2 files changed, 25 insertions(+), 0 deletions(-)
diff --git a/dr
From: Ville Syrjälä
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_drv.h |1 +
drivers/gpu/drm/i915/i915_trace.h | 15 +++
drivers/gpu/drm/i915/intel_atomic.c |9 -
3 files changed, 24 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i9
From: Ville Syrjälä
The atomic check() hook is interested in the staged new configuration,
so it must use the intel_encoder::new_crtc pointer when checking if
a CRTC is in use or not.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_atomic.c | 16 ++--
1 files changed,
From: Ville Syrjälä
Add a module parameter that allows one to easily change between blocking
and non-blocking GPU synchronization with atomic page flips.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_stub.c |5 ++
drivers/gpu/drm/i915/i915_trace.h | 49 ++
d
From: Ville Syrjälä
Add a comment that outlines some of the missign/incomplete parts of the
atomic code.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_atomic.c | 15 +++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomi
From: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_atomic.c | 15 +++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomic.c
b/drivers/gpu/drm/i915/intel_atomic.c
index c964b64a..43767c2 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
From: Ville Syrjälä
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_trace.h | 19 +++
drivers/gpu/drm/i915/intel_atomic.c |4
2 files changed, 23 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_trace.h
b/drivers/gpu/drm/i915/i915_tr
From: Ville Syrjälä
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_trace.h | 18 ++
drivers/gpu/drm/i915/intel_atomic.c |2 ++
2 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_trace.h
b/drivers/gpu/drm/i915/i915_trace
On Wed, Dec 12, 2012 at 8:07 AM, Daniel Vetter wrote:
> Noticed while reviewing the fence locking in the radone pageflip
> handler.
>
> Signed-off-by: Daniel Vetter
> ---
> drivers/gpu/drm/ttm/ttm_bo_util.c |2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/ttm/ttm_bo_
On 11.12.12 00:00, Jesse Barnes wrote:
On Mon, 10 Dec 2012 10:48:29 -0800
Jesse Barnes wrote:
On 15.10.12 16:52, Chris Wilson wrote:
> On Mon, 15 Oct 2012 16:46:52 +0200, Mario Kleiner
wrote:
>> Hi Chris,
>>
>> can you please check & merge at least the first two patches of the
>> se
From: Damien Lespiau
Those status bits don't follow the usual pattern: _MASK (those bits are
write 1 to clear, useful to select the value we want to read) and the
values shifted by the same amount.
Cleaned that that up when poking at the register for testing purposes,
might as well upstream that
From: Damien Lespiau
If you unplug the hdmi connector slowly enough, the hotplug interrupt
fires but then the kernel code tries to read the EDID and succeeds
(because the connector is still half connected, the HPD pin is shorter
than the others, and DDC works). Since EDID succeeds it thinks the
m
From: Damien Lespiau
Just like:
commit a93cd34234db2269fa2481464ffd39263d617aed
Author: Damien Lespiau
Date: Wed Dec 12 19:37:22 2012 +
drm/i915/hdmi: Read the HPD status before trying to read the EDID
But this time for DiplayPort.
Signed-off-by: Damien Lespiau
---
drivers/gp
From: Damien Lespiau
It's a bit useless to print out an all null DPCD when we are
disconnected and just clutter the debug logs.
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/intel_dp.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel
On 10.12.12 19:48, Jesse Barnes wrote:
On 15.10.12 16:52, Chris Wilson wrote:
> On Mon, 15 Oct 2012 16:46:52 +0200, Mario Kleiner
wrote:
>> Hi Chris,
>>
>> can you please check & merge at least the first two patches of the
>> series into the intel ddx?
Thanks for the quick reply.
>
On Wed, Dec 12, 2012 at 03:55:46PM +, Zhang, Xiong Y wrote:
> Hi, all:
>
> When gfx executes batch buffer in render ring buffer, it will do
> context switch .
>
> Since only when the previous batch buffer has finished, the next batch
> buffer can start. the batch buffer is executed in order.
On Wed, 12 Dec 2012 14:06:44 +0100
Daniel Vetter wrote:
> Spinning for up to 200 us with interrupts locked out is not good. So
> let's just spin (and even that seems to be excessive).
>
> And we don't call these functions from interrupt context, so this is
> not required. Besides that doing anyt
On Wed, Dec 12, 2012 at 12:54:47PM -0800, Jesse Barnes wrote:
> On Wed, 12 Dec 2012 14:06:44 +0100
> Daniel Vetter wrote:
>
> > Spinning for up to 200 us with interrupts locked out is not good. So
> > let's just spin (and even that seems to be excessive).
> >
> > And we don't call these function
On Wed, 12 Dec 2012 23:00:34 +0100
Daniel Vetter wrote:
> On Wed, Dec 12, 2012 at 12:54:47PM -0800, Jesse Barnes wrote:
> > On Wed, 12 Dec 2012 14:06:44 +0100
> > Daniel Vetter wrote:
> >
> > > Spinning for up to 200 us with interrupts locked out is not good. So
> > > let's just spin (and even
>From Ben's AGP dependence removal change, "needs_dmar" flag has not
been properly setup for new chips using new GTT init function. This
one adds missed setting of that flag to make sure we do pci mappings
with IOMMU enabled.
Signed-off-by: Zhenyu Wang
---
drivers/gpu/drm/i915/i915_gem_gtt.c |
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