Revert "agp/intel, drm/i915: Use a write-combining map for updating PTEs"
This reverts commit 15a80851c8166c05c6f600fede1719b29eb70737.
I haven't spent any time looking at the patch but bisection and revert
testing proves this fixes the issues. Begone ye ext4 errors!
Signed-off-by: Ben Widawsky
Hi Dave,
First -next pull for 3.7. Highlights:
- hsw hdmi improvements (Paulo)
- ips/rps locking rework and cleanups
- rc6 on ilk by default again
- hw context&dp&dpff support for hsw (Ben)
- GET_PARAM_HAS_SEMAPHORES (Chris)
- gen6+ pipe_control improvements (Chris)
- set_cacheing ioctl and assort
On Thu, Aug 16, 2012 at 11:12:57PM -0700, Ben Widawsky wrote:
> Revert "agp/intel, drm/i915: Use a write-combining map for updating PTEs"
>
> This reverts commit 15a80851c8166c05c6f600fede1719b29eb70737.
>
> I haven't spent any time looking at the patch but bisection and revert
> testing proves t
On Fri, 17 Aug 2012, Ben Widawsky wrote:
> INSTDONE is used in many places, and it varies from generation to
> generation. This provides a good reason for us to extract the logic to
> read the relevant information.
>
> The patch has no functional change. It's prep for some new stuff.
>
> v2: move
In Valleyview the DPLL and lane control registers are accessible only
through side band fabric called DPIO. Added two tools to read and write
registers residing in this space.
v2: Moved the core read/write functions to lib/intel_dpio.c based on
Ben's feedback
Signed-off-by: Vijay Purushothaman
-
From: Damien Lespiau
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/drm_modes.c |3 ---
include/drm/drm_crtc.h |2 --
2 files changed, 0 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index b7adb4a..28637c1 100644
--- a/driv
On Tue, Aug 14, 2012 at 5:34 AM, Keith Packard wrote:
@@ -3728,7 +3728,8 @@ static inline bool intel_panel_use_ssc(struct
drm_i915_private *dev_priv)
*/
static bool intel_choose_pipe_bpp_dither(struct drm_crtc *crtc,
unsigned int *pipe_bpp,
-
On Tue, Aug 14, 2012 at 5:34 AM, Keith Packard wrote:
> @@ -3845,8 +3836,20 @@ static bool intel_choose_pipe_bpp_dither(struct
> drm_crtc *crtc,
>
> display_bpc = min(display_bpc, bpc);
>
> - DRM_DEBUG_KMS("setting pipe bpc to %d (max display bpc %d)\n",
> - bpc,
"Lespiau, Damien" writes:
> On Tue, Aug 14, 2012 at 5:34 AM, Keith Packard wrote:
>
> @@ -3728,7 +3728,8 @@ static inline bool intel_panel_use_ssc(struct
> drm_i915_private *dev_priv)
> */
> static bool intel_choose_pipe_bpp_dither(struct drm_crtc *crtc,
>
On Fri, Aug 17, 2012 at 4:00 PM, Keith Packard wrote:
>> I guess this does not cover the case of pipe B using 3 lanes meaning
>> pipe C can use 1?
>
> It didn't look like that was a supported mode from the docs.
Ah yes, found it now "FDI B maximum port width is 4 lanes when FDI C
is disabled, 2 l
On Tue, Aug 14, 2012 at 5:34 AM, Keith Packard wrote:
> Just a bit of cleanup; it appears to have no effect.
>
> Signed-off-by: Keith Packard
> ---
> drivers/gpu/drm/i915/intel_display.c |7 +--
> 1 file changed, 5 insertions(+), 2 deletions(-)
Clearing the locking bit in FDI_RX_IIR loo
On Tue, Aug 14, 2012 at 5:34 AM, Keith Packard wrote:
> These should probably all look like
>
> enabled |= (1 << pipe)
>
> so that the intent is clear...
>
> Signed-off-by: Keith Packard
> ---
> drivers/gpu/drm/i915/intel_pm.c |2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
On Tue, Aug 14, 2012 at 5:34 AM, Keith Packard wrote:
> Doesn't make sense to disable in the other order.
>
> Signed-off-by: Keith Packard
> ---
> drivers/gpu/drm/i915/intel_display.c | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
I can't see anything in the docs about an
On 2012-08-17 01:46, Jani Nikula wrote:
On Fri, 17 Aug 2012, Ben Widawsky wrote:
INSTDONE is used in many places, and it varies from generation to
generation. This provides a good reason for us to extract the logic
to
read the relevant information.
The patch has no functional change. It's pr
On Tue, Aug 14, 2012 at 5:34 AM, Keith Packard wrote:
> @@ -2324,6 +2324,8 @@ static void intel_fdi_normal_train(struct drm_crtc
> *crtc)
> temp |= FDI_LINK_TRAIN_NONE | FDI_TX_ENHANCE_FRAME_ENABLE;
> }
> I915_WRITE(reg, temp);
> + POSTING_READ(reg);
> +
Hi,
I've got a MacBookAir4,2 (mid-2011 version with Sandy Bridge), and get
pretty regular deadlocks in DRM. I'm not 100% sure they all have the
same root cause: the most regular one seems to occur under fairly
heavy I/O pressure, whereas this one just randomly happened whilst
running the Clutter t
James Bottomley reported [1] a massive power regression, due to the
enabling of semaphores by default in 3.5. A workaround for him is to
again disable semaphores. And indeed, his system has a very hard time
to entre rc6 with semaphores enabled.
Ben Widawsky run around with a kill-a-watt a lot and
Ok, I'll admit that I don't really know what this stuff does. But can
you please try the values provided by the ChromeOS team?
Thanks, Daniel
---
drivers/gpu/drm/i915/intel_pm.c | 17 +
1 file changed, 5 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.
From: Paulo Zanoni
Hi
Since we stopped running the gen6 workarounds on gen > 6 I started seeing a lot
of GPU hangs on my gen 7.5 machine. These patches add gen7+ workarounds which
prevent the GPU hangs I'm seeing.
These patches were tested mostly on HSW and briefly on IVB, but the workarounds
i
From: Paulo Zanoni
For now, just a copy of gen6_render_ring_flush. Different gens have
different workarounds, so we want different functions.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 50 -
1 file changed, 49 insertions(+), 1 dele
From: Paulo Zanoni
Since gen 7+ now run the new gen7_render_ring_flush function.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 21 ++---
1 file changed, 6 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers
From: Paulo Zanoni
The combination of this commit + the next one will prevent a lot of
gpu hangs.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/dri
From: Paulo Zanoni
The combination of this commit + the previous one prevents the dozens
of GPU hangs I'm seeing on my gen 7.5 machine.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/dri
On 2012-08-17 12:41, Daniel Stone wrote:
Hi,
I've got a MacBookAir4,2 (mid-2011 version with Sandy Bridge), and
get
pretty regular deadlocks in DRM. I'm not 100% sure they all have the
same root cause: the most regular one seems to occur under fairly
heavy I/O pressure, whereas this one just r
On 2012-08-17 14:35, Paulo Zanoni wrote:
From: Paulo Zanoni
Hi
Since we stopped running the gen6 workarounds on gen > 6 I started
seeing a lot
of GPU hangs on my gen 7.5 machine. These patches add gen7+
workarounds which
prevent the GPU hangs I'm seeing.
These patches were tested mostly on
2012/8/17 Ben Widawsky :
> On 2012-08-17 14:35, Paulo Zanoni wrote:
>>
>> From: Paulo Zanoni
>>
>> Hi
>>
>> Since we stopped running the gen6 workarounds on gen > 6 I started
>> seeing a lot
>> of GPU hangs on my gen 7.5 machine. These patches add gen7+ workarounds
>> which
>> prevent the GPU hang
On 2012-08-17 15:42, Paulo Zanoni wrote:
2012/8/17 Ben Widawsky :
On 2012-08-17 14:35, Paulo Zanoni wrote:
From: Paulo Zanoni
Hi
Since we stopped running the gen6 workarounds on gen > 6 I started
seeing a lot
of GPU hangs on my gen 7.5 machine. These patches add gen7+
workarounds
which
pr
"Lespiau, Damien" writes:
> I can't see anything in the docs about an order requirement for those.
Right, the docs don't say anything, which is a bit disconcerting.
> Not sure why the other way does not make sense. Somehow disabling TX
> before RX makes some sense to me (TX enabled without a re
Hi Michael,
forwarding to a list that might be better place.
Dave.
-- Forwarded message --
From: Michael Chapman
Date: Fri, Aug 17, 2012 at 10:30 PM
Subject: intel_display.c: marking Acer Aspire 5732Z for quirk_invert_brightness
To: airl...@gmail.com
Hello Dave:
A couple of
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