Re: [Intel-gfx] [PATCH] igt/gem_trtt: Exercise the TRTT hardware

2016-01-20 Thread Goel, Akash
On 1/11/2016 6:02 PM, Chris Wilson wrote: On Sat, Jan 09, 2016 at 05:01:30PM +0530, akash.g...@intel.com wrote: +static void* mmap_bo(int fd, uint32_t handle, uint64_t size) +{ + uint32_t *ptr = gem_mmap__cpu(fd, handle, 0, size, PROT_READ); + gem_set_domain(fd, handle, I915_GEM_DO

Re: [Intel-gfx] [PATCH] igt/gem_trtt: Exercise the TRTT hardware

2016-01-11 Thread Tian, Kevin
> From: akash.g...@intel.com > Sent: Saturday, January 09, 2016 7:32 PM > [...] > > There is a provision to keep TR-TT Tables in virtual space, where the pages of > TRTT tables will be mapped to PPGTT. This is the adopted mode, as in this mode > UMD will have a full control on TR-TT management,

Re: [Intel-gfx] [PATCH] igt/gem_trtt: Exercise the TRTT hardware

2016-01-11 Thread Chris Wilson
On Mon, Jan 11, 2016 at 12:32:08PM +, Chris Wilson wrote: > On Sat, Jan 09, 2016 at 05:01:30PM +0530, akash.g...@intel.com wrote: > > +static void submit_and_sync(int fd, struct drm_i915_gem_execbuffer2 > > *execbuf, > > + uint32_t batch_buf_handle) > > +{ > > + gem_exe

Re: [Intel-gfx] [PATCH] igt/gem_trtt: Exercise the TRTT hardware

2016-01-11 Thread Chris Wilson
On Sat, Jan 09, 2016 at 05:01:30PM +0530, akash.g...@intel.com wrote: > +static void* mmap_bo(int fd, uint32_t handle, uint64_t size) > +{ > + uint32_t *ptr = gem_mmap__cpu(fd, handle, 0, size, PROT_READ); > + gem_set_domain(fd, handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); read-only