Add C10 register bits to be used for computing HDMI PLLs with
algorithm.
v2: Add bspec reference. (Suraj)
v3: Use REG_BIT8 like other reg bits/masks. (Jani)
Bspec: 74166
Signed-off-by: Ankit Nautiyal
Reviewed-by: Suraj Kandpal
---
.../gpu/drm/i915/display/intel_cx0_phy_regs.h | 24
On Mon, 20 Jan 2025, Ankit Nautiyal wrote:
> Add C10 register bits to be used for computing HDMI PLLs with
> algorithm.
>
> v2: Add bspec reference. (Suraj)
>
> Bspec: 74166
> Signed-off-by: Ankit Nautiyal
> Reviewed-by: Suraj Kandpal
> ---
> .../gpu/drm/i915/display/intel_cx0_phy_regs.h | 24 +
Add C10 register bits to be used for computing HDMI PLLs with
algorithm.
v2: Add bspec reference. (Suraj)
Bspec: 74166
Signed-off-by: Ankit Nautiyal
Reviewed-by: Suraj Kandpal
---
.../gpu/drm/i915/display/intel_cx0_phy_regs.h | 24 +++
1 file changed, 24 insertions(+)
diff --g
> -Original Message-
> From: Intel-xe On Behalf Of Ankit
> Nautiyal
> Sent: Tuesday, August 13, 2024 8:50 AM
> To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
> Cc: jani.nik...@linux.intel.com
> Subject: [PATCH 3/5] drm/i915/cx0_phy_regs: A
Add C10 register bits to be used for computing HDMI PLLs with
algorithm.
Signed-off-by: Ankit Nautiyal
---
.../gpu/drm/i915/display/intel_cx0_phy_regs.h | 24 +++
1 file changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
b/drivers/gpu/drm/i
Add C10 register bits to be used for computing HDMI PLLs with
algorithm.
Signed-off-by: Ankit Nautiyal
---
.../gpu/drm/i915/display/intel_cx0_phy_regs.h | 24 +++
1 file changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
b/drivers/gpu/drm/i
Add C10 register bits to be used for computing HDMI PLLs with
algorithm.
Signed-off-by: Ankit Nautiyal
---
.../gpu/drm/i915/display/intel_cx0_phy_regs.h | 24 +++
1 file changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
b/drivers/gpu/drm/i
