On Thu, 2025-01-23 at 11:41 -0300, Gustavo Sousa wrote:
> Quoting Luca Coelho (2025-01-22 06:06:00-03:00)
> > On Fri, 2025-01-17 at 19:06 -0300, Gustavo Sousa wrote:
> > > The DMC wakelock code needs to keep track of register offsets that need
> > > the wakelock for proper access. If one of the nec
On 23.01.2025 13:41, Gustavo Sousa wrote:
> Quoting Vivekanandan, Balasubramani (2025-01-23 13:11:03-03:00)
> >On 17.01.2025 19:06, Gustavo Sousa wrote:
> >> The DMC wakelock code needs to keep track of register offsets that need
> >> the wakelock for proper access. If one of the necessary offsets
Quoting Jani Nikula (2025-01-27 08:59:11-03:00)
>On Mon, 27 Jan 2025, Gustavo Sousa wrote:
>> Quoting Jani Nikula (2025-01-27 06:47:58-03:00)
>>>On Fri, 17 Jan 2025, Gustavo Sousa wrote:
diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.h
b/drivers/gpu/drm/i915/display/intel_dmc_w
On Mon, 27 Jan 2025, Gustavo Sousa wrote:
> Quoting Jani Nikula (2025-01-27 06:47:58-03:00)
>>On Fri, 17 Jan 2025, Gustavo Sousa wrote:
>>> diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.h
>>> b/drivers/gpu/drm/i915/display/intel_dmc_wl.h
>>> index 5488fbdf29b8..d11b0ab50b3c 100644
>>> -
Quoting Jani Nikula (2025-01-27 06:47:58-03:00)
>On Fri, 17 Jan 2025, Gustavo Sousa wrote:
>> diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.h
>> b/drivers/gpu/drm/i915/display/intel_dmc_wl.h
>> index 5488fbdf29b8..d11b0ab50b3c 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dmc_wl.h
>
On Fri, 17 Jan 2025, Gustavo Sousa wrote:
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.h
> b/drivers/gpu/drm/i915/display/intel_dmc_wl.h
> index 5488fbdf29b8..d11b0ab50b3c 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc_wl.h
> +++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.h
>
Quoting Vivekanandan, Balasubramani (2025-01-23 13:11:03-03:00)
>On 17.01.2025 19:06, Gustavo Sousa wrote:
>> The DMC wakelock code needs to keep track of register offsets that need
>> the wakelock for proper access. If one of the necessary offsets are
>> missed, then the failure in asserting the w
On 17.01.2025 19:06, Gustavo Sousa wrote:
> The DMC wakelock code needs to keep track of register offsets that need
> the wakelock for proper access. If one of the necessary offsets are
> missed, then the failure in asserting the wakelock is very likely to
> cause problems down the road.
>
> A mis
Quoting Luca Coelho (2025-01-22 06:06:00-03:00)
>On Fri, 2025-01-17 at 19:06 -0300, Gustavo Sousa wrote:
>> The DMC wakelock code needs to keep track of register offsets that need
>> the wakelock for proper access. If one of the necessary offsets are
>> missed, then the failure in asserting the wak
On Fri, 2025-01-17 at 19:06 -0300, Gustavo Sousa wrote:
> The DMC wakelock code needs to keep track of register offsets that need
> the wakelock for proper access. If one of the necessary offsets are
> missed, then the failure in asserting the wakelock is very likely to
> cause problems down the ro
The DMC wakelock code needs to keep track of register offsets that need
the wakelock for proper access. If one of the necessary offsets are
missed, then the failure in asserting the wakelock is very likely to
cause problems down the road.
A miss could happen for at least two different reasons:
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