Hi Ville,
On Wed, Feb 12, 2025 at 01:19:36AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We customarily define the bits of a register in big endian
> order. Reorder the CHV fuse bits to match.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Andi Shyti
Thanks,
Andi
From: Ville Syrjälä
We customarily define the bits of a register in big endian
order. Reorder the CHV fuse bits to match.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/dr
