> -Original Message-
> From: Nikula, Jani
> Sent: Wednesday, January 10, 2024 4:24 PM
> To: Murthy, Arun R ; intel-gfx@lists.freedesktop.org;
> Deak, Imre
> Subject: RE: [PATCH] drm/i915/display/dp: 128/132b DP-capable with SST
>
> On Wed, 10 Jan 2024,
On Wed, 10 Jan 2024, "Murthy, Arun R" wrote:
>> -Original Message-
>> From: Nikula, Jani
>> Sent: Tuesday, January 9, 2024 2:59 PM
>> To: Murthy, Arun R ;
>> intel-gfx@lists.freedesktop.org;
>> Deak, Imre
>> Subject: RE: [PATC
> -Original Message-
> From: Nikula, Jani
> Sent: Tuesday, January 9, 2024 2:59 PM
> To: Murthy, Arun R ; intel-gfx@lists.freedesktop.org;
> Deak, Imre
> Subject: RE: [PATCH] drm/i915/display/dp: 128/132b DP-capable with SST
>
> On Tue, 09 Jan 2024, Jani Nikul
> -Original Message-
> From: Nikula, Jani
> Sent: Tuesday, January 9, 2024 2:58 PM
> To: Murthy, Arun R ; intel-gfx@lists.freedesktop.org;
> Deak, Imre
> Subject: RE: [PATCH] drm/i915/display/dp: 128/132b DP-capable with SST
>
> On Tue, 09 Jan 2024,
ts.freedesktop.org;
>>> Deak, Imre
>>> Cc: Murthy, Arun R
>>> Subject: Re: [PATCH] drm/i915/display/dp: 128/132b DP-capable with SST
>>>
>>> On Wed, 03 Jan 2024, Arun R Murthy wrote:
>>> > With a value of '0' read from MSTM_CAP register MS
On Tue, 09 Jan 2024, "Murthy, Arun R" wrote:
>> -Original Message-
>> From: Nikula, Jani
>> Sent: Monday, January 8, 2024 7:01 PM
>> To: Murthy, Arun R ;
>> intel-gfx@lists.freedesktop.org;
>> Deak, Imre
>> Cc: Murthy, Arun R
>
> -Original Message-
> From: Nikula, Jani
> Sent: Monday, January 8, 2024 7:01 PM
> To: Murthy, Arun R ; intel-gfx@lists.freedesktop.org;
> Deak, Imre
> Cc: Murthy, Arun R
> Subject: Re: [PATCH] drm/i915/display/dp: 128/132b DP-capable with SST
>
> On Wed,
On Wed, 03 Jan 2024, Arun R Murthy wrote:
> With a value of '0' read from MSTM_CAP register MST to be enabled.
> DP2.1 SCR updates the spec for 128/132b DP capable supporting only one
> stream and not supporting single stream sideband MSG.
> The underlying protocol will be MST to enable use of MTP
> -Original Message-
> From: Nautiyal, Ankit K
> Sent: Monday, January 8, 2024 5:08 PM
> To: Murthy, Arun R ; intel-gfx@lists.freedesktop.org;
> Nikula, Jani ; Deak, Imre
> Subject: Re: [PATCH] drm/i915/display/dp: 128/132b DP-capable with SST
>
>
> On 1/3/
On 1/3/2024 2:37 PM, Arun R Murthy wrote:
With a value of '0' read from MSTM_CAP register MST to be enabled.
DP2.1 SCR updates the spec for 128/132b DP capable supporting only one
stream and not supporting single stream sideband MSG.
I think, we still need to read bit DP_SINGLE_STREAM_SIDEBAN
Thank you for the patch
Tested-by: Khaled Almahallawy
-Original Message-
From: Intel-gfx On Behalf Of Arun R
Murthy
Sent: Wednesday, January 3, 2024 1:07 AM
To: intel-gfx@lists.freedesktop.org; Nikula, Jani ;
Deak, Imre
Subject: [PATCH] drm/i915/display/dp: 128/132b DP-capable with
With a value of '0' read from MSTM_CAP register MST to be enabled.
DP2.1 SCR updates the spec for 128/132b DP capable supporting only one
stream and not supporting single stream sideband MSG.
The underlying protocol will be MST to enable use of MTP.
Signed-off-by: Arun R Murthy
---
drivers/gpu/d
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