On Tue, Nov 06, 2018 at 04:51:22PM +0200, Ville Syrjälä wrote:
> On Mon, Nov 05, 2018 at 04:48:57PM -0800, Manasi Navare wrote:
> > On Mon, Nov 05, 2018 at 03:31:48PM -0800, Anusha Srivatsa wrote:
> > > If the panel supports FEC, the driver has to
> > > set the FEC_READY bit in the dpcd register:
>
On Mon, Nov 05, 2018 at 04:48:57PM -0800, Manasi Navare wrote:
> On Mon, Nov 05, 2018 at 03:31:48PM -0800, Anusha Srivatsa wrote:
> > If the panel supports FEC, the driver has to
> > set the FEC_READY bit in the dpcd register:
> > FEC_CONFIGURATION.
> >
> > This has to happen before link training.
On Mon, Nov 05, 2018 at 03:31:48PM -0800, Anusha Srivatsa wrote:
> If the panel supports FEC, the driver has to
> set the FEC_READY bit in the dpcd register:
> FEC_CONFIGURATION.
>
> This has to happen before link training.
>
> v2: s/intel_dp_set_fec_ready/intel_dp_sink_set_fec_ready
>- chang
If the panel supports FEC, the driver has to
set the FEC_READY bit in the dpcd register:
FEC_CONFIGURATION.
This has to happen before link training.
v2: s/intel_dp_set_fec_ready/intel_dp_sink_set_fec_ready
- change commit message. (Gaurav)
v3: rebased. (r-b Manasi)
v4: Use fec crtc state, be
