iginal Message-
From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
Sent: Wednesday, February 21, 2018 9:19 PM
To: Mustaffa, Mustamin B
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [V4] drm/i915: Enable VBT based BL control for DP
On Wed, Feb 21, 2018 at 12:04:43AM
linux.intel.com]
> Sent: Tuesday, February 20, 2018 10:26 PM
> To: Mustaffa, Mustamin B
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [V4] drm/i915: Enable VBT based BL control for DP
>
> On Tue, Feb 20, 2018 at 05:42:59PM +0800, Mustamin B Mustaffa wrote:
> &
el.com]
> Sent: Tuesday, February 20, 2018 10:26 PM
> To: Mustaffa, Mustamin B
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [V4] drm/i915: Enable VBT based BL control for DP
>
> On Tue, Feb 20, 2018 at 05:42:59PM +0800, Mustamin B Mustaffa wrote:
> >
Subject: Re: [Intel-gfx] [V4] drm/i915: Enable VBT based BL control for DP
On Tue, Feb 20, 2018 at 05:42:59PM +0800, Mustamin B Mustaffa wrote:
> Currently, BXT_PP is hardcoded with value '0'.
> It practically disabled eDP backlight on MRB (BXT) platform.
>
> This patch will tell
On Tue, Feb 20, 2018 at 05:42:59PM +0800, Mustamin B Mustaffa wrote:
> Currently, BXT_PP is hardcoded with value '0'.
> It practically disabled eDP backlight on MRB (BXT) platform.
>
> This patch will tell which BXT_PP registers (there are two set of
> PP_CONTROL in the spec) to be used as defined
Currently, BXT_PP is hardcoded with value '0'.
It practically disabled eDP backlight on MRB (BXT) platform.
This patch will tell which BXT_PP registers (there are two set of
PP_CONTROL in the spec) to be used as defined in VBT (Video Bios Timing
table) and this will enabled eDP backlight controlle
