Re: [Intel-gfx] [RFC PATCH 118/162] drm/i915/dg1: Reserve first 1MB of local memory

2020-11-30 Thread Chris Wilson
Quoting Matthew Auld (2020-11-30 11:09:57) > On 27/11/2020 13:52, Chris Wilson wrote: > > Quoting Matthew Auld (2020-11-27 12:06:34) > >> From: Imre Deak > >> > >> On DG1 A0/B0 steppings the first 1MB of local memory must be reserved. > >> One reason for this is that the 0xA-0xB range is n

Re: [Intel-gfx] [RFC PATCH 118/162] drm/i915/dg1: Reserve first 1MB of local memory

2020-11-30 Thread Matthew Auld
On 27/11/2020 13:52, Chris Wilson wrote: Quoting Matthew Auld (2020-11-27 12:06:34) From: Imre Deak On DG1 A0/B0 steppings the first 1MB of local memory must be reserved. One reason for this is that the 0xA-0xB range is not accessible by the display, probably since this region is redir

Re: [Intel-gfx] [RFC PATCH 118/162] drm/i915/dg1: Reserve first 1MB of local memory

2020-11-27 Thread Chris Wilson
Quoting Matthew Auld (2020-11-27 12:06:34) > From: Imre Deak > > On DG1 A0/B0 steppings the first 1MB of local memory must be reserved. > One reason for this is that the 0xA-0xB range is not accessible > by the display, probably since this region is redirected to another > memory location

[Intel-gfx] [RFC PATCH 118/162] drm/i915/dg1: Reserve first 1MB of local memory

2020-11-27 Thread Matthew Auld
From: Imre Deak On DG1 A0/B0 steppings the first 1MB of local memory must be reserved. One reason for this is that the 0xA-0xB range is not accessible by the display, probably since this region is redirected to another memory location for legacy VGA compatibility. BSpec: 50586 Testcase: