ST_INDEX_PF = 0,
> GUC_CAPTURE_LIST_INDEX_VF = 1,
> GUC_CAPTURE_LIST_INDEX_MAX = 2,
s/INDEX/OWNER ?
-Original Message-
From: Wajdeczko, Michal
Sent: Tuesday, November 23, 2021 1:47 PM
To: Teres Alexis, Alan Previn ;
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [RFC 2/7]
Hi Michal - wrt to this comment:
+struct intel_guc;
> > > +
> > > +struct __guc_mmio_reg_descr {
> > > + i915_reg_t reg;
> > > + u32 flags;
> > > + u32 mask;
> > > + char *regname;
> >
> > const char* ?
> >
> > but maybe instead of adding reg name to the GuC specific struct we
> > should add gen
Michal, wrt this one:
+/ FIXME: Populate tables for other devices in subsequent patch
/
> > > +
> > > +static struct __guc_mmio_reg_descr_group *
> > > +guc_capture_get_device_reglist(struct drm_i915_private *dev_priv)
> >
> > in new code we are using "i915" instead of "d
Thanks very much Jani for the detail review of the code... apologies on some of
the styling mishaps.
I will fix them all. I agree completely with the header file comments - my bad
on that - had already
learnt that lesson on pxp side. Will fix accordingly.
...alan
On Wed, 2021-11-24 at 12:06 +0
Thanks Michal for the thorough review of the code (and the other patches). I
will fix them all.
On the register-to-string helper function,
i'll have to think it through because i do want to keep future development
maintenance work when adding new registers simple (in the sense that
adding a singl
On Mon, 22 Nov 2021, Alan Previn wrote:
> + {
> + .list = gen12lp_vec_class_regs,
> + .num_regs = (sizeof(gen12lp_vec_class_regs) / sizeof(struct
> __guc_mmio_reg_descr)),
> + .owner = GUC_CAPTURE_LIST_INDEX_PF,
> + .type = GUC_CAPTURE_LIST_TYPE
On Tue, 23 Nov 2021, Michal Wajdeczko wrote:
> Hi,
>
> just few random nits below
>
> -Michal
>
>
> On 23.11.2021 00:03, Alan Previn wrote:
>> +/* Define all device tables of GuC error capture register lists */
>> +
>> +/* Gen12 LP
>> *
Hi,
just few random nits below
-Michal
On 23.11.2021 00:03, Alan Previn wrote:
> Update GuC ADS size allocation to include space for
> the lists of error state capture register descriptors.
>
> Also, populate the lists of registers we want GuC to report back to
> Host on engine reset events. T
Update GuC ADS size allocation to include space for
the lists of error state capture register descriptors.
Also, populate the lists of registers we want GuC to report back to
Host on engine reset events. This list should include global,
engine-class and engine-instance registers for every engine-c
