Re: [Intel-gfx] [PATCH v5 22/22] drm/i915/dg1: Change DMC_DEBUG{1, 2} registers

2020-08-13 Thread Lucas De Marchi
On Mon, Aug 10, 2020 at 11:18:11AM +0530, Anshuman Gupta wrote: On 2020-08-07 at 22:56:54 +0530, Souza, Jose wrote: On Fri, 2020-08-07 at 18:44 +0530, Anshuman Gupta wrote: > On 2020-08-04 at 05:01:37 +0530, Souza, Jose wrote: > > On Fri, 2020-07-24 at 14:39 -0700, Lucas De Marchi wrote: > > > F

Re: [Intel-gfx] [PATCH v5 22/22] drm/i915/dg1: Change DMC_DEBUG{1, 2} registers

2020-08-09 Thread Anshuman Gupta
On 2020-08-07 at 22:56:54 +0530, Souza, Jose wrote: > On Fri, 2020-08-07 at 18:44 +0530, Anshuman Gupta wrote: > > On 2020-08-04 at 05:01:37 +0530, Souza, Jose wrote: > > > On Fri, 2020-07-24 at 14:39 -0700, Lucas De Marchi wrote: > > > > From: Anshuman Gupta < > > > > anshuman.gu...@intel.com > >

Re: [Intel-gfx] [PATCH v5 22/22] drm/i915/dg1: Change DMC_DEBUG{1, 2} registers

2020-08-07 Thread Souza, Jose
On Fri, 2020-08-07 at 18:44 +0530, Anshuman Gupta wrote: > On 2020-08-04 at 05:01:37 +0530, Souza, Jose wrote: > > On Fri, 2020-07-24 at 14:39 -0700, Lucas De Marchi wrote: > > > From: Anshuman Gupta < > > > anshuman.gu...@intel.com > > > > > > > > > DGFX devices have different DMC_DEBUG* counter

Re: [Intel-gfx] [PATCH v5 22/22] drm/i915/dg1: Change DMC_DEBUG{1, 2} registers

2020-08-07 Thread Anshuman Gupta
On 2020-08-04 at 05:01:37 +0530, Souza, Jose wrote: > On Fri, 2020-07-24 at 14:39 -0700, Lucas De Marchi wrote: > > From: Anshuman Gupta < > > anshuman.gu...@intel.com > > > > > > > DGFX devices have different DMC_DEBUG* counter MMIO address > > offset. Incorporate these changes in i915_reg.h for

Re: [Intel-gfx] [PATCH v5 22/22] drm/i915/dg1: Change DMC_DEBUG{1, 2} registers

2020-08-03 Thread Souza, Jose
On Fri, 2020-07-24 at 14:39 -0700, Lucas De Marchi wrote: > From: Anshuman Gupta < > anshuman.gu...@intel.com > > > > DGFX devices have different DMC_DEBUG* counter MMIO address > offset. Incorporate these changes in i915_reg.h for DG1 DC5/DC6 > counter and handle i915_dmc_info accordingly. > > C

[Intel-gfx] [PATCH v5 22/22] drm/i915/dg1: Change DMC_DEBUG{1, 2} registers

2020-07-24 Thread Lucas De Marchi
From: Anshuman Gupta DGFX devices have different DMC_DEBUG* counter MMIO address offset. Incorporate these changes in i915_reg.h for DG1 DC5/DC6 counter and handle i915_dmc_info accordingly. Cc: Uma Shankar Signed-off-by: Anshuman Gupta Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915